1 /* $OpenBSD: cpu.h,v 1.133 2019/12/20 07:49:31 jsg Exp $ */ 2 /* $NetBSD: cpu.h,v 1.1 2003/04/26 18:39:39 fvdl Exp $ */ 3 4 /*- 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 36 */ 37 38 #ifndef _MACHINE_CPU_H_ 39 #define _MACHINE_CPU_H_ 40 41 /* 42 * Definitions unique to x86-64 cpu support. 43 */ 44 #ifdef _KERNEL 45 #include <machine/frame.h> 46 #include <machine/segments.h> /* USERMODE */ 47 #include <machine/cacheinfo.h> 48 #include <machine/intrdefs.h> 49 #endif /* _KERNEL */ 50 51 #include <sys/device.h> 52 #include <sys/sched.h> 53 #include <sys/sensors.h> 54 #include <sys/srp.h> 55 56 #ifdef _KERNEL 57 58 /* VMXON region (Intel) */ 59 struct vmxon_region { 60 uint32_t vr_revision; 61 }; 62 63 /* 64 * VMX for Intel CPUs 65 */ 66 struct vmx { 67 uint64_t vmx_cr0_fixed0; 68 uint64_t vmx_cr0_fixed1; 69 uint64_t vmx_cr4_fixed0; 70 uint64_t vmx_cr4_fixed1; 71 uint32_t vmx_vmxon_revision; 72 uint32_t vmx_msr_table_size; 73 uint32_t vmx_cr3_tgt_count; 74 uint64_t vmx_vm_func; 75 uint8_t vmx_has_l1_flush_msr; 76 }; 77 78 /* 79 * SVM for AMD CPUs 80 */ 81 struct svm { 82 uint32_t svm_max_asid; 83 uint8_t svm_flush_by_asid; 84 uint8_t svm_vmcb_clean; 85 }; 86 87 union vmm_cpu_cap { 88 struct vmx vcc_vmx; 89 struct svm vcc_svm; 90 }; 91 92 struct x86_64_tss; 93 struct cpu_info { 94 /* 95 * The beginning of this structure in mapped in the userspace "u-k" 96 * page tables, so that these first couple members can be accessed 97 * from the trampoline code. The ci_PAGEALIGN member defines where 98 * the part that is *not* visible begins, so don't put anything 99 * above it that must be kept hidden from userspace! 100 */ 101 u_int64_t ci_kern_cr3; /* U+K page table */ 102 u_int64_t ci_scratch; /* for U<-->K transition */ 103 104 #define ci_PAGEALIGN ci_dev 105 struct device *ci_dev; 106 struct cpu_info *ci_self; 107 struct schedstate_percpu ci_schedstate; /* scheduler state */ 108 struct cpu_info *ci_next; 109 110 struct proc *ci_curproc; 111 u_int ci_cpuid; 112 u_int ci_apicid; 113 u_int ci_acpi_proc_id; 114 u_int32_t ci_randseed; 115 116 u_int64_t ci_kern_rsp; /* kernel-only stack */ 117 u_int64_t ci_intr_rsp; /* U<-->K trampoline stack */ 118 u_int64_t ci_user_cr3; /* U-K page table */ 119 120 /* bits for mitigating Micro-architectural Data Sampling */ 121 char ci_mds_tmp[32]; /* 32byte aligned */ 122 void *ci_mds_buf; 123 124 struct pcb *ci_curpcb; 125 struct pcb *ci_idle_pcb; 126 127 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 128 u_int64_t ci_ipending; 129 int ci_ilevel; 130 int ci_idepth; 131 int ci_handled_intr_level; 132 u_int64_t ci_imask[NIPL]; 133 u_int64_t ci_iunmask[NIPL]; 134 #ifdef DIAGNOSTIC 135 int ci_mutex_level; 136 #endif 137 138 volatile u_int ci_flags; 139 u_int32_t ci_ipis; 140 141 u_int32_t ci_feature_flags; 142 u_int32_t ci_feature_eflags; 143 u_int32_t ci_feature_sefflags_ebx; 144 u_int32_t ci_feature_sefflags_ecx; 145 u_int32_t ci_feature_sefflags_edx; 146 u_int32_t ci_feature_amdspec_ebx; 147 u_int32_t ci_feature_tpmflags; 148 u_int32_t ci_pnfeatset; 149 u_int32_t ci_efeature_eax; 150 u_int32_t ci_efeature_ecx; 151 u_int32_t ci_brand[12]; 152 u_int32_t ci_amdcacheinfo[4]; 153 u_int32_t ci_extcacheinfo[4]; 154 u_int32_t ci_signature; 155 u_int32_t ci_family; 156 u_int32_t ci_model; 157 u_int32_t ci_cflushsz; 158 159 int ci_inatomic; 160 161 #define __HAVE_CPU_TOPOLOGY 162 u_int32_t ci_smt_id; 163 u_int32_t ci_core_id; 164 u_int32_t ci_pkg_id; 165 166 struct cpu_functions *ci_func; 167 void (*cpu_setup)(struct cpu_info *); 168 void (*ci_info)(struct cpu_info *); 169 170 struct device *ci_acpicpudev; 171 volatile u_int ci_mwait; 172 #define MWAIT_IN_IDLE 0x1 /* don't need IPI to wake */ 173 #define MWAIT_KEEP_IDLING 0x2 /* cleared by other cpus to wake me */ 174 #define MWAIT_ONLY 0x4 /* set if all idle states use mwait */ 175 #define MWAIT_IDLING (MWAIT_IN_IDLE | MWAIT_KEEP_IDLING) 176 177 int ci_want_resched; 178 179 struct x86_cache_info ci_cinfo[CAI_COUNT]; 180 181 struct x86_64_tss *ci_tss; 182 void *ci_gdt; 183 184 volatile int ci_ddb_paused; 185 #define CI_DDB_RUNNING 0 186 #define CI_DDB_SHOULDSTOP 1 187 #define CI_DDB_STOPPED 2 188 #define CI_DDB_ENTERDDB 3 189 #define CI_DDB_INDDB 4 190 191 #ifdef MULTIPROCESSOR 192 struct srp_hazard ci_srp_hazards[SRP_HAZARD_NUM]; 193 #endif 194 195 struct ksensordev ci_sensordev; 196 struct ksensor ci_sensor; 197 #if defined(GPROF) || defined(DDBPROF) 198 struct gmonparam *ci_gmon; 199 #endif 200 u_int32_t ci_vmm_flags; 201 #define CI_VMM_VMX (1 << 0) 202 #define CI_VMM_SVM (1 << 1) 203 #define CI_VMM_RVI (1 << 2) 204 #define CI_VMM_EPT (1 << 3) 205 #define CI_VMM_DIS (1 << 4) 206 union vmm_cpu_cap ci_vmm_cap; 207 paddr_t ci_vmxon_region_pa; 208 struct vmxon_region *ci_vmxon_region; 209 210 int64_t ci_tsc_skew; /* counter skew vs cpu0 */ 211 }; 212 213 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 214 #define CPUF_AP 0x0002 /* CPU is an AP */ 215 #define CPUF_SP 0x0004 /* CPU is only processor */ 216 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 217 218 #define CPUF_IDENTIFY 0x0010 /* CPU may now identify */ 219 #define CPUF_IDENTIFIED 0x0020 /* CPU has been identified */ 220 221 #define CPUF_CONST_TSC 0x0040 /* CPU has constant TSC */ 222 #define CPUF_USERSEGS 0x0080 /* CPU has curproc's segs and FS.base */ 223 #define CPUF_INVAR_TSC 0x0100 /* CPU has invariant TSC */ 224 #define CPUF_USERXSTATE 0x0200 /* CPU has curproc's xsave state */ 225 226 #define CPUF_SYNCTSC 0x0800 /* Synchronize TSC */ 227 #define CPUF_PRESENT 0x1000 /* CPU is present */ 228 #define CPUF_RUNNING 0x2000 /* CPU is running */ 229 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 230 #define CPUF_GO 0x8000 /* CPU should start running */ 231 #define CPUF_PARK 0x10000 /* CPU should self-park in real mode */ 232 #define CPUF_VMM 0x20000 /* CPU is executing in VMM mode */ 233 234 #define PROC_PC(p) ((p)->p_md.md_regs->tf_rip) 235 #define PROC_STACK(p) ((p)->p_md.md_regs->tf_rsp) 236 237 struct cpu_info_full; 238 extern struct cpu_info_full cpu_info_full_primary; 239 #define cpu_info_primary (*(struct cpu_info *)((char *)&cpu_info_full_primary + 4096*2 - offsetof(struct cpu_info, ci_PAGEALIGN))) 240 241 extern struct cpu_info *cpu_info_list; 242 243 #define CPU_INFO_ITERATOR int 244 #define CPU_INFO_FOREACH(cii, ci) for (cii = 0, ci = cpu_info_list; \ 245 ci != NULL; ci = ci->ci_next) 246 247 #define CPU_INFO_UNIT(ci) ((ci)->ci_dev ? (ci)->ci_dev->dv_unit : 0) 248 249 /* 250 * Preempt the current process if in interrupt from user mode, 251 * or after the current trap/syscall if in system mode. 252 */ 253 extern void need_resched(struct cpu_info *); 254 #define clear_resched(ci) (ci)->ci_want_resched = 0 255 256 #if defined(MULTIPROCESSOR) 257 258 #define MAXCPUS 64 /* bitmask */ 259 260 #define CPU_STARTUP(_ci) ((_ci)->ci_func->start(_ci)) 261 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 262 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 263 264 #define curcpu() ({struct cpu_info *__ci; \ 265 asm volatile("movq %%gs:%P1,%0" : "=r" (__ci) \ 266 :"n" (offsetof(struct cpu_info, ci_self))); \ 267 __ci;}) 268 #define cpu_number() (curcpu()->ci_cpuid) 269 270 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 271 272 extern struct cpu_info *cpu_info[MAXCPUS]; 273 274 void cpu_boot_secondary_processors(void); 275 276 void cpu_kick(struct cpu_info *); 277 void cpu_unidle(struct cpu_info *); 278 279 #define CPU_BUSY_CYCLE() __asm volatile("pause": : : "memory") 280 281 #else /* !MULTIPROCESSOR */ 282 283 #define MAXCPUS 1 284 285 #ifdef _KERNEL 286 #define curcpu() (&cpu_info_primary) 287 288 #define cpu_kick(ci) 289 #define cpu_unidle(ci) 290 291 #define CPU_BUSY_CYCLE() do {} while (0) 292 293 #endif 294 295 /* 296 * definitions of cpu-dependent requirements 297 * referenced in generic code 298 */ 299 #define cpu_number() 0 300 #define CPU_IS_PRIMARY(ci) 1 301 302 #endif /* MULTIPROCESSOR */ 303 304 #include <machine/cpufunc.h> 305 #include <machine/psl.h> 306 307 #endif /* _KERNEL */ 308 309 #ifdef MULTIPROCESSOR 310 #include <sys/mplock.h> 311 #endif 312 313 #define aston(p) ((p)->p_md.md_astpending = 1) 314 315 #define curpcb curcpu()->ci_curpcb 316 317 /* 318 * Arguments to hardclock, softclock and statclock 319 * encapsulate the previous machine state in an opaque 320 * clockframe; for now, use generic intrframe. 321 */ 322 #define clockframe intrframe 323 324 #define CLKF_USERMODE(frame) USERMODE((frame)->if_cs, (frame)->if_rflags) 325 #define CLKF_PC(frame) ((frame)->if_rip) 326 #define CLKF_INTR(frame) (curcpu()->ci_idepth > 1) 327 328 /* 329 * Give a profiling tick to the current process when the user profiling 330 * buffer pages are invalid. On the i386, request an ast to send us 331 * through usertrap(), marking the proc as needing a profiling tick. 332 */ 333 #define need_proftick(p) aston(p) 334 335 void signotify(struct proc *); 336 337 /* 338 * We need a machine-independent name for this. 339 */ 340 extern void (*delay_func)(int); 341 struct timeval; 342 343 #define DELAY(x) (*delay_func)(x) 344 #define delay(x) (*delay_func)(x) 345 346 347 #ifdef _KERNEL 348 /* locore.S */ 349 extern int biosbasemem; 350 extern int biosextmem; 351 extern int cpu; 352 extern int cpu_feature; 353 extern int cpu_ebxfeature; 354 extern int cpu_ecxfeature; 355 extern int cpu_perf_eax; 356 extern int cpu_perf_ebx; 357 extern int cpu_perf_edx; 358 extern int cpu_apmi_edx; 359 extern int ecpu_ecxfeature; 360 extern int cpu_id; 361 extern char cpu_vendor[]; 362 extern int cpuid_level; 363 extern int cpuspeed; 364 extern int cpu_meltdown; 365 366 /* cpu.c */ 367 extern u_int cpu_mwait_size; 368 extern u_int cpu_mwait_states; 369 370 /* identcpu.c */ 371 void identifycpu(struct cpu_info *); 372 int cpu_amd64speed(int *); 373 374 /* machdep.c */ 375 void dumpconf(void); 376 void cpu_reset(void); 377 void x86_64_proc0_tss_ldt_init(void); 378 void x86_64_bufinit(void); 379 void cpu_proc_fork(struct proc *, struct proc *); 380 int amd64_pa_used(paddr_t); 381 extern void (*cpu_idle_cycle_fcn)(void); 382 383 struct region_descriptor; 384 void lgdt(struct region_descriptor *); 385 386 struct pcb; 387 void savectx(struct pcb *); 388 void switch_exit(struct proc *, void (*)(struct proc *)); 389 void proc_trampoline(void); 390 391 /* clock.c */ 392 extern void (*initclock_func)(void); 393 void startclocks(void); 394 void rtcstart(void); 395 void rtcstop(void); 396 void i8254_delay(int); 397 void i8254_initclocks(void); 398 void i8254_startclock(void); 399 void i8254_inittimecounter(void); 400 void i8254_inittimecounter_simple(void); 401 402 /* i8259.c */ 403 void i8259_default_setup(void); 404 405 void cpu_init_msrs(struct cpu_info *); 406 void cpu_tsx_disable(struct cpu_info *); 407 408 /* dkcsum.c */ 409 void dkcsumattach(void); 410 411 /* bus_machdep.c */ 412 void x86_bus_space_init(void); 413 void x86_bus_space_mallocok(void); 414 415 /* powernow-k8.c */ 416 void k8_powernow_init(struct cpu_info *); 417 void k8_powernow_setperf(int); 418 419 /* k1x-pstate.c */ 420 void k1x_init(struct cpu_info *); 421 void k1x_setperf(int); 422 423 void est_init(struct cpu_info *); 424 void est_setperf(int); 425 426 #ifdef MULTIPROCESSOR 427 /* mp_setperf.c */ 428 void mp_setperf_init(void); 429 #endif 430 431 #endif /* _KERNEL */ 432 433 /* 434 * CTL_MACHDEP definitions. 435 */ 436 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 437 #define CPU_BIOS 2 /* BIOS variables */ 438 #define CPU_BLK2CHR 3 /* convert blk maj into chr one */ 439 #define CPU_CHR2BLK 4 /* convert chr maj into blk one */ 440 #define CPU_ALLOWAPERTURE 5 /* allow mmap of /dev/xf86 */ 441 #define CPU_CPUVENDOR 6 /* cpuid vendor string */ 442 #define CPU_CPUID 7 /* cpuid */ 443 #define CPU_CPUFEATURE 8 /* cpuid features */ 444 #define CPU_KBDRESET 10 /* keyboard reset under pcvt */ 445 #define CPU_XCRYPT 12 /* supports VIA xcrypt in userland */ 446 #define CPU_LIDACTION 14 /* action caused by lid close */ 447 #define CPU_FORCEUKBD 15 /* Force ukbd(4) as console keyboard */ 448 #define CPU_TSCFREQ 16 /* TSC frequency */ 449 #define CPU_INVARIANTTSC 17 /* has invariant TSC */ 450 #define CPU_PWRACTION 18 /* action caused by power button */ 451 #define CPU_MAXID 19 /* number of valid machdep ids */ 452 453 #define CTL_MACHDEP_NAMES { \ 454 { 0, 0 }, \ 455 { "console_device", CTLTYPE_STRUCT }, \ 456 { "bios", CTLTYPE_INT }, \ 457 { "blk2chr", CTLTYPE_STRUCT }, \ 458 { "chr2blk", CTLTYPE_STRUCT }, \ 459 { "allowaperture", CTLTYPE_INT }, \ 460 { "cpuvendor", CTLTYPE_STRING }, \ 461 { "cpuid", CTLTYPE_INT }, \ 462 { "cpufeature", CTLTYPE_INT }, \ 463 { 0, 0 }, \ 464 { "kbdreset", CTLTYPE_INT }, \ 465 { 0, 0 }, \ 466 { "xcrypt", CTLTYPE_INT }, \ 467 { 0, 0 }, \ 468 { "lidaction", CTLTYPE_INT }, \ 469 { "forceukbd", CTLTYPE_INT }, \ 470 { "tscfreq", CTLTYPE_QUAD }, \ 471 { "invarianttsc", CTLTYPE_INT }, \ 472 { "pwraction", CTLTYPE_INT }, \ 473 } 474 475 #endif /* !_MACHINE_CPU_H_ */ 476