1 /* $OpenBSD: cpu.h,v 1.145 2022/07/12 04:46:00 jsg Exp $ */ 2 /* $NetBSD: cpu.h,v 1.1 2003/04/26 18:39:39 fvdl Exp $ */ 3 4 /*- 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 36 */ 37 38 #ifndef _MACHINE_CPU_H_ 39 #define _MACHINE_CPU_H_ 40 41 /* 42 * Definitions unique to x86-64 cpu support. 43 */ 44 #ifdef _KERNEL 45 #include <machine/frame.h> 46 #include <machine/segments.h> /* USERMODE */ 47 #include <machine/intrdefs.h> 48 #endif /* _KERNEL */ 49 50 #include <sys/device.h> 51 #include <sys/rwlock.h> 52 #include <sys/sched.h> 53 #include <sys/sensors.h> 54 #include <sys/srp.h> 55 56 #ifdef _KERNEL 57 58 /* VMXON region (Intel) */ 59 struct vmxon_region { 60 uint32_t vr_revision; 61 }; 62 63 /* 64 * VMX for Intel CPUs 65 */ 66 struct vmx { 67 uint64_t vmx_cr0_fixed0; 68 uint64_t vmx_cr0_fixed1; 69 uint64_t vmx_cr4_fixed0; 70 uint64_t vmx_cr4_fixed1; 71 uint32_t vmx_vmxon_revision; 72 uint32_t vmx_msr_table_size; 73 uint32_t vmx_cr3_tgt_count; 74 uint64_t vmx_vm_func; 75 uint8_t vmx_has_l1_flush_msr; 76 }; 77 78 /* 79 * SVM for AMD CPUs 80 */ 81 struct svm { 82 uint32_t svm_max_asid; 83 uint8_t svm_flush_by_asid; 84 uint8_t svm_vmcb_clean; 85 }; 86 87 union vmm_cpu_cap { 88 struct vmx vcc_vmx; 89 struct svm vcc_svm; 90 }; 91 92 struct x86_64_tss; 93 struct cpu_info { 94 /* 95 * The beginning of this structure in mapped in the userspace "u-k" 96 * page tables, so that these first couple members can be accessed 97 * from the trampoline code. The ci_PAGEALIGN member defines where 98 * the part that is *not* visible begins, so don't put anything 99 * above it that must be kept hidden from userspace! 100 */ 101 u_int64_t ci_kern_cr3; /* U+K page table */ 102 u_int64_t ci_scratch; /* for U<-->K transition */ 103 104 #define ci_PAGEALIGN ci_dev 105 struct device *ci_dev; 106 struct cpu_info *ci_self; 107 struct schedstate_percpu ci_schedstate; /* scheduler state */ 108 struct cpu_info *ci_next; 109 110 struct proc *ci_curproc; 111 u_int ci_cpuid; 112 u_int ci_apicid; 113 u_int ci_acpi_proc_id; 114 u_int32_t ci_randseed; 115 116 u_int64_t ci_kern_rsp; /* kernel-only stack */ 117 u_int64_t ci_intr_rsp; /* U<-->K trampoline stack */ 118 u_int64_t ci_user_cr3; /* U-K page table */ 119 120 /* bits for mitigating Micro-architectural Data Sampling */ 121 char ci_mds_tmp[32]; /* 32byte aligned */ 122 void *ci_mds_buf; 123 124 struct pmap *ci_proc_pmap; /* last userspace pmap */ 125 struct pcb *ci_curpcb; 126 struct pcb *ci_idle_pcb; 127 128 struct intrsource *ci_isources[MAX_INTR_SOURCES]; 129 u_int64_t ci_ipending; 130 int ci_ilevel; 131 int ci_idepth; 132 int ci_handled_intr_level; 133 u_int64_t ci_imask[NIPL]; 134 u_int64_t ci_iunmask[NIPL]; 135 #ifdef DIAGNOSTIC 136 int ci_mutex_level; 137 #endif 138 139 volatile u_int ci_flags; 140 u_int32_t ci_ipis; 141 142 u_int32_t ci_feature_flags; 143 u_int32_t ci_feature_eflags; 144 u_int32_t ci_feature_sefflags_ebx; 145 u_int32_t ci_feature_sefflags_ecx; 146 u_int32_t ci_feature_sefflags_edx; 147 u_int32_t ci_feature_amdspec_ebx; 148 u_int32_t ci_feature_tpmflags; 149 u_int32_t ci_pnfeatset; 150 u_int32_t ci_efeature_eax; 151 u_int32_t ci_efeature_ecx; 152 u_int32_t ci_brand[12]; 153 u_int32_t ci_signature; 154 u_int32_t ci_family; 155 u_int32_t ci_model; 156 u_int32_t ci_cflushsz; 157 158 int ci_inatomic; 159 160 #define __HAVE_CPU_TOPOLOGY 161 u_int32_t ci_smt_id; 162 u_int32_t ci_core_id; 163 u_int32_t ci_pkg_id; 164 165 struct cpu_functions *ci_func; 166 void (*cpu_setup)(struct cpu_info *); 167 void (*ci_info)(struct cpu_info *); 168 169 struct device *ci_acpicpudev; 170 volatile u_int ci_mwait; 171 #define MWAIT_IN_IDLE 0x1 /* don't need IPI to wake */ 172 #define MWAIT_KEEP_IDLING 0x2 /* cleared by other cpus to wake me */ 173 #define MWAIT_ONLY 0x4 /* set if all idle states use mwait */ 174 #define MWAIT_IDLING (MWAIT_IN_IDLE | MWAIT_KEEP_IDLING) 175 176 int ci_want_resched; 177 178 struct x86_64_tss *ci_tss; 179 void *ci_gdt; 180 181 volatile int ci_ddb_paused; 182 #define CI_DDB_RUNNING 0 183 #define CI_DDB_SHOULDSTOP 1 184 #define CI_DDB_STOPPED 2 185 #define CI_DDB_ENTERDDB 3 186 #define CI_DDB_INDDB 4 187 188 #ifdef MULTIPROCESSOR 189 struct srp_hazard ci_srp_hazards[SRP_HAZARD_NUM]; 190 #endif 191 192 struct ksensordev ci_sensordev; 193 struct ksensor ci_sensor; 194 struct ksensor ci_hz_sensor; 195 u_int64_t ci_hz_mperf; 196 u_int64_t ci_hz_aperf; 197 #if defined(GPROF) || defined(DDBPROF) 198 struct gmonparam *ci_gmon; 199 #endif 200 u_int32_t ci_vmm_flags; 201 #define CI_VMM_VMX (1 << 0) 202 #define CI_VMM_SVM (1 << 1) 203 #define CI_VMM_RVI (1 << 2) 204 #define CI_VMM_EPT (1 << 3) 205 #define CI_VMM_DIS (1 << 4) 206 union vmm_cpu_cap ci_vmm_cap; 207 paddr_t ci_vmxon_region_pa; 208 struct vmxon_region *ci_vmxon_region; 209 210 int64_t ci_tsc_skew; /* counter skew vs cpu0 */ 211 212 char ci_panicbuf[512]; 213 214 paddr_t ci_vmcs_pa; 215 struct rwlock ci_vmcs_lock; 216 }; 217 218 #define CPUF_BSP 0x0001 /* CPU is the original BSP */ 219 #define CPUF_AP 0x0002 /* CPU is an AP */ 220 #define CPUF_SP 0x0004 /* CPU is only processor */ 221 #define CPUF_PRIMARY 0x0008 /* CPU is active primary processor */ 222 223 #define CPUF_IDENTIFY 0x0010 /* CPU may now identify */ 224 #define CPUF_IDENTIFIED 0x0020 /* CPU has been identified */ 225 226 #define CPUF_CONST_TSC 0x0040 /* CPU has constant TSC */ 227 #define CPUF_USERSEGS 0x0080 /* CPU has curproc's segs and FS.base */ 228 #define CPUF_INVAR_TSC 0x0100 /* CPU has invariant TSC */ 229 #define CPUF_USERXSTATE 0x0200 /* CPU has curproc's xsave state */ 230 231 #define CPUF_SYNCTSC 0x0800 /* Synchronize TSC */ 232 #define CPUF_PRESENT 0x1000 /* CPU is present */ 233 #define CPUF_RUNNING 0x2000 /* CPU is running */ 234 #define CPUF_PAUSE 0x4000 /* CPU is paused in DDB */ 235 #define CPUF_GO 0x8000 /* CPU should start running */ 236 #define CPUF_PARK 0x10000 /* CPU should self-park in real mode */ 237 #define CPUF_VMM 0x20000 /* CPU is executing in VMM mode */ 238 239 #define PROC_PC(p) ((p)->p_md.md_regs->tf_rip) 240 #define PROC_STACK(p) ((p)->p_md.md_regs->tf_rsp) 241 242 struct cpu_info_full; 243 extern struct cpu_info_full cpu_info_full_primary; 244 #define cpu_info_primary (*(struct cpu_info *)((char *)&cpu_info_full_primary + 4096*2 - offsetof(struct cpu_info, ci_PAGEALIGN))) 245 246 extern struct cpu_info *cpu_info_list; 247 248 #define CPU_INFO_ITERATOR int 249 #define CPU_INFO_FOREACH(cii, ci) for (cii = 0, ci = cpu_info_list; \ 250 ci != NULL; ci = ci->ci_next) 251 252 #define CPU_INFO_UNIT(ci) ((ci)->ci_dev ? (ci)->ci_dev->dv_unit : 0) 253 254 /* 255 * Preempt the current process if in interrupt from user mode, 256 * or after the current trap/syscall if in system mode. 257 */ 258 extern void need_resched(struct cpu_info *); 259 #define clear_resched(ci) (ci)->ci_want_resched = 0 260 261 #if defined(MULTIPROCESSOR) 262 263 #define MAXCPUS 64 /* bitmask */ 264 265 #define CPU_STARTUP(_ci) ((_ci)->ci_func->start(_ci)) 266 #define CPU_STOP(_ci) ((_ci)->ci_func->stop(_ci)) 267 #define CPU_START_CLEANUP(_ci) ((_ci)->ci_func->cleanup(_ci)) 268 269 #define curcpu() ({struct cpu_info *__ci; \ 270 asm volatile("movq %%gs:%P1,%0" : "=r" (__ci) \ 271 :"n" (offsetof(struct cpu_info, ci_self))); \ 272 __ci;}) 273 #define cpu_number() (curcpu()->ci_cpuid) 274 275 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 276 #define CPU_IS_RUNNING(ci) ((ci)->ci_flags & CPUF_RUNNING) 277 278 extern struct cpu_info *cpu_info[MAXCPUS]; 279 280 void cpu_boot_secondary_processors(void); 281 282 void cpu_kick(struct cpu_info *); 283 void cpu_unidle(struct cpu_info *); 284 285 #define CPU_BUSY_CYCLE() __asm volatile("pause": : : "memory") 286 287 #else /* !MULTIPROCESSOR */ 288 289 #define MAXCPUS 1 290 291 #ifdef _KERNEL 292 #define curcpu() (&cpu_info_primary) 293 294 #define cpu_kick(ci) 295 #define cpu_unidle(ci) 296 297 #define CPU_BUSY_CYCLE() do {} while (0) 298 299 #endif 300 301 /* 302 * definitions of cpu-dependent requirements 303 * referenced in generic code 304 */ 305 #define cpu_number() 0 306 #define CPU_IS_PRIMARY(ci) 1 307 #define CPU_IS_RUNNING(ci) 1 308 309 #endif /* MULTIPROCESSOR */ 310 311 #include <machine/cpufunc.h> 312 #include <machine/psl.h> 313 314 static inline unsigned int 315 cpu_rnd_messybits(void) 316 { 317 unsigned int hi, lo; 318 319 __asm volatile("rdtsc" : "=d" (hi), "=a" (lo)); 320 321 return (hi ^ lo); 322 } 323 324 #endif /* _KERNEL */ 325 326 #ifdef MULTIPROCESSOR 327 #include <sys/mplock.h> 328 #endif 329 330 #define aston(p) ((p)->p_md.md_astpending = 1) 331 332 #define curpcb curcpu()->ci_curpcb 333 334 /* 335 * Arguments to hardclock, softclock and statclock 336 * encapsulate the previous machine state in an opaque 337 * clockframe; for now, use generic intrframe. 338 */ 339 #define clockframe intrframe 340 341 #define CLKF_USERMODE(frame) USERMODE((frame)->if_cs, (frame)->if_rflags) 342 #define CLKF_PC(frame) ((frame)->if_rip) 343 #define CLKF_INTR(frame) (curcpu()->ci_idepth > 1) 344 345 /* 346 * Give a profiling tick to the current process when the user profiling 347 * buffer pages are invalid. On the i386, request an ast to send us 348 * through usertrap(), marking the proc as needing a profiling tick. 349 */ 350 #define need_proftick(p) aston(p) 351 352 void signotify(struct proc *); 353 354 /* 355 * We need a machine-independent name for this. 356 */ 357 extern void (*delay_func)(int); 358 struct timeval; 359 360 #define DELAY(x) (*delay_func)(x) 361 #define delay(x) (*delay_func)(x) 362 363 364 #ifdef _KERNEL 365 /* locore.S */ 366 extern int biosbasemem; 367 extern int biosextmem; 368 extern int cpu; 369 extern int cpu_feature; 370 extern int cpu_ebxfeature; 371 extern int cpu_ecxfeature; 372 extern int cpu_perf_eax; 373 extern int cpu_perf_ebx; 374 extern int cpu_perf_edx; 375 extern int cpu_apmi_edx; 376 extern int ecpu_ecxfeature; 377 extern int cpu_id; 378 extern char cpu_vendor[]; 379 extern int cpuid_level; 380 extern int cpuspeed; 381 extern int cpu_meltdown; 382 383 /* cpu.c */ 384 extern u_int cpu_mwait_size; 385 extern u_int cpu_mwait_states; 386 387 /* cacheinfo.c */ 388 void x86_print_cacheinfo(struct cpu_info *); 389 390 /* identcpu.c */ 391 void identifycpu(struct cpu_info *); 392 int cpu_amd64speed(int *); 393 394 /* machdep.c */ 395 void dumpconf(void); 396 void cpu_reset(void); 397 void x86_64_proc0_tss_ldt_init(void); 398 void cpu_proc_fork(struct proc *, struct proc *); 399 int amd64_pa_used(paddr_t); 400 extern void (*cpu_idle_cycle_fcn)(void); 401 402 struct region_descriptor; 403 void lgdt(struct region_descriptor *); 404 405 struct pcb; 406 void savectx(struct pcb *); 407 void switch_exit(struct proc *, void (*)(struct proc *)); 408 void proc_trampoline(void); 409 410 /* clock.c */ 411 extern void (*initclock_func)(void); 412 void startclocks(void); 413 void rtcinit(void); 414 void rtcstart(void); 415 void rtcstop(void); 416 void i8254_delay(int); 417 void i8254_initclocks(void); 418 void i8254_startclock(void); 419 void i8254_inittimecounter(void); 420 void i8254_inittimecounter_simple(void); 421 422 /* i8259.c */ 423 void i8259_default_setup(void); 424 425 void cpu_init_msrs(struct cpu_info *); 426 void cpu_tsx_disable(struct cpu_info *); 427 428 /* dkcsum.c */ 429 void dkcsumattach(void); 430 431 /* bus_machdep.c */ 432 void x86_bus_space_init(void); 433 void x86_bus_space_mallocok(void); 434 435 /* powernow-k8.c */ 436 void k8_powernow_init(struct cpu_info *); 437 void k8_powernow_setperf(int); 438 439 /* k1x-pstate.c */ 440 void k1x_init(struct cpu_info *); 441 void k1x_setperf(int); 442 443 void est_init(struct cpu_info *); 444 void est_setperf(int); 445 446 #ifdef MULTIPROCESSOR 447 /* mp_setperf.c */ 448 void mp_setperf_init(void); 449 #endif 450 451 #endif /* _KERNEL */ 452 453 /* 454 * CTL_MACHDEP definitions. 455 */ 456 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 457 #define CPU_BIOS 2 /* BIOS variables */ 458 #define CPU_BLK2CHR 3 /* convert blk maj into chr one */ 459 #define CPU_CHR2BLK 4 /* convert chr maj into blk one */ 460 #define CPU_ALLOWAPERTURE 5 /* allow mmap of /dev/xf86 */ 461 #define CPU_CPUVENDOR 6 /* cpuid vendor string */ 462 #define CPU_CPUID 7 /* cpuid */ 463 #define CPU_CPUFEATURE 8 /* cpuid features */ 464 #define CPU_KBDRESET 10 /* keyboard reset under pcvt */ 465 #define CPU_XCRYPT 12 /* supports VIA xcrypt in userland */ 466 #define CPU_LIDACTION 14 /* action caused by lid close */ 467 #define CPU_FORCEUKBD 15 /* Force ukbd(4) as console keyboard */ 468 #define CPU_TSCFREQ 16 /* TSC frequency */ 469 #define CPU_INVARIANTTSC 17 /* has invariant TSC */ 470 #define CPU_PWRACTION 18 /* action caused by power button */ 471 #define CPU_MAXID 19 /* number of valid machdep ids */ 472 473 #define CTL_MACHDEP_NAMES { \ 474 { 0, 0 }, \ 475 { "console_device", CTLTYPE_STRUCT }, \ 476 { "bios", CTLTYPE_INT }, \ 477 { "blk2chr", CTLTYPE_STRUCT }, \ 478 { "chr2blk", CTLTYPE_STRUCT }, \ 479 { "allowaperture", CTLTYPE_INT }, \ 480 { "cpuvendor", CTLTYPE_STRING }, \ 481 { "cpuid", CTLTYPE_INT }, \ 482 { "cpufeature", CTLTYPE_INT }, \ 483 { 0, 0 }, \ 484 { "kbdreset", CTLTYPE_INT }, \ 485 { 0, 0 }, \ 486 { "xcrypt", CTLTYPE_INT }, \ 487 { 0, 0 }, \ 488 { "lidaction", CTLTYPE_INT }, \ 489 { "forceukbd", CTLTYPE_INT }, \ 490 { "tscfreq", CTLTYPE_QUAD }, \ 491 { "invarianttsc", CTLTYPE_INT }, \ 492 { "pwraction", CTLTYPE_INT }, \ 493 } 494 495 #endif /* !_MACHINE_CPU_H_ */ 496