1 /* $OpenBSD: softintr.c,v 1.5 2009/04/19 19:13:57 oga Exp $ */ 2 /* $NetBSD: softintr.c,v 1.1 2003/02/26 21:26:12 fvdl Exp $ */ 3 4 /*- 5 * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jason R. Thorpe. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Generic soft interrupt implementation for NetBSD/x86. 35 */ 36 37 #include <sys/param.h> 38 #include <sys/malloc.h> 39 40 #include <machine/intr.h> 41 42 #include <uvm/uvm_extern.h> 43 44 struct x86_soft_intr x86_soft_intrs[X86_NSOFTINTR]; 45 46 const int x86_soft_intr_to_ssir[X86_NSOFTINTR] = { 47 SIR_CLOCK, 48 SIR_NET, 49 SIR_TTY, 50 }; 51 52 /* 53 * softintr_init: 54 * 55 * Initialize the software interrupt system. 56 */ 57 void 58 softintr_init(void) 59 { 60 struct x86_soft_intr *si; 61 int i; 62 63 for (i = 0; i < X86_NSOFTINTR; i++) { 64 si = &x86_soft_intrs[i]; 65 TAILQ_INIT(&si->softintr_q); 66 mtx_init(&si->softintr_lock, IPL_HIGH); 67 si->softintr_ssir = x86_soft_intr_to_ssir[i]; 68 } 69 } 70 71 /* 72 * softintr_dispatch: 73 * 74 * Process pending software interrupts. 75 */ 76 void 77 softintr_dispatch(int which) 78 { 79 struct x86_soft_intr *si = &x86_soft_intrs[which]; 80 struct x86_soft_intrhand *sih; 81 82 for (;;) { 83 mtx_enter(&si->softintr_lock); 84 sih = TAILQ_FIRST(&si->softintr_q); 85 if (sih == NULL) { 86 mtx_leave(&si->softintr_lock); 87 break; 88 } 89 TAILQ_REMOVE(&si->softintr_q, sih, sih_q); 90 sih->sih_pending = 0; 91 92 uvmexp.softs++; 93 94 mtx_leave(&si->softintr_lock); 95 96 (*sih->sih_fn)(sih->sih_arg); 97 } 98 } 99 100 /* 101 * softintr_establish: [interface] 102 * 103 * Register a software interrupt handler. 104 */ 105 void * 106 softintr_establish(int ipl, void (*func)(void *), void *arg) 107 { 108 struct x86_soft_intr *si; 109 struct x86_soft_intrhand *sih; 110 int which; 111 112 switch (ipl) { 113 case IPL_SOFTCLOCK: 114 which = X86_SOFTINTR_SOFTCLOCK; 115 break; 116 117 case IPL_SOFTNET: 118 which = X86_SOFTINTR_SOFTNET; 119 break; 120 121 case IPL_TTY: 122 case IPL_SOFTTTY: 123 which = X86_SOFTINTR_SOFTTTY; 124 break; 125 126 default: 127 panic("softintr_establish"); 128 } 129 130 si = &x86_soft_intrs[which]; 131 132 sih = malloc(sizeof(*sih), M_DEVBUF, M_NOWAIT); 133 if (__predict_true(sih != NULL)) { 134 sih->sih_intrhead = si; 135 sih->sih_fn = func; 136 sih->sih_arg = arg; 137 sih->sih_pending = 0; 138 } 139 return (sih); 140 } 141 142 /* 143 * softintr_disestablish: [interface] 144 * 145 * Unregister a software interrupt handler. 146 */ 147 void 148 softintr_disestablish(void *arg) 149 { 150 struct x86_soft_intrhand *sih = arg; 151 struct x86_soft_intr *si = sih->sih_intrhead; 152 153 mtx_enter(&si->softintr_lock); 154 if (sih->sih_pending) { 155 TAILQ_REMOVE(&si->softintr_q, sih, sih_q); 156 sih->sih_pending = 0; 157 } 158 mtx_leave(&si->softintr_lock); 159 160 free(sih, M_DEVBUF); 161 } 162