1*b1926db3Smiod /* $OpenBSD: tsp_pci.c,v 1.4 2010/12/04 17:06:31 miod Exp $ */
28186b1fcSericj /* $NetBSD: tsp_pci.c,v 1.1 1999/06/29 06:46:47 ross Exp $ */
38186b1fcSericj
48186b1fcSericj /*-
58186b1fcSericj * Copyright (c) 1999 by Ross Harvey. All rights reserved.
68186b1fcSericj *
78186b1fcSericj * Redistribution and use in source and binary forms, with or without
88186b1fcSericj * modification, are permitted provided that the following conditions
98186b1fcSericj * are met:
108186b1fcSericj * 1. Redistributions of source code must retain the above copyright
118186b1fcSericj * notice, this list of conditions and the following disclaimer.
128186b1fcSericj * 2. Redistributions in binary form must reproduce the above copyright
138186b1fcSericj * notice, this list of conditions and the following disclaimer in the
148186b1fcSericj * documentation and/or other materials provided with the distribution.
158186b1fcSericj * 3. All advertising materials mentioning features or use of this software
168186b1fcSericj * must display the following acknowledgement:
178186b1fcSericj * This product includes software developed by Ross Harvey.
188186b1fcSericj * 4. The name of Ross Harvey may not be used to endorse or promote products
198186b1fcSericj * derived from this software without specific prior written permission.
208186b1fcSericj *
218186b1fcSericj * THIS SOFTWARE IS PROVIDED BY ROSS HARVEY ``AS IS'' AND ANY EXPRESS
228186b1fcSericj * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
238186b1fcSericj * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP0SE
248186b1fcSericj * ARE DISCLAIMED. IN NO EVENT SHALL ROSS HARVEY BE LIABLE FOR ANY
258186b1fcSericj * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
268186b1fcSericj * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
278186b1fcSericj * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
288186b1fcSericj * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
298186b1fcSericj * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
308186b1fcSericj * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
318186b1fcSericj * SUCH DAMAGE.
328186b1fcSericj *
338186b1fcSericj */
348186b1fcSericj
358186b1fcSericj #include <sys/param.h>
368186b1fcSericj #include <sys/systm.h>
378186b1fcSericj #include <sys/kernel.h>
388186b1fcSericj #include <sys/device.h>
398186b1fcSericj
408186b1fcSericj #include <uvm/uvm_extern.h>
418186b1fcSericj
428186b1fcSericj #include <dev/pci/pcireg.h>
438186b1fcSericj #include <dev/pci/pcivar.h>
448186b1fcSericj
458186b1fcSericj #include <machine/autoconf.h>
468186b1fcSericj #include <machine/rpb.h>
478186b1fcSericj
488186b1fcSericj #include <alpha/pci/tsreg.h>
498186b1fcSericj #include <alpha/pci/tsvar.h>
508186b1fcSericj
518186b1fcSericj #define tsp_pci() { Generate ctags(1) key. }
528186b1fcSericj
53c4071fd1Smillert void tsp_attach_hook(struct device *, struct device *,
54c4071fd1Smillert struct pcibus_attach_args *);
55c4071fd1Smillert int tsp_bus_maxdevs(void *, int);
56c4071fd1Smillert pcitag_t tsp_make_tag(void *, int, int, int);
57c4071fd1Smillert void tsp_decompose_tag(void *, pcitag_t, int *, int *,
58c4071fd1Smillert int *);
59*b1926db3Smiod int tsp_conf_size(void *, pcitag_t);
60c4071fd1Smillert pcireg_t tsp_conf_read(void *, pcitag_t, int);
61c4071fd1Smillert void tsp_conf_write(void *, pcitag_t, int, pcireg_t);
628186b1fcSericj
638186b1fcSericj void
tsp_pci_init(pc,v)648186b1fcSericj tsp_pci_init(pc, v)
658186b1fcSericj pci_chipset_tag_t pc;
668186b1fcSericj void *v;
678186b1fcSericj {
688186b1fcSericj pc->pc_conf_v = v;
698186b1fcSericj pc->pc_attach_hook = tsp_attach_hook;
708186b1fcSericj pc->pc_bus_maxdevs = tsp_bus_maxdevs;
718186b1fcSericj pc->pc_make_tag = tsp_make_tag;
728186b1fcSericj pc->pc_decompose_tag = tsp_decompose_tag;
73*b1926db3Smiod pc->pc_conf_size = tsp_conf_size;
748186b1fcSericj pc->pc_conf_read = tsp_conf_read;
758186b1fcSericj pc->pc_conf_write = tsp_conf_write;
768186b1fcSericj }
778186b1fcSericj
788186b1fcSericj void
tsp_attach_hook(parent,self,pba)798186b1fcSericj tsp_attach_hook(parent, self, pba)
808186b1fcSericj struct device *parent, *self;
818186b1fcSericj struct pcibus_attach_args *pba;
828186b1fcSericj {
838186b1fcSericj }
848186b1fcSericj
858186b1fcSericj int
tsp_bus_maxdevs(cpv,busno)868186b1fcSericj tsp_bus_maxdevs(cpv, busno)
878186b1fcSericj void *cpv;
888186b1fcSericj int busno;
898186b1fcSericj {
908186b1fcSericj return 32;
918186b1fcSericj }
928186b1fcSericj
938186b1fcSericj pcitag_t
tsp_make_tag(cpv,b,d,f)948186b1fcSericj tsp_make_tag(cpv, b, d, f)
958186b1fcSericj void *cpv;
968186b1fcSericj int b, d, f;
978186b1fcSericj {
988186b1fcSericj return b << 16 | d << 11 | f << 8;
998186b1fcSericj }
1008186b1fcSericj
1018186b1fcSericj void
tsp_decompose_tag(cpv,tag,bp,dp,fp)1028186b1fcSericj tsp_decompose_tag(cpv, tag, bp, dp, fp)
1038186b1fcSericj void *cpv;
1048186b1fcSericj pcitag_t tag;
1058186b1fcSericj int *bp, *dp, *fp;
1068186b1fcSericj {
1078186b1fcSericj if (bp != NULL)
1088186b1fcSericj *bp = (tag >> 16) & 0xff;
1098186b1fcSericj if (dp != NULL)
1108186b1fcSericj *dp = (tag >> 11) & 0x1f;
1118186b1fcSericj if (fp != NULL)
1128186b1fcSericj *fp = (tag >> 8) & 0x7;
1138186b1fcSericj }
114*b1926db3Smiod
115*b1926db3Smiod int
tsp_conf_size(void * cpv,pcitag_t tag)116*b1926db3Smiod tsp_conf_size(void *cpv, pcitag_t tag)
117*b1926db3Smiod {
118*b1926db3Smiod return PCI_CONFIG_SPACE_SIZE;
119*b1926db3Smiod }
120*b1926db3Smiod
1218186b1fcSericj /*
1228186b1fcSericj * Tsunami makes this a lot easier than it used to be, automatically
1238186b1fcSericj * generating type 0 or type 1 cycles, and quietly returning -1 with
1248186b1fcSericj * no errors on unanswered probes.
1258186b1fcSericj */
1268186b1fcSericj pcireg_t
tsp_conf_read(cpv,tag,offset)1278186b1fcSericj tsp_conf_read(cpv, tag, offset)
1288186b1fcSericj void *cpv;
1298186b1fcSericj pcitag_t tag;
1308186b1fcSericj int offset;
1318186b1fcSericj {
1328186b1fcSericj pcireg_t *datap, data;
1338186b1fcSericj struct tsp_config *pcp = cpv;
1348186b1fcSericj
1358186b1fcSericj datap = S_PAGE(pcp->pc_iobase | P_PCI_CONFIG | tag | (offset & ~3));
1368186b1fcSericj alpha_mb();
1378186b1fcSericj data = *datap;
1388186b1fcSericj alpha_mb();
1398186b1fcSericj return data;
1408186b1fcSericj }
1418186b1fcSericj
1428186b1fcSericj void
tsp_conf_write(cpv,tag,offset,data)1438186b1fcSericj tsp_conf_write(cpv, tag, offset, data)
1448186b1fcSericj void *cpv;
1458186b1fcSericj pcitag_t tag;
1468186b1fcSericj int offset;
1478186b1fcSericj pcireg_t data;
1488186b1fcSericj {
1498186b1fcSericj pcireg_t *datap;
1508186b1fcSericj struct tsp_config *pcp = cpv;
1518186b1fcSericj
1528186b1fcSericj datap = S_PAGE(pcp->pc_iobase | P_PCI_CONFIG | tag | (offset & ~3));
1538186b1fcSericj alpha_mb();
1548186b1fcSericj *datap = data;
1558186b1fcSericj alpha_mb();
1568186b1fcSericj }
157