xref: /openbsd-src/sys/arch/alpha/pci/tsc.c (revision 2b0358df1d88d06ef4139321dd05bd5e05d91eaf)
1 /* $OpenBSD: tsc.c,v 1.14 2009/03/30 21:43:13 kettenis Exp $ */
2 /* $NetBSD: tsc.c,v 1.3 2000/06/25 19:17:40 thorpej Exp $ */
3 
4 /*-
5  * Copyright (c) 1999 by Ross Harvey.  All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by Ross Harvey.
18  * 4. The name of Ross Harvey may not be used to endorse or promote products
19  *    derived from this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY ROSS HARVEY ``AS IS'' AND ANY EXPRESS
22  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
23  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP0SE
24  * ARE DISCLAIMED.  IN NO EVENT SHALL ROSS HARVEY BE LIABLE FOR ANY
25  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31  * SUCH DAMAGE.
32  *
33  */
34 
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/device.h>
38 #include <sys/malloc.h>
39 
40 #include <machine/autoconf.h>
41 #include <machine/rpb.h>
42 
43 #include <dev/isa/isareg.h>
44 #include <dev/isa/isavar.h>
45 #include <dev/pci/pcireg.h>
46 #include <dev/pci/pcivar.h>
47 #include <alpha/pci/tsreg.h>
48 #include <alpha/pci/tsvar.h>
49 
50 #ifdef DEC_6600
51 #include <alpha/pci/pci_6600.h>
52 #endif
53 
54 #define tsc() { Generate ctags(1) key. }
55 
56 int	tscmatch(struct device *, void *, void *);
57 void	tscattach(struct device *, struct device *, void *);
58 
59 struct cfattach tsc_ca = {
60 	sizeof(struct device), tscmatch, tscattach,
61 };
62 
63 struct cfdriver tsc_cd = {
64         NULL, "tsc", DV_DULL,
65 };
66 
67 struct tsp_config tsp_configuration[2];
68 
69 static int tscprint(void *, const char *pnp);
70 
71 int	tspmatch(struct device *, void *, void *);
72 void	tspattach(struct device *, struct device *, void *);
73 
74 struct cfattach tsp_ca = {
75 	sizeof(struct tsp_softc), tspmatch, tspattach,
76 };
77 
78 struct cfdriver tsp_cd = {
79         NULL, "tsp", DV_DULL,
80 };
81 
82 
83 static int tspprint(void *, const char *pnp);
84 
85 #if	0
86 static int tsp_bus_get_window(int, int,
87 	struct alpha_bus_space_translation *);
88 #endif
89 
90 /* There can be only one */
91 static int tscfound;
92 
93 /* Which hose is the display console connected to? */
94 int tsp_console_hose;
95 
96 int
97 tscmatch(parent, match, aux)
98 	struct device *parent;
99 	void *match;
100 	void *aux;
101 {
102 	struct mainbus_attach_args *ma = aux;
103 
104 	return cputype == ST_DEC_6600
105 	    && strcmp(ma->ma_name, tsc_cd.cd_name) == 0
106 	    && !tscfound;
107 }
108 
109 void tscattach(parent, self, aux)
110 	struct device *parent, *self;
111 	void *aux;
112 {
113 	int i;
114 	int nbus;
115 	u_int64_t csc, aar;
116 	struct tsp_attach_args tsp;
117 	struct mainbus_attach_args *ma = aux;
118 
119 	tscfound = 1;
120 
121 	csc = LDQP(TS_C_CSC);
122 
123 	nbus = 1 + (CSC_BC(csc) >= 2);
124 	printf(": 21272 Chipset, Cchip rev %d\n"
125 		"%s%d: %c Dchips, %d memory bus%s of %d bytes\n",
126 		(int)MISC_REV(LDQP(TS_C_MISC)),
127 		ma->ma_name, ma->ma_slot, "2448"[CSC_BC(csc)],
128 		nbus, nbus > 1 ? "es" : "", 16 + 16 * ((csc & CSC_AW) != 0));
129 	printf("%s%d: arrays present: ", ma->ma_name, ma->ma_slot);
130 	for(i = 0; i < 4; ++i) {
131 		aar = LDQP(TS_C_AAR0 + i * TS_STEP);
132 		printf("%s%dMB%s", i ? ", " : "", (8 << AAR_ASIZ(aar)) & ~0xf,
133 		    aar & AAR_SPLIT ? " (split)" : "");
134 	}
135 	printf(", Dchip 0 rev %d\n", (int)LDQP(TS_D_DREV) & 0xf);
136 
137 	bzero(&tsp, sizeof tsp);
138 	tsp.tsp_name = "tsp";
139 	config_found(self, &tsp, NULL);
140 
141 	if(LDQP(TS_C_CSC) & CSC_P1P) {
142 		++tsp.tsp_slot;
143 		config_found(self, &tsp, tscprint);
144 	}
145 }
146 
147 static int
148 tscprint(aux, p)
149 	void *aux;
150 	const char *p;
151 {
152 	register struct tsp_attach_args *tsp = aux;
153 
154 	if(p)
155 		printf("%s%d at %s", tsp->tsp_name, tsp->tsp_slot, p);
156 	return UNCONF;
157 }
158 
159 #define tsp() { Generate ctags(1) key. }
160 
161 int
162 tspmatch(parent, match, aux)
163 	struct device *parent;
164 	void *match;
165 	void *aux;
166 {
167 	struct tsp_attach_args *t = aux;
168 
169 	return  cputype == ST_DEC_6600
170 	    && strcmp(t->tsp_name, tsp_cd.cd_name) == 0;
171 }
172 
173 void
174 tspattach(parent, self, aux)
175 	struct device *parent, *self;
176 	void *aux;
177 {
178 	struct pcibus_attach_args pba;
179 	struct tsp_attach_args *t = aux;
180 	struct tsp_config *pcp;
181 
182 	printf("\n");
183 	pcp = tsp_init(1, t->tsp_slot);
184 
185 	tsp_dma_init(pcp);
186 
187 	/*
188 	 * Do PCI memory initialization that needs to be deferred until
189 	 * malloc is safe.  On the Tsunami, we need to do this after
190 	 * DMA is initialized, as well.
191 	 */
192 	tsp_bus_mem_init2(pcp);
193 
194 	pci_6600_pickintr(pcp);
195 
196 	bzero(&pba, sizeof(pba));
197 	pba.pba_busname = "pci";
198 	pba.pba_iot = &pcp->pc_iot;
199 	pba.pba_memt = &pcp->pc_memt;
200 	pba.pba_dmat =
201 	    alphabus_dma_get_tag(&pcp->pc_dmat_direct, ALPHA_BUS_PCI);
202 	pba.pba_pc = &pcp->pc_pc;
203 	pba.pba_domain = pci_ndomains++;
204 	pba.pba_bus = 0;
205 #ifdef	notyet
206 	pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED |
207 	    PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY;
208 #endif
209 	config_found(self, &pba, tspprint);
210 }
211 
212 struct tsp_config *
213 tsp_init(mallocsafe, n)
214 	int mallocsafe;
215 	int n;	/* Pchip number */
216 {
217 	struct tsp_config *pcp;
218 
219 	KASSERT((n | 1) == 1);
220 	pcp = &tsp_configuration[n];
221 	pcp->pc_pslot = n;
222 	pcp->pc_iobase = TS_Pn(n, 0);
223 	pcp->pc_csr = S_PAGE(TS_Pn(n, P_CSRBASE));
224 	snprintf(pcp->pc_io_ex_name, sizeof pcp->pc_io_ex_name,
225 	    "tsp%d_bus_io", n);
226 	snprintf(pcp->pc_mem_ex_name, sizeof pcp->pc_mem_ex_name,
227 	    "tsp%d_bus_mem", n);
228 
229 	if (!pcp->pc_initted) {
230 		tsp_bus_io_init(&pcp->pc_iot, pcp);
231 		tsp_bus_mem_init(&pcp->pc_memt, pcp);
232 #if 0
233 		alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_IO] = 1;
234 		alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_MEM] = 1;
235 
236 		alpha_bus_get_window = tsp_bus_get_window;
237 #endif
238 	}
239 	pcp->pc_mallocsafe = mallocsafe;
240 	tsp_pci_init(&pcp->pc_pc, pcp);
241 	alpha_pci_chipset = &pcp->pc_pc;
242 	alpha_pci_chipset->pc_name = "tsunami";
243 	alpha_pci_chipset->pc_mem = P_PCI_MEM;
244 	alpha_pci_chipset->pc_ports = P_PCI_IO;
245 	alpha_pci_chipset->pc_hae_mask = 0;
246 	alpha_pci_chipset->pc_dense = TS_P0(0);
247 	alpha_pci_chipset->pc_bwx = 1;
248 	pcp->pc_initted = 1;
249 	return pcp;
250 }
251 
252 static int
253 tspprint(aux, p)
254 	void *aux;
255 	const char *p;
256 {
257 	register struct pcibus_attach_args *pci = aux;
258 
259 	if(p)
260 		printf("%s at %s", pci->pba_busname, p);
261 	printf(" bus %d", pci->pba_bus);
262 	return UNCONF;
263 }
264 
265 #if 0
266 static int
267 tsp_bus_get_window(type, window, abst)
268 	int type, window;
269 	struct alpha_bus_space_translation *abst;
270 {
271 	struct tsp_config *tsp = &tsp_configuration[tsp_console_hose];
272 	bus_space_tag_t st;
273 	int error;
274 
275 	switch (type) {
276 	case ALPHA_BUS_TYPE_PCI_IO:
277 		st = &tsp->pc_iot;
278 		break;
279 
280 	case ALPHA_BUS_TYPE_PCI_MEM:
281 		st = &tsp->pc_memt;
282 		break;
283 
284 	default:
285 		panic("tsp_bus_get_window");
286 	}
287 
288 	error = alpha_bus_space_get_window(st, window, abst);
289 	if (error)
290 		return (error);
291 
292 	abst->abst_sys_start = TS_PHYSADDR(abst->abst_sys_start);
293 	abst->abst_sys_end = TS_PHYSADDR(abst->abst_sys_end);
294 
295 	return (0);
296 }
297 #endif
298