1 /* $OpenBSD: mcpcia_pci.c,v 1.3 2012/12/05 23:20:10 deraadt Exp $ */ 2 /* $NetBSD: mcpcia_pci.c,v 1.5 2007/03/04 05:59:11 christos Exp $ */ 3 4 /* 5 * Copyright (c) 1998 by Matthew Jacob 6 * NASA AMES Research Center. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice immediately at the beginning of the file, without modification, 14 * this list of conditions, and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 25 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 */ 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/device.h> 38 39 #include <uvm/uvm_extern.h> 40 41 #include <dev/pci/pcireg.h> 42 #include <dev/pci/pcivar.h> 43 #include <alpha/pci/mcpciareg.h> 44 #include <alpha/pci/mcpciavar.h> 45 46 #define KV(_addr) ((void *)ALPHA_PHYS_TO_K0SEG((_addr))) 47 48 void mcpcia_attach_hook(struct device *, struct device *, 49 struct pcibus_attach_args *); 50 int mcpcia_bus_maxdevs(void *, int); 51 pcitag_t mcpcia_make_tag(void *, int, int, int); 52 void mcpcia_decompose_tag(void *, pcitag_t, int *, int *, int *); 53 int mcpcia_conf_size(void *, pcitag_t); 54 pcireg_t mcpcia_conf_read(void *, pcitag_t, int); 55 void mcpcia_conf_write(void *, pcitag_t, int, pcireg_t); 56 57 void 58 mcpcia_pci_init(pc, v) 59 pci_chipset_tag_t pc; 60 void *v; 61 { 62 pc->pc_conf_v = v; 63 pc->pc_attach_hook = mcpcia_attach_hook; 64 pc->pc_bus_maxdevs = mcpcia_bus_maxdevs; 65 pc->pc_make_tag = mcpcia_make_tag; 66 pc->pc_decompose_tag = mcpcia_decompose_tag; 67 pc->pc_conf_size = mcpcia_conf_size; 68 pc->pc_conf_read = mcpcia_conf_read; 69 pc->pc_conf_write = mcpcia_conf_write; 70 } 71 72 void 73 mcpcia_attach_hook(parent, self, pba) 74 struct device *parent, *self; 75 struct pcibus_attach_args *pba; 76 { 77 } 78 79 int 80 mcpcia_bus_maxdevs(cpv, busno) 81 void *cpv; 82 int busno; 83 { 84 return (MCPCIA_MAXDEV); 85 } 86 87 pcitag_t 88 mcpcia_make_tag(cpv, b, d, f) 89 void *cpv; 90 int b, d, f; 91 { 92 pcitag_t tag; 93 tag = (b << 21) | (d << 16) | (f << 13); 94 return (tag); 95 } 96 97 void 98 mcpcia_decompose_tag(cpv, tag, bp, dp, fp) 99 void *cpv; 100 pcitag_t tag; 101 int *bp, *dp, *fp; 102 { 103 if (bp != NULL) 104 *bp = (tag >> 21) & 0xff; 105 if (dp != NULL) 106 *dp = (tag >> 16) & 0x1f; 107 if (fp != NULL) 108 *fp = (tag >> 13) & 0x7; 109 } 110 111 int 112 mcpcia_conf_size(void *cpv, pcitag_t tag) 113 { 114 return PCI_CONFIG_SPACE_SIZE; 115 } 116 117 pcireg_t 118 mcpcia_conf_read(cpv, tag, offset) 119 void *cpv; 120 pcitag_t tag; 121 int offset; 122 { 123 struct mcpcia_config *ccp = cpv; 124 pcireg_t *dp, data = (pcireg_t) -1; 125 unsigned long paddr; 126 127 /* 128 * There's nothing in slot 0 on a primary bus- don't even try. 129 */ 130 if ((tag >> 21) == 0 && ((u_int32_t) tag & 0x1f0000) == 0) 131 return (data); 132 133 if (ccp == NULL) { 134 panic("NULL ccp in mcpcia_conf_read"); 135 } 136 paddr = (unsigned long) tag; 137 paddr |= (3LL << 3); /* 32 Bit PCI byte enables */ 138 paddr |= ((unsigned long) ((offset >> 2) << 7)); 139 paddr |= MCPCIA_PCI_CONF; 140 paddr |= ccp->cc_sysbase; 141 dp = (pcireg_t *)KV(paddr); 142 if (badaddr(dp, sizeof (*dp)) == 0) { 143 data = *dp; 144 } 145 return (data); 146 } 147 148 void 149 mcpcia_conf_write(cpv, tag, offset, data) 150 void *cpv; 151 pcitag_t tag; 152 int offset; 153 pcireg_t data; 154 { 155 struct mcpcia_config *ccp = cpv; 156 pcireg_t *dp; 157 unsigned long paddr; 158 159 /* 160 * There's nothing in slot 0 on a primary bus- don't even try. 161 */ 162 if ((tag >> 21) == 0 && ((u_int32_t) tag & 0x1f0000) == 0) 163 return; 164 165 if (ccp == NULL) { 166 panic("NULL ccp in mcpcia_conf_write"); 167 } 168 paddr = (unsigned long) tag; 169 paddr |= (3LL << 3); /* 32 Bit PCI byte enables */ 170 paddr |= ((unsigned long) ((offset >> 2) << 7)); 171 paddr |= MCPCIA_PCI_CONF; 172 paddr |= ccp->cc_sysbase; 173 174 dp = (pcireg_t *)KV(paddr); 175 *dp = data; 176 } 177