xref: /openbsd-src/sys/arch/alpha/pci/irongate_pci.c (revision b2ea75c1b17e1a9a339660e7ed45cd24946b230e)
1 /*	$OpenBSD: irongate_pci.c,v 1.2 2001/04/17 14:53:33 art Exp $	*/
2 /* $NetBSD: irongate_pci.c,v 1.2 2000/06/29 08:58:47 mrg Exp $ */
3 
4 /*-
5  * Copyright (c) 2000 The NetBSD Foundation, Inc.
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to The NetBSD Foundation
9  * by Jason R. Thorpe.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *	This product includes software developed by the NetBSD
22  *	Foundation, Inc. and its contributors.
23  * 4. Neither the name of The NetBSD Foundation nor the names of its
24  *    contributors may be used to endorse or promote products derived
25  *    from this software without specific prior written permission.
26  *
27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37  * POSSIBILITY OF SUCH DAMAGE.
38  */
39 
40 /*
41  * PCI Configuration Space support for the AMD 751 (``Irongate'') core logic
42  * chipset.
43  */
44 
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/kernel.h>
48 #include <sys/device.h>
49 
50 #include <vm/vm.h>
51 #include <uvm/uvm_extern.h>
52 
53 #include <dev/pci/pcireg.h>
54 #include <dev/pci/pcivar.h>
55 #include <alpha/pci/irongatereg.h>
56 #include <alpha/pci/irongatevar.h>
57 
58 void		irongate_attach_hook __P((struct device *, struct device *,
59 		    struct pcibus_attach_args *));
60 int		irongate_bus_maxdevs __P((void *, int));
61 pcitag_t	irongate_make_tag __P((void *, int, int, int));
62 void		irongate_decompose_tag __P((void *, pcitag_t, int *, int *,
63 		    int *));
64 pcireg_t	irongate_conf_read __P((void *, pcitag_t, int));
65 void		irongate_conf_write __P((void *, pcitag_t, int, pcireg_t));
66 
67 /* AMD 751 systems are always single-processor, so this is easy. */
68 #define	PCI_CONF_LOCK(s)	(s) = splhigh()
69 #define	PCI_CONF_UNLOCK(s)	splx((s))
70 
71 #define	PCI_CONF_ADDR	(IRONGATE_IO_BASE|IRONGATE_CONFADDR)
72 #define	PCI_CONF_DATA	(IRONGATE_IO_BASE|IRONGATE_CONFDATA)
73 
74 #define	REGVAL(r)	(*(__volatile u_int32_t *)ALPHA_PHYS_TO_K0SEG(r))
75 
76 void
77 irongate_pci_init(pci_chipset_tag_t pc, void *v)
78 {
79 
80 	pc->pc_conf_v = v;
81 	pc->pc_attach_hook = irongate_attach_hook;
82 	pc->pc_bus_maxdevs = irongate_bus_maxdevs;
83 	pc->pc_make_tag = irongate_make_tag;
84 	pc->pc_decompose_tag = irongate_decompose_tag;
85 	pc->pc_conf_read = irongate_conf_read;
86 	pc->pc_conf_write = irongate_conf_write;
87 }
88 
89 void
90 irongate_attach_hook(struct device *parent, struct device *self,
91     struct pcibus_attach_args *pba)
92 {
93 }
94 
95 int
96 irongate_bus_maxdevs(void *ipv, int busno)
97 {
98 
99 	return 32;
100 }
101 
102 pcitag_t
103 irongate_make_tag(void *ipv, int b, int d, int f)
104 {
105 
106 	return (b << 16) | (d << 11) | (f << 8);
107 }
108 
109 void
110 irongate_decompose_tag(void *ipv, pcitag_t tag, int *bp, int *dp, int *fp)
111 {
112 
113 	if (bp != NULL)
114 		*bp = (tag >> 16) & 0xff;
115 	if (dp != NULL)
116 		*dp = (tag >> 11) & 0x1f;
117 	if (fp != NULL)
118 		*fp = (tag >> 8) & 0x7;
119 }
120 
121 pcireg_t
122 irongate_conf_read(void *ipv, pcitag_t tag, int offset)
123 {
124 	int d;
125 
126 	/*
127 	 * The AMD 751 appears in PCI configuration space, but
128 	 * that is ... counter-intuitive to the way we normally
129 	 * attach PCI-Host bridges on the Alpha.  So, filter out
130 	 * the AMD 751 device here.  We provide a private entry
131 	 * point for getting at it from machdep code.
132 	 */
133 	irongate_decompose_tag(ipv, tag, NULL, &d, NULL);
134 	if (d == IRONGATE_PCIHOST_DEV)
135 		return ((pcireg_t) -1);
136 
137 	return (irongate_conf_read0(ipv, tag, offset));
138 }
139 
140 pcireg_t
141 irongate_conf_read0(void *ipv, pcitag_t tag, int offset)
142 {
143 	pcireg_t data;
144 	int s;
145 
146 	PCI_CONF_LOCK(s);
147 	REGVAL(PCI_CONF_ADDR) = (CONFADDR_ENABLE | tag | (offset & 0xff));
148 	alpha_mb();
149 	data = REGVAL(PCI_CONF_DATA);
150 	REGVAL(PCI_CONF_ADDR) = 0;
151 	alpha_mb();
152 	PCI_CONF_UNLOCK(s);
153 
154 	return (data);
155 }
156 
157 void
158 irongate_conf_write(void *ipv, pcitag_t tag, int offset, pcireg_t data)
159 {
160 	int s;
161 
162 	PCI_CONF_LOCK(s);
163 	REGVAL(PCI_CONF_ADDR) = (CONFADDR_ENABLE | tag | (offset & 0xff));
164 	alpha_mb();
165 	REGVAL(PCI_CONF_DATA) = data;
166 	alpha_mb();
167 	REGVAL(PCI_CONF_ADDR) = 0;
168 	alpha_mb();
169 	PCI_CONF_UNLOCK(s);
170 }
171