1*adde9fa4Smiod /* $OpenBSD: cia_pci.c,v 1.13 2015/10/30 07:51:49 miod Exp $ */
2aed035abSart /* $NetBSD: cia_pci.c,v 1.25 2000/06/29 08:58:46 mrg Exp $ */
334fbf6deSderaadt
434fbf6deSderaadt /*
5417eba8cSderaadt * Copyright (c) 1995, 1996 Carnegie-Mellon University.
634fbf6deSderaadt * All rights reserved.
734fbf6deSderaadt *
834fbf6deSderaadt * Author: Chris G. Demetriou
934fbf6deSderaadt *
1034fbf6deSderaadt * Permission to use, copy, modify and distribute this software and
1134fbf6deSderaadt * its documentation is hereby granted, provided that both the copyright
1234fbf6deSderaadt * notice and this permission notice appear in all copies of the
1334fbf6deSderaadt * software, derivative works or modified versions, and any portions
1434fbf6deSderaadt * thereof, and that both notices appear in supporting documentation.
1534fbf6deSderaadt *
1634fbf6deSderaadt * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
1734fbf6deSderaadt * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
1834fbf6deSderaadt * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
1934fbf6deSderaadt *
2034fbf6deSderaadt * Carnegie Mellon requests users of this software to return to
2134fbf6deSderaadt *
2234fbf6deSderaadt * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
2334fbf6deSderaadt * School of Computer Science
2434fbf6deSderaadt * Carnegie Mellon University
2534fbf6deSderaadt * Pittsburgh PA 15213-3890
2634fbf6deSderaadt *
2734fbf6deSderaadt * any improvements or extensions that they make and grant Carnegie the
2834fbf6deSderaadt * rights to redistribute these changes.
2934fbf6deSderaadt */
3034fbf6deSderaadt
3134fbf6deSderaadt #include <sys/param.h>
3234fbf6deSderaadt #include <sys/systm.h>
3334fbf6deSderaadt #include <sys/kernel.h>
3434fbf6deSderaadt #include <sys/device.h>
3534fbf6deSderaadt
36aed035abSart #include <uvm/uvm_extern.h>
3750ce9ee0Sniklas
3834fbf6deSderaadt #include <dev/pci/pcireg.h>
3934fbf6deSderaadt #include <dev/pci/pcivar.h>
4034fbf6deSderaadt #include <alpha/pci/ciareg.h>
4134fbf6deSderaadt #include <alpha/pci/ciavar.h>
4234fbf6deSderaadt
43c4071fd1Smillert void cia_attach_hook(struct device *, struct device *,
44c4071fd1Smillert struct pcibus_attach_args *);
45c4071fd1Smillert int cia_bus_maxdevs(void *, int);
46c4071fd1Smillert pcitag_t cia_make_tag(void *, int, int, int);
47c4071fd1Smillert void cia_decompose_tag(void *, pcitag_t, int *, int *,
48c4071fd1Smillert int *);
49b1926db3Smiod int cia_conf_size(void *, pcitag_t);
50c4071fd1Smillert pcireg_t cia_conf_read(void *, pcitag_t, int);
51c4071fd1Smillert void cia_conf_write(void *, pcitag_t, int, pcireg_t);
5234fbf6deSderaadt
53417eba8cSderaadt void
cia_pci_init(pc,v)54417eba8cSderaadt cia_pci_init(pc, v)
55417eba8cSderaadt pci_chipset_tag_t pc;
56417eba8cSderaadt void *v;
57417eba8cSderaadt {
5834fbf6deSderaadt
59417eba8cSderaadt pc->pc_conf_v = v;
60417eba8cSderaadt pc->pc_attach_hook = cia_attach_hook;
61417eba8cSderaadt pc->pc_bus_maxdevs = cia_bus_maxdevs;
62417eba8cSderaadt pc->pc_make_tag = cia_make_tag;
63417eba8cSderaadt pc->pc_decompose_tag = cia_decompose_tag;
64b1926db3Smiod pc->pc_conf_size = cia_conf_size;
65417eba8cSderaadt pc->pc_conf_read = cia_conf_read;
66417eba8cSderaadt pc->pc_conf_write = cia_conf_write;
67417eba8cSderaadt }
68417eba8cSderaadt
69417eba8cSderaadt void
cia_attach_hook(parent,self,pba)70417eba8cSderaadt cia_attach_hook(parent, self, pba)
71417eba8cSderaadt struct device *parent, *self;
72417eba8cSderaadt struct pcibus_attach_args *pba;
73417eba8cSderaadt {
74417eba8cSderaadt }
75417eba8cSderaadt
76417eba8cSderaadt int
cia_bus_maxdevs(cpv,busno)77417eba8cSderaadt cia_bus_maxdevs(cpv, busno)
78417eba8cSderaadt void *cpv;
79417eba8cSderaadt int busno;
80417eba8cSderaadt {
81417eba8cSderaadt
82417eba8cSderaadt return 32;
83417eba8cSderaadt }
84417eba8cSderaadt
85417eba8cSderaadt pcitag_t
cia_make_tag(cpv,b,d,f)86417eba8cSderaadt cia_make_tag(cpv, b, d, f)
87417eba8cSderaadt void *cpv;
88417eba8cSderaadt int b, d, f;
89417eba8cSderaadt {
90417eba8cSderaadt
91417eba8cSderaadt return (b << 16) | (d << 11) | (f << 8);
92417eba8cSderaadt }
93417eba8cSderaadt
94417eba8cSderaadt void
cia_decompose_tag(cpv,tag,bp,dp,fp)95417eba8cSderaadt cia_decompose_tag(cpv, tag, bp, dp, fp)
96417eba8cSderaadt void *cpv;
97417eba8cSderaadt pcitag_t tag;
98417eba8cSderaadt int *bp, *dp, *fp;
99417eba8cSderaadt {
100417eba8cSderaadt
101417eba8cSderaadt if (bp != NULL)
102417eba8cSderaadt *bp = (tag >> 16) & 0xff;
103417eba8cSderaadt if (dp != NULL)
104417eba8cSderaadt *dp = (tag >> 11) & 0x1f;
105417eba8cSderaadt if (fp != NULL)
106417eba8cSderaadt *fp = (tag >> 8) & 0x7;
107417eba8cSderaadt }
108417eba8cSderaadt
109b1926db3Smiod int
cia_conf_size(void * cpv,pcitag_t tag)110b1926db3Smiod cia_conf_size(void *cpv, pcitag_t tag)
111b1926db3Smiod {
112b1926db3Smiod return PCI_CONFIG_SPACE_SIZE;
113b1926db3Smiod }
114b1926db3Smiod
115417eba8cSderaadt pcireg_t
cia_conf_read(cpv,tag,offset)11634fbf6deSderaadt cia_conf_read(cpv, tag, offset)
11734fbf6deSderaadt void *cpv;
118417eba8cSderaadt pcitag_t tag;
119417eba8cSderaadt int offset;
12034fbf6deSderaadt {
121417eba8cSderaadt struct cia_config *ccp = cpv;
122417eba8cSderaadt pcireg_t *datap, data;
12334fbf6deSderaadt int s, secondary, ba;
124aed035abSart u_int32_t old_cfg, errbits;
1253a630e3fSniklas
126aed035abSart #ifdef __GNUC__
1273a630e3fSniklas s = 0; /* XXX gcc -Wuninitialized */
128aed035abSart old_cfg = 0; /* XXX gcc -Wuninitialized */
1293a630e3fSniklas #endif
1303a630e3fSniklas
1313a630e3fSniklas /*
132a347b448Sjmc * Some (apparently common) revisions of EB164 and AlphaStation
133aed035abSart * firmware do the Wrong thing with PCI master and target aborts,
134a347b448Sjmc * which are caused by accessing the configuration space of devices
135aed035abSart * that don't exist (for example).
1363a630e3fSniklas *
137aed035abSart * To work around this, we clear the CIA error register's PCI
138aed035abSart * master and target abort bits before touching PCI configuration
139aed035abSart * space and check it afterwards. If it indicates a master or target
140aed035abSart * abort, the device wasn't there so we return 0xffffffff.
1413a630e3fSniklas */
142aed035abSart REGVAL(CIA_CSR_CIA_ERR) = CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT;
1433a630e3fSniklas alpha_mb();
1443a630e3fSniklas alpha_pal_draina();
14534fbf6deSderaadt
146417eba8cSderaadt /* secondary if bus # != 0 */
147*adde9fa4Smiod pci_decompose_tag(&ccp->cc_pc, tag, &secondary, NULL, NULL);
14834fbf6deSderaadt if (secondary) {
14934fbf6deSderaadt s = splhigh();
150aed035abSart old_cfg = REGVAL(CIA_CSR_CFG);
15150ce9ee0Sniklas alpha_mb();
152aed035abSart REGVAL(CIA_CSR_CFG) = old_cfg | 0x1;
15350ce9ee0Sniklas alpha_mb();
15434fbf6deSderaadt }
15534fbf6deSderaadt
156aed035abSart /*
157aed035abSart * We just inline the BWX support, since this is the only
158aed035abSart * difference between BWX and swiz for config space.
159aed035abSart */
160aed035abSart if (ccp->cc_flags & CCF_PCI_USE_BWX) {
161aed035abSart if (secondary) {
162aed035abSart datap =
163aed035abSart (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF1 |
164aed035abSart tag | (offset & ~0x03));
165aed035abSart } else {
166aed035abSart datap =
167aed035abSart (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF0 |
168aed035abSart tag | (offset & ~0x03));
169aed035abSart }
170aed035abSart } else {
17150ce9ee0Sniklas datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_PCI_CONF |
17234fbf6deSderaadt tag << 5UL | /* XXX */
17334fbf6deSderaadt (offset & ~0x03) << 5 | /* XXX */
17434fbf6deSderaadt 0 << 5 | /* XXX */
17534fbf6deSderaadt 0x3 << 3); /* XXX */
176aed035abSart }
177417eba8cSderaadt data = (pcireg_t)-1;
178aed035abSart alpha_mb();
17934fbf6deSderaadt if (!(ba = badaddr(datap, sizeof *datap)))
18034fbf6deSderaadt data = *datap;
181aed035abSart alpha_mb();
182aed035abSart alpha_mb();
18334fbf6deSderaadt
18434fbf6deSderaadt if (secondary) {
18550ce9ee0Sniklas alpha_mb();
186aed035abSart REGVAL(CIA_CSR_CFG) = old_cfg;
18750ce9ee0Sniklas alpha_mb();
18834fbf6deSderaadt splx(s);
18934fbf6deSderaadt }
19034fbf6deSderaadt
1913a630e3fSniklas alpha_pal_draina();
192aed035abSart alpha_mb();
193aed035abSart errbits = REGVAL(CIA_CSR_CIA_ERR);
194aed035abSart if (errbits & (CIA_ERR_RCVD_MAS_ABT|CIA_ERR_RCVD_TAR_ABT)) {
1953a630e3fSniklas ba = 1;
1963a630e3fSniklas data = 0xffffffff;
1973a630e3fSniklas }
198aed035abSart
199aed035abSart if (errbits) {
200aed035abSart REGVAL(CIA_CSR_CIA_ERR) = errbits;
201aed035abSart alpha_mb();
202aed035abSart alpha_pal_draina();
2033a630e3fSniklas }
2043a630e3fSniklas
20534fbf6deSderaadt #if 0
20634fbf6deSderaadt printf("cia_conf_read: tag 0x%lx, reg 0x%lx -> %x @ %p%s\n", tag, reg,
20734fbf6deSderaadt data, datap, ba ? " (badaddr)" : "");
20834fbf6deSderaadt #endif
20934fbf6deSderaadt
21034fbf6deSderaadt return data;
21134fbf6deSderaadt }
21234fbf6deSderaadt
21334fbf6deSderaadt void
cia_conf_write(cpv,tag,offset,data)21434fbf6deSderaadt cia_conf_write(cpv, tag, offset, data)
21534fbf6deSderaadt void *cpv;
216417eba8cSderaadt pcitag_t tag;
217417eba8cSderaadt int offset;
218417eba8cSderaadt pcireg_t data;
21934fbf6deSderaadt {
220417eba8cSderaadt struct cia_config *ccp = cpv;
221417eba8cSderaadt pcireg_t *datap;
22234fbf6deSderaadt int s, secondary;
223aed035abSart u_int32_t old_cfg;
22434fbf6deSderaadt
225aed035abSart #ifdef __GNUC__
2263a630e3fSniklas s = 0; /* XXX gcc -Wuninitialized */
227aed035abSart old_cfg = 0; /* XXX gcc -Wuninitialized */
2283a630e3fSniklas #endif
2293a630e3fSniklas
230417eba8cSderaadt /* secondary if bus # != 0 */
231*adde9fa4Smiod pci_decompose_tag(&ccp->cc_pc, tag, &secondary, NULL, NULL);
23234fbf6deSderaadt if (secondary) {
23334fbf6deSderaadt s = splhigh();
234aed035abSart old_cfg = REGVAL(CIA_CSR_CFG);
23550ce9ee0Sniklas alpha_mb();
236aed035abSart REGVAL(CIA_CSR_CFG) = old_cfg | 0x1;
23750ce9ee0Sniklas alpha_mb();
23834fbf6deSderaadt }
23934fbf6deSderaadt
240aed035abSart /*
241aed035abSart * We just inline the BWX support, since this is the only
242aed035abSart * difference between BWX and swiz for config space.
243aed035abSart */
244aed035abSart if (ccp->cc_flags & CCF_PCI_USE_BWX) {
245aed035abSart if (secondary) {
246aed035abSart datap =
247aed035abSart (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF1 |
248aed035abSart tag | (offset & ~0x03));
249aed035abSart } else {
250aed035abSart datap =
251aed035abSart (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_EV56_BWCONF0 |
252aed035abSart tag | (offset & ~0x03));
253aed035abSart }
254aed035abSart } else {
25550ce9ee0Sniklas datap = (pcireg_t *)ALPHA_PHYS_TO_K0SEG(CIA_PCI_CONF |
25634fbf6deSderaadt tag << 5UL | /* XXX */
25734fbf6deSderaadt (offset & ~0x03) << 5 | /* XXX */
25834fbf6deSderaadt 0 << 5 | /* XXX */
25934fbf6deSderaadt 0x3 << 3); /* XXX */
260aed035abSart }
261aed035abSart alpha_mb();
26234fbf6deSderaadt *datap = data;
263aed035abSart alpha_mb();
264aed035abSart alpha_mb();
26534fbf6deSderaadt
26634fbf6deSderaadt if (secondary) {
26750ce9ee0Sniklas alpha_mb();
268aed035abSart REGVAL(CIA_CSR_CFG) = old_cfg;
26950ce9ee0Sniklas alpha_mb();
27034fbf6deSderaadt splx(s);
27134fbf6deSderaadt }
27234fbf6deSderaadt
27334fbf6deSderaadt #if 0
27434fbf6deSderaadt printf("cia_conf_write: tag 0x%lx, reg 0x%lx -> 0x%x @ %p\n", tag,
27534fbf6deSderaadt reg, data, datap);
27634fbf6deSderaadt #endif
27734fbf6deSderaadt }
278