1.\" $OpenBSD: ahc.4,v 1.16 2001/06/22 12:15:43 mpech Exp $ 2.\" $NetBSD: ahc.4,v 1.1.2.1 1996/08/25 17:22:14 thorpej Exp $ 3.\" 4.\" Copyright (c) 1995, 1996 5.\" Justin T. Gibbs. All rights reserved. 6.\" 7.\" Redistribution and use in source and binary forms, with or without 8.\" modification, are permitted provided that the following conditions 9.\" are met: 10.\" 1. Redistributions of source code must retain the above copyright 11.\" notice, this list of conditions and the following disclaimer. 12.\" 2. Redistributions in binary form must reproduce the above copyright 13.\" notice, this list of conditions and the following disclaimer in the 14.\" documentation and/or other materials provided with the distribution. 15.\" 3. The name of the author may not be used to endorse or promote products 16.\" derived from this software without specific prior written permission. 17.\" 18.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28.\" 29.\" 30.Dd March 20, 2000 31.Dt AHC 4 32.Os 33.Sh NAME 34.Nm ahc 35.Nd Adaptec VL/EISA/PCI SCSI host adapter driver 36.Sh SYNOPSIS 37.ie 0 \{ 38For one or more VL/EISA cards: 39.Cd controller eisa0 40.Cd controller ahc0 41\} 42\{For VL cards: 43.Cd ahc0 at isa? port ? irq ? 44.Pp 45For EISA cards: 46.Cd ahc* at eisa? slot ?\} 47.Pp 48.ie 0 \{ 49For one or more PCI cards: 50.Cd controller pci0 51.Cd controller ahc0 52\} 53\{For PCI cards: 54.Cd ahc* at pci? dev ? function ?\} 55.Pp 56.ie 0 \{ 57For one or more SCSI busses: 58.Cd controller scbus0 at ahc0 59\} 60\{For SCSI busses: 61.Cd scsibus* at ahc?\} 62.Sh DESCRIPTION 63This driver provides access to the 64.Tn SCSI 65bus(es) connected to Adaptec 66.Tn AIC7770, 67.Tn AIC7850, 68.Tn AIC7860, 69.Tn AIC7870, 70.Tn AIC7880, 71.Tn AIC7890, 72.Tn AIC7891, 73.Tn AIC7895, 74.Tn AIC7896, 75.Tn AIC7892, 76.Tn AIC7897, 77or 78.Tn AIC7899 79host adapter chips. 80These chips are found on many motherboards as well as the following 81Adaptec SCSI controller cards: 82.Tn 274X(W), 83.Tn 274X(T), 84.Tn 284X, 85.Tn 2920C, 86.Tn 2930U2, 87.Tn 2930CU, 88.Tn 2940, 89.Tn 2940U, 90.Tn 2940AU, 91.Tn 2940UW, 92.Tn 2940UW Dual, 93.Tn 2940U2W, 94.Tn 2940U2B, 95.Tn 2950U2W, 96.Tn 2950U2B, 97.Tn 29160, 98.Tn 3940, 99.Tn 3940U, 100.Tn 3940AU, 101.Tn 3940UW, 102.Tn 3940AUW, 103.Tn 3940U2W, 104.Tn 3950U2, 105and 106.Tn 3985. 107.Pp 108Driver features include support for twin and wide busses, 109fast, ultra and ultra2 synchronous transfers depending on controller type, 110tagged queuing, and SCB paging. 111.Pp 112Memory mapped I/O can be enabled for PCI devices with the 113.Dq Dv AHC_ALLOW_MEMIO 114configuration option. 115Memory mapped I/O is more efficient than the alternative, programmed I/O. 116Most PCI BIOSes will map devices so that either technique for communicating 117with the card is available. 118In some cases, 119usually when the PCI device is sitting behind a PCI->PCI bridge, 120the BIOS fails to properly initialize the chip for memory mapped I/O. 121The symptom of this problem is usually a system hang if memory mapped I/O 122is attempted. 123Most modern motherboards perform the initialization correctly and work fine 124with this option enabled. 125.Pp 126Per target configuration performed in the 127.Tn SCSI-Select 128menu, accessible at boot 129in 130.No non- Ns Tn EISA 131models, 132or through an 133.Tn EISA 134configuration utility for 135.Tn EISA 136models, 137is honored by this driver with the stipulation that the 138.Tn BIOS 139must be enabled for 140.Tn EISA 141adaptors. 142This includes synchronous/asynchronous transfers, maximum synchronous 143negotiation rate, disconnection, the host adapter's SCSI ID, and, 144in the case of 145.Tn EISA 146Twin Channel controllers, the primary channel selection. 147.Pp 148Performance and feature sets vary throughout the aic7xxx product line. 149The following table provides a comparison of the different chips 150supported by the 151.Nm 152driver. 153Note that wide and twin channel features, although always supported by a 154particular chip, may be disabled in a particular motherboard or card design. 155.Pp 156.Bd -filled -offset indent 157.Bl -column "aic7770 " "10 " "EISA/VL " "10MHz " "16bit " "SCBs " Features 158.Em "Chip MIPS Bus MaxSync MaxWidth SCBs Features" 159aic7770 10 EISA/VL 10MHz 16Bit 4 1 160aic7850 10 PCI/32 10MHz 8Bit 3 161aic7860 10 PCI/32 20MHz 8Bit 3 162aic7870 10 PCI/32 10MHz 16Bit 16 163aic7880 10 PCI/32 20MHz 16Bit 16 164aic7890 20 PCI/32 40MHz 16Bit 16 3 4 5 6 7 165aic7891 20 PCI/64 40MHz 16Bit 16 3 4 5 6 7 166aic7895 15 PCI/32 20MHz 16Bit 16 2 3 4 5 167aic7896 20 PCI/32 40MHz 16Bit 16 2 3 4 5 6 7 168aic7897 20 PCI/64 40MHz 16Bit 16 2 3 4 5 6 7 169.El 170.Pp 171.Bl -enum -compact 172.It 173Multiplexed Twin Channel Device - One controller servicing two busses. 174.It 175Multi-function Twin Channel Device - Two controllers on one chip. 176.It 177Command Channel Secondary DMA Engine - Allows scatter gather list and 178SCB prefetch. 179.It 18064 Byte SCB Support - SCSI CDB is embedded in the SCB to eliminate an extra DMA. 181.It 182Block Move Instruction Support - Doubles the speed of certain sequencer 183operations. 184.It 185.Sq Bayonet 186style Scatter Gather Engine - Improves S/G prefetch performance. 187.It 188Queuing Registers - Allows queuing of new transactions without pausing the 189sequencer. 190.El 191.Ed 192.Sh SCSI CONTROL BLOCKS (SCBs) 193Every transaction sent to a device on the SCSI bus is assigned a 194.Sq SCSI Control Block 195(SCB). 196The SCB contains all of the information required by the 197controller to process a transaction. 198The chip feature table lists the number of SCBs that can be stored 199in on chip memory. 200All chips with model numbers greater than or equal to 7870 allow for the 201on-chip SCB space to be augmented with external SRAM up to a 202maximum of 255 SCBs. 203Very few Adaptec controller have external SRAM. 204.Pp 205If external SRAM is not available, SCBs are a limited resource and 206using them in a straight forward manner would only allow us to 207keep as many transactions as there are SCBs outstanding at a time. 208This would not allow enough concurrency to fully utilize the SCSI 209bus and its devices. 210The solution to this problem is 211.Em SCB Paging , 212a concept similar to memory paging. 213SCB paging takes advantage of the fact that devices usually disconnect from 214the SCSI bus for long periods of time without talking to the controller. 215The SCBs for disconnected transactions are only of use to the controller 216when the transfer is resumed. 217When the host queues another transaction for the controller to execute, 218the controller firmware will use a free SCB if one is available. 219Otherwise, the state of the most recently disconnected (and therefore most 220likely to stay disconnected) SCB is saved, via DMA, to host memory, 221and the local SCB reused to start the new transaction. 222This allows the controller to queue up to 255 transactions regardless 223of the amount of SCB space. 224Since the local SCB space serves as a cache for disconnected transactions, 225the more SCB space available, the less host bus traffic consumed saving 226and restoring SCB data. 227.Sh SEE ALSO 228.Xr aha 4 , 229.Xr ahb 4 230.Sh AUTHORS 231The 232.Nm 233driver, the 234.Tn AIC7xxx 235sequencer-code assembler, and the firmware running on the aic7xxx chips 236were written by 237.An Justin T. Gibbs . 238.Sh BUGS 239Some Quantum drives (at least the Empire 2100 and 1080s) will not run on an 240.Tn AIC7870 241Rev B in synchronous mode at 10MHz. 242Controllers with this problem have a 42 MHz clock crystal on them and 243run slightly above 10MHz. 244This confuses the drive and hangs the bus. 245Setting a maximum synchronous negotiation rate of 8MHz in the 246.Tn SCSI-Select 247utility will allow normal operation. 248