xref: /openbsd-src/lib/libc/arch/sparc64/gen/_atomic_lock.c (revision 7e321ac128fdcd388c62dfa54aca790ebbd73ce1)
1*7e321ac1Sguenther /*	$OpenBSD: _atomic_lock.c,v 1.1 2017/08/15 06:13:24 guenther Exp $	*/
2*7e321ac1Sguenther /* David Leonard, <d@csee.uq.edu.au>. Public domain. */
3*7e321ac1Sguenther 
4*7e321ac1Sguenther /*
5*7e321ac1Sguenther  * Atomic lock for sparc64
6*7e321ac1Sguenther  */
7*7e321ac1Sguenther 
8*7e321ac1Sguenther #include <machine/spinlock.h>
9*7e321ac1Sguenther 
10*7e321ac1Sguenther int
_atomic_lock(volatile _atomic_lock_t * lock)11*7e321ac1Sguenther _atomic_lock(volatile _atomic_lock_t * lock)
12*7e321ac1Sguenther {
13*7e321ac1Sguenther 	_atomic_lock_t old;
14*7e321ac1Sguenther 
15*7e321ac1Sguenther 	/*
16*7e321ac1Sguenther 	 *  "  ldstub  [address], reg_rd
17*7e321ac1Sguenther 	 *
18*7e321ac1Sguenther 	 *  The atomic load-store instructions copy a byte from memory
19*7e321ac1Sguenther 	 *  into r[rd]m then rewrite the addressed byte in memory to all
20*7e321ac1Sguenther 	 *  ones [_ATOMIC_LOCK_LOCKED]. The operation is performed
21*7e321ac1Sguenther 	 *  atomically, that is, without allowing intervening interrupts
22*7e321ac1Sguenther 	 *  or deferred traps. In a multiprocessor system, two or more
23*7e321ac1Sguenther 	 *  processors executing atomic load-store unsigned byte [...]
24*7e321ac1Sguenther 	 *  addressing the same byte [...] simultaneously are guaranteed
25*7e321ac1Sguenther 	 *  to execute them in an undefined, but serial order."
26*7e321ac1Sguenther 	 *    - p101, The SPARC Architecture Manual (version 8) Prentice-Hall
27*7e321ac1Sguenther 	 *
28*7e321ac1Sguenther 	 * "LDSTUB loads a byte value from memory to a register and writes
29*7e321ac1Sguenther 	 *  the value FF_16 into the addressed byte atomically. LDSTUB
30*7e321ac1Sguenther 	 *  is the classic test-and-set instruction. Like SWAP, it has
31*7e321ac1Sguenther 	 *  a consensus number of two and so cannot resolve more than
32*7e321ac1Sguenther 	 *  two contending processes in a wait-free fashion."
33*7e321ac1Sguenther 	 *    - p129, The SPARC Architecture Manual (version 9) Prentice-Hall
34*7e321ac1Sguenther 	 *  (See also section J.6 (spinlocks))
35*7e321ac1Sguenther 	 *
36*7e321ac1Sguenther 	 * (No change to the condition codes are documented.)
37*7e321ac1Sguenther 	 */
38*7e321ac1Sguenther 	__asm__("ldstub [%1], %0" : "=&r" (old) : "r" (lock) : "memory");
39*7e321ac1Sguenther 
40*7e321ac1Sguenther 	return (old == _ATOMIC_LOCK_LOCKED);
41*7e321ac1Sguenther }
42