xref: /openbsd-src/lib/libc/arch/sparc64/fpu/fpu_div.c (revision 4c1e55dc91edd6e69ccc60ce855900fbc12cf34f)
1 /*	$OpenBSD: fpu_div.c,v 1.1 2003/07/21 18:41:30 jason Exp $	*/
2 
3 /*
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This software was developed by the Computer Systems Engineering group
8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9  * contributed to Berkeley.
10  *
11  * All advertising materials mentioning features or use of this software
12  * must display the following acknowledgement:
13  *	This product includes software developed by the University of
14  *	California, Lawrence Berkeley Laboratory.
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions
18  * are met:
19  * 1. Redistributions of source code must retain the above copyright
20  *    notice, this list of conditions and the following disclaimer.
21  * 2. Redistributions in binary form must reproduce the above copyright
22  *    notice, this list of conditions and the following disclaimer in the
23  *    documentation and/or other materials provided with the distribution.
24  * 3. All advertising materials mentioning features or use of this software
25  *    must display the following acknowledgement:
26  *	This product includes software developed by the University of
27  *	California, Berkeley and its contributors.
28  * 4. Neither the name of the University nor the names of its contributors
29  *    may be used to endorse or promote products derived from this software
30  *    without specific prior written permission.
31  *
32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42  * SUCH DAMAGE.
43  *
44  *	@(#)fpu_div.c	8.1 (Berkeley) 6/11/93
45  *	$NetBSD: fpu_div.c,v 1.2 1994/11/20 20:52:38 deraadt Exp $
46  */
47 
48 #include <sys/cdefs.h>
49 #if 0
50 __FBSDID("$FreeBSD: src/lib/libc/sparc64/fpu/fpu_div.c,v 1.3 2002/03/22 21:52:58 obrien Exp $");
51 #endif
52 
53 /*
54  * Perform an FPU divide (return x / y).
55  */
56 
57 #include <sys/types.h>
58 
59 #include <machine/frame.h>
60 #include <machine/fsr.h>
61 
62 #include "fpu_arith.h"
63 #include "fpu_emu.h"
64 #include "fpu_extern.h"
65 
66 /*
67  * Division of normal numbers is done as follows:
68  *
69  * x and y are floating point numbers, i.e., in the form 1.bbbb * 2^e.
70  * If X and Y are the mantissas (1.bbbb's), the quotient is then:
71  *
72  *	q = (X / Y) * 2^((x exponent) - (y exponent))
73  *
74  * Since X and Y are both in [1.0,2.0), the quotient's mantissa (X / Y)
75  * will be in [0.5,2.0).  Moreover, it will be less than 1.0 if and only
76  * if X < Y.  In that case, it will have to be shifted left one bit to
77  * become a normal number, and the exponent decremented.  Thus, the
78  * desired exponent is:
79  *
80  *	left_shift = x->fp_mant < y->fp_mant;
81  *	result_exp = x->fp_exp - y->fp_exp - left_shift;
82  *
83  * The quotient mantissa X/Y can then be computed one bit at a time
84  * using the following algorithm:
85  *
86  *	Q = 0;			-- Initial quotient.
87  *	R = X;			-- Initial remainder,
88  *	if (left_shift)		--   but fixed up in advance.
89  *		R *= 2;
90  *	for (bit = FP_NMANT; --bit >= 0; R *= 2) {
91  *		if (R >= Y) {
92  *			Q |= 1 << bit;
93  *			R -= Y;
94  *		}
95  *	}
96  *
97  * The subtraction R -= Y always removes the uppermost bit from R (and
98  * can sometimes remove additional lower-order 1 bits); this proof is
99  * left to the reader.
100  *
101  * This loop correctly calculates the guard and round bits since they are
102  * included in the expanded internal representation.  The sticky bit
103  * is to be set if and only if any other bits beyond guard and round
104  * would be set.  From the above it is obvious that this is true if and
105  * only if the remainder R is nonzero when the loop terminates.
106  *
107  * Examining the loop above, we can see that the quotient Q is built
108  * one bit at a time ``from the top down''.  This means that we can
109  * dispense with the multi-word arithmetic and just build it one word
110  * at a time, writing each result word when it is done.
111  *
112  * Furthermore, since X and Y are both in [1.0,2.0), we know that,
113  * initially, R >= Y.  (Recall that, if X < Y, R is set to X * 2 and
114  * is therefore at in [2.0,4.0).)  Thus Q is sure to have bit FP_NMANT-1
115  * set, and R can be set initially to either X - Y (when X >= Y) or
116  * 2X - Y (when X < Y).  In addition, comparing R and Y is difficult,
117  * so we will simply calculate R - Y and see if that underflows.
118  * This leads to the following revised version of the algorithm:
119  *
120  *	R = X;
121  *	bit = FP_1;
122  *	D = R - Y;
123  *	if (D >= 0) {
124  *		result_exp = x->fp_exp - y->fp_exp;
125  *		R = D;
126  *		q = bit;
127  *		bit >>= 1;
128  *	} else {
129  *		result_exp = x->fp_exp - y->fp_exp - 1;
130  *		q = 0;
131  *	}
132  *	R <<= 1;
133  *	do  {
134  *		D = R - Y;
135  *		if (D >= 0) {
136  *			q |= bit;
137  *			R = D;
138  *		}
139  *		R <<= 1;
140  *	} while ((bit >>= 1) != 0);
141  *	Q[0] = q;
142  *	for (i = 1; i < 4; i++) {
143  *		q = 0, bit = 1 << 31;
144  *		do {
145  *			D = R - Y;
146  *			if (D >= 0) {
147  *				q |= bit;
148  *				R = D;
149  *			}
150  *			R <<= 1;
151  *		} while ((bit >>= 1) != 0);
152  *		Q[i] = q;
153  *	}
154  *
155  * This can be refined just a bit further by moving the `R <<= 1'
156  * calculations to the front of the do-loops and eliding the first one.
157  * The process can be terminated immediately whenever R becomes 0, but
158  * this is relatively rare, and we do not bother.
159  */
160 
161 struct fpn *
162 __fpu_div(fe)
163 	struct fpemu *fe;
164 {
165 	struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2;
166 	u_int q, bit;
167 	u_int r0, r1, r2, r3, d0, d1, d2, d3, y0, y1, y2, y3;
168 	FPU_DECL_CARRY
169 
170 	/*
171 	 * Since divide is not commutative, we cannot just use ORDER.
172 	 * Check either operand for NaN first; if there is at least one,
173 	 * order the signalling one (if only one) onto the right, then
174 	 * return it.  Otherwise we have the following cases:
175 	 *
176 	 *	Inf / Inf = NaN, plus NV exception
177 	 *	Inf / num = Inf [i.e., return x]
178 	 *	Inf / 0   = Inf [i.e., return x]
179 	 *	0 / Inf = 0 [i.e., return x]
180 	 *	0 / num = 0 [i.e., return x]
181 	 *	0 / 0   = NaN, plus NV exception
182 	 *	num / Inf = 0
183 	 *	num / num = num (do the divide)
184 	 *	num / 0   = Inf, plus DZ exception
185 	 */
186 	if (ISNAN(x) || ISNAN(y)) {
187 		ORDER(x, y);
188 		return (y);
189 	}
190 	if (ISINF(x) || ISZERO(x)) {
191 		if (x->fp_class == y->fp_class)
192 			return (__fpu_newnan(fe));
193 		return (x);
194 	}
195 
196 	/* all results at this point use XOR of operand signs */
197 	x->fp_sign ^= y->fp_sign;
198 	if (ISINF(y)) {
199 		x->fp_class = FPC_ZERO;
200 		return (x);
201 	}
202 	if (ISZERO(y)) {
203 		fe->fe_cx = FSR_DZ;
204 		x->fp_class = FPC_INF;
205 		return (x);
206 	}
207 
208 	/*
209 	 * Macros for the divide.  See comments at top for algorithm.
210 	 * Note that we expand R, D, and Y here.
211 	 */
212 
213 #define	SUBTRACT		/* D = R - Y */ \
214 	FPU_SUBS(d3, r3, y3); FPU_SUBCS(d2, r2, y2); \
215 	FPU_SUBCS(d1, r1, y1); FPU_SUBC(d0, r0, y0)
216 
217 #define	NONNEGATIVE		/* D >= 0 */ \
218 	((int)d0 >= 0)
219 
220 #ifdef FPU_SHL1_BY_ADD
221 #define	SHL1			/* R <<= 1 */ \
222 	FPU_ADDS(r3, r3, r3); FPU_ADDCS(r2, r2, r2); \
223 	FPU_ADDCS(r1, r1, r1); FPU_ADDC(r0, r0, r0)
224 #else
225 #define	SHL1 \
226 	r0 = (r0 << 1) | (r1 >> 31), r1 = (r1 << 1) | (r2 >> 31), \
227 	r2 = (r2 << 1) | (r3 >> 31), r3 <<= 1
228 #endif
229 
230 #define	LOOP			/* do ... while (bit >>= 1) */ \
231 	do { \
232 		SHL1; \
233 		SUBTRACT; \
234 		if (NONNEGATIVE) { \
235 			q |= bit; \
236 			r0 = d0, r1 = d1, r2 = d2, r3 = d3; \
237 		} \
238 	} while ((bit >>= 1) != 0)
239 
240 #define	WORD(r, i)			/* calculate r->fp_mant[i] */ \
241 	q = 0; \
242 	bit = 1 << 31; \
243 	LOOP; \
244 	(x)->fp_mant[i] = q
245 
246 	/* Setup.  Note that we put our result in x. */
247 	r0 = x->fp_mant[0];
248 	r1 = x->fp_mant[1];
249 	r2 = x->fp_mant[2];
250 	r3 = x->fp_mant[3];
251 	y0 = y->fp_mant[0];
252 	y1 = y->fp_mant[1];
253 	y2 = y->fp_mant[2];
254 	y3 = y->fp_mant[3];
255 
256 	bit = FP_1;
257 	SUBTRACT;
258 	if (NONNEGATIVE) {
259 		x->fp_exp -= y->fp_exp;
260 		r0 = d0, r1 = d1, r2 = d2, r3 = d3;
261 		q = bit;
262 		bit >>= 1;
263 	} else {
264 		x->fp_exp -= y->fp_exp + 1;
265 		q = 0;
266 	}
267 	LOOP;
268 	x->fp_mant[0] = q;
269 	WORD(x, 1);
270 	WORD(x, 2);
271 	WORD(x, 3);
272 	x->fp_sticky = r0 | r1 | r2 | r3;
273 
274 	return (x);
275 }
276