1*6244ddccSmiod /* $OpenBSD: fpu_compare.c,v 1.4 2024/03/29 21:02:11 miod Exp $ */
202b90beaSjason
302b90beaSjason /*
402b90beaSjason * Copyright (c) 1992, 1993
502b90beaSjason * The Regents of the University of California. All rights reserved.
602b90beaSjason *
702b90beaSjason * This software was developed by the Computer Systems Engineering group
802b90beaSjason * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
902b90beaSjason * contributed to Berkeley.
1002b90beaSjason *
1102b90beaSjason * All advertising materials mentioning features or use of this software
1202b90beaSjason * must display the following acknowledgement:
1302b90beaSjason * This product includes software developed by the University of
1402b90beaSjason * California, Lawrence Berkeley Laboratory.
1502b90beaSjason *
1602b90beaSjason * Redistribution and use in source and binary forms, with or without
1702b90beaSjason * modification, are permitted provided that the following conditions
1802b90beaSjason * are met:
1902b90beaSjason * 1. Redistributions of source code must retain the above copyright
2002b90beaSjason * notice, this list of conditions and the following disclaimer.
2102b90beaSjason * 2. Redistributions in binary form must reproduce the above copyright
2202b90beaSjason * notice, this list of conditions and the following disclaimer in the
2302b90beaSjason * documentation and/or other materials provided with the distribution.
2402b90beaSjason * 3. All advertising materials mentioning features or use of this software
2502b90beaSjason * must display the following acknowledgement:
2602b90beaSjason * This product includes software developed by the University of
2702b90beaSjason * California, Berkeley and its contributors.
2802b90beaSjason * 4. Neither the name of the University nor the names of its contributors
2902b90beaSjason * may be used to endorse or promote products derived from this software
3002b90beaSjason * without specific prior written permission.
3102b90beaSjason *
3202b90beaSjason * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
3302b90beaSjason * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
3402b90beaSjason * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
3502b90beaSjason * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
3602b90beaSjason * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
3702b90beaSjason * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
3802b90beaSjason * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
3902b90beaSjason * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
4002b90beaSjason * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
4102b90beaSjason * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
4202b90beaSjason * SUCH DAMAGE.
4302b90beaSjason *
4402b90beaSjason * @(#)fpu_compare.c 8.1 (Berkeley) 6/11/93
4502b90beaSjason * $NetBSD: fpu_compare.c,v 1.3 2001/08/26 05:46:31 eeh Exp $
4602b90beaSjason */
4702b90beaSjason
4802b90beaSjason /*
4902b90beaSjason * CMP and CMPE instructions.
5002b90beaSjason *
5102b90beaSjason * These rely on the fact that our internal wide format is achieved by
5202b90beaSjason * adding zero bits to the end of narrower mantissas.
5302b90beaSjason */
5402b90beaSjason
5502b90beaSjason #include <sys/types.h>
5602b90beaSjason
5702b90beaSjason #include <machine/fsr.h>
5802b90beaSjason
5902b90beaSjason #include "fpu_arith.h"
6002b90beaSjason #include "fpu_emu.h"
6102b90beaSjason #include "fpu_extern.h"
6202b90beaSjason
6302b90beaSjason static u_long fcc_nmask[] = {
6402b90beaSjason ~FSR_FCC,
6502b90beaSjason ~FSR_FCC1,
6602b90beaSjason ~FSR_FCC2,
6702b90beaSjason ~FSR_FCC3
6802b90beaSjason };
6902b90beaSjason
7002b90beaSjason /* XXX: we don't use the FSR_FCCx macros here; it's much easier this way. */
7102b90beaSjason static int fcc_shift[] = {
7202b90beaSjason FSR_FCC_SHIFT,
7302b90beaSjason FSR_FCC1_SHIFT,
7402b90beaSjason FSR_FCC2_SHIFT,
7502b90beaSjason FSR_FCC3_SHIFT
7602b90beaSjason };
7702b90beaSjason
7802b90beaSjason /*
7902b90beaSjason * Perform a compare instruction (with or without unordered exception).
8002b90beaSjason * This updates the fcc field in the fsr.
8102b90beaSjason *
8202b90beaSjason * If either operand is NaN, the result is unordered. For cmpe, this
8302b90beaSjason * causes an NV exception. Everything else is ordered:
8402b90beaSjason * |Inf| > |numbers| > |0|.
8502b90beaSjason * We already arranged for fp_class(Inf) > fp_class(numbers) > fp_class(0),
8602b90beaSjason * so we get this directly. Note, however, that two zeros compare equal
8702b90beaSjason * regardless of sign, while everything else depends on sign.
8802b90beaSjason *
8902b90beaSjason * Incidentally, two Infs of the same sign compare equal (per the 80387
9002b90beaSjason * manual---it would be nice if the SPARC documentation were more
9102b90beaSjason * complete).
9202b90beaSjason */
9302b90beaSjason void
__fpu_compare(struct fpemu * fe,int cmpe,int fcc)9402b90beaSjason __fpu_compare(struct fpemu *fe, int cmpe, int fcc)
9502b90beaSjason {
9602b90beaSjason struct fpn *a, *b;
9702b90beaSjason int cc;
9802b90beaSjason FPU_DECL_CARRY
9902b90beaSjason
10002b90beaSjason a = &fe->fe_f1;
10102b90beaSjason b = &fe->fe_f2;
10202b90beaSjason
10302b90beaSjason if (ISNAN(a) || ISNAN(b)) {
10402b90beaSjason /*
10502b90beaSjason * In any case, we already got an exception for signalling
10602b90beaSjason * NaNs; here we may replace that one with an identical
10702b90beaSjason * exception, but so what?.
10802b90beaSjason */
10902b90beaSjason if (cmpe)
11002b90beaSjason fe->fe_cx = FSR_NV;
11102b90beaSjason cc = FSR_CC_UO;
11202b90beaSjason goto done;
11302b90beaSjason }
11402b90beaSjason
11502b90beaSjason /*
11602b90beaSjason * Must handle both-zero early to avoid sign goofs. Otherwise,
11702b90beaSjason * at most one is 0, and if the signs differ we are done.
11802b90beaSjason */
11902b90beaSjason if (ISZERO(a) && ISZERO(b)) {
12002b90beaSjason cc = FSR_CC_EQ;
12102b90beaSjason goto done;
12202b90beaSjason }
12302b90beaSjason if (a->fp_sign) { /* a < 0 (or -0) */
12402b90beaSjason if (!b->fp_sign) { /* b >= 0 (or if a = -0, b > 0) */
12502b90beaSjason cc = FSR_CC_LT;
12602b90beaSjason goto done;
12702b90beaSjason }
12802b90beaSjason } else { /* a > 0 (or +0) */
12902b90beaSjason if (b->fp_sign) { /* b <= -0 (or if a = +0, b < 0) */
13002b90beaSjason cc = FSR_CC_GT;
13102b90beaSjason goto done;
13202b90beaSjason }
13302b90beaSjason }
13402b90beaSjason
13502b90beaSjason /*
13602b90beaSjason * Now the signs are the same (but may both be negative). All
13702b90beaSjason * we have left are these cases:
13802b90beaSjason *
13902b90beaSjason * |a| < |b| [classes or values differ]
14002b90beaSjason * |a| > |b| [classes or values differ]
14102b90beaSjason * |a| == |b| [classes and values identical]
14202b90beaSjason *
14302b90beaSjason * We define `diff' here to expand these as:
14402b90beaSjason *
14502b90beaSjason * |a| < |b|, a,b >= 0: a < b => FSR_CC_LT
14602b90beaSjason * |a| < |b|, a,b < 0: a > b => FSR_CC_GT
14702b90beaSjason * |a| > |b|, a,b >= 0: a > b => FSR_CC_GT
14802b90beaSjason * |a| > |b|, a,b < 0: a < b => FSR_CC_LT
14902b90beaSjason */
15002b90beaSjason #define opposite_cc(cc) ((cc) == FSR_CC_LT ? FSR_CC_GT : FSR_CC_LT)
15102b90beaSjason #define diff(magnitude) (a->fp_sign ? opposite_cc(magnitude) : (magnitude))
15202b90beaSjason if (a->fp_class < b->fp_class) { /* |a| < |b| */
15302b90beaSjason cc = diff(FSR_CC_LT);
15402b90beaSjason goto done;
15502b90beaSjason }
15602b90beaSjason if (a->fp_class > b->fp_class) { /* |a| > |b| */
15702b90beaSjason cc = diff(FSR_CC_GT);
15802b90beaSjason goto done;
15902b90beaSjason }
16002b90beaSjason /* now none can be 0: only Inf and numbers remain */
16102b90beaSjason if (ISINF(a)) { /* |Inf| = |Inf| */
16202b90beaSjason cc = FSR_CC_EQ;
16302b90beaSjason goto done;
16402b90beaSjason }
16502b90beaSjason /*
16602b90beaSjason * Only numbers remain. To compare two numbers in magnitude, we
16702b90beaSjason * simply subtract them.
16802b90beaSjason */
16902b90beaSjason a = __fpu_sub(fe);
17002b90beaSjason if (a->fp_class == FPC_ZERO)
17102b90beaSjason cc = FSR_CC_EQ;
17202b90beaSjason else
17302b90beaSjason cc = diff(FSR_CC_GT);
17402b90beaSjason
17502b90beaSjason done:
17602b90beaSjason fe->fe_fsr = (fe->fe_fsr & fcc_nmask[fcc]) |
17702b90beaSjason ((u_long)cc << fcc_shift[fcc]);
17802b90beaSjason }
179