xref: /openbsd-src/lib/libc/arch/sparc64/fpu/fpu_add.c (revision 91f110e064cd7c194e59e019b83bb7496c1c84d4)
1 /*	$OpenBSD: fpu_add.c,v 1.2 2012/12/05 23:19:59 deraadt Exp $	*/
2 
3 /*
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This software was developed by the Computer Systems Engineering group
8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9  * contributed to Berkeley.
10  *
11  * All advertising materials mentioning features or use of this software
12  * must display the following acknowledgement:
13  *	This product includes software developed by the University of
14  *	California, Lawrence Berkeley Laboratory.
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions
18  * are met:
19  * 1. Redistributions of source code must retain the above copyright
20  *    notice, this list of conditions and the following disclaimer.
21  * 2. Redistributions in binary form must reproduce the above copyright
22  *    notice, this list of conditions and the following disclaimer in the
23  *    documentation and/or other materials provided with the distribution.
24  * 3. All advertising materials mentioning features or use of this software
25  *    must display the following acknowledgement:
26  *	This product includes software developed by the University of
27  *	California, Berkeley and its contributors.
28  * 4. Neither the name of the University nor the names of its contributors
29  *    may be used to endorse or promote products derived from this software
30  *    without specific prior written permission.
31  *
32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42  * SUCH DAMAGE.
43  *
44  *	@(#)fpu_add.c	8.1 (Berkeley) 6/11/93
45  *	$NetBSD: fpu_add.c,v 1.3 1996/03/14 19:41:52 christos Exp $
46  */
47 
48 #if 0
49 __FBSDID("$FreeBSD: src/lib/libc/sparc64/fpu/fpu_add.c,v 1.4 2002/04/27 21:56:28 jake Exp $");
50 #endif
51 
52 /*
53  * Perform an FPU add (return x + y).
54  *
55  * To subtract, negate y and call add.
56  */
57 
58 #include <sys/param.h>
59 
60 #include <machine/frame.h>
61 #include <machine/fsr.h>
62 #include <machine/instr.h>
63 
64 #include "fpu_arith.h"
65 #include "fpu_emu.h"
66 #include "fpu_extern.h"
67 
68 struct fpn *
69 __fpu_add(fe)
70 	struct fpemu *fe;
71 {
72 	struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2, *r;
73 	u_int r0, r1, r2, r3;
74 	int rd;
75 
76 	/*
77 	 * Put the `heavier' operand on the right (see fpu_emu.h).
78 	 * Then we will have one of the following cases, taken in the
79 	 * following order:
80 	 *
81 	 *  - y = NaN.  Implied: if only one is a signalling NaN, y is.
82 	 *	The result is y.
83 	 *  - y = Inf.  Implied: x != NaN (is 0, number, or Inf: the NaN
84 	 *    case was taken care of earlier).
85 	 *	If x = -y, the result is NaN.  Otherwise the result
86 	 *	is y (an Inf of whichever sign).
87 	 *  - y is 0.  Implied: x = 0.
88 	 *	If x and y differ in sign (one positive, one negative),
89 	 *	the result is +0 except when rounding to -Inf.  If same:
90 	 *	+0 + +0 = +0; -0 + -0 = -0.
91 	 *  - x is 0.  Implied: y != 0.
92 	 *	Result is y.
93 	 *  - other.  Implied: both x and y are numbers.
94 	 *	Do addition a la Hennessey & Patterson.
95 	 */
96 	ORDER(x, y);
97 	if (ISNAN(y))
98 		return (y);
99 	if (ISINF(y)) {
100 		if (ISINF(x) && x->fp_sign != y->fp_sign)
101 			return (__fpu_newnan(fe));
102 		return (y);
103 	}
104 	rd = FSR_GET_RD(fe->fe_fsr);
105 	if (ISZERO(y)) {
106 		if (rd != FSR_RD_RM)	/* only -0 + -0 gives -0 */
107 			y->fp_sign &= x->fp_sign;
108 		else			/* any -0 operand gives -0 */
109 			y->fp_sign |= x->fp_sign;
110 		return (y);
111 	}
112 	if (ISZERO(x))
113 		return (y);
114 	/*
115 	 * We really have two numbers to add, although their signs may
116 	 * differ.  Make the exponents match, by shifting the smaller
117 	 * number right (e.g., 1.011 => 0.1011) and increasing its
118 	 * exponent (2^3 => 2^4).  Note that we do not alter the exponents
119 	 * of x and y here.
120 	 */
121 	r = &fe->fe_f3;
122 	r->fp_class = FPC_NUM;
123 	if (x->fp_exp == y->fp_exp) {
124 		r->fp_exp = x->fp_exp;
125 		r->fp_sticky = 0;
126 	} else {
127 		if (x->fp_exp < y->fp_exp) {
128 			/*
129 			 * Try to avoid subtract case iii (see below).
130 			 * This also guarantees that x->fp_sticky = 0.
131 			 */
132 			SWAP(x, y);
133 		}
134 		/* now x->fp_exp > y->fp_exp */
135 		r->fp_exp = x->fp_exp;
136 		r->fp_sticky = __fpu_shr(y, x->fp_exp - y->fp_exp);
137 	}
138 	r->fp_sign = x->fp_sign;
139 	if (x->fp_sign == y->fp_sign) {
140 		FPU_DECL_CARRY
141 
142 		/*
143 		 * The signs match, so we simply add the numbers.  The result
144 		 * may be `supernormal' (as big as 1.111...1 + 1.111...1, or
145 		 * 11.111...0).  If so, a single bit shift-right will fix it
146 		 * (but remember to adjust the exponent).
147 		 */
148 		/* r->fp_mant = x->fp_mant + y->fp_mant */
149 		FPU_ADDS(r->fp_mant[3], x->fp_mant[3], y->fp_mant[3]);
150 		FPU_ADDCS(r->fp_mant[2], x->fp_mant[2], y->fp_mant[2]);
151 		FPU_ADDCS(r->fp_mant[1], x->fp_mant[1], y->fp_mant[1]);
152 		FPU_ADDC(r0, x->fp_mant[0], y->fp_mant[0]);
153 		if ((r->fp_mant[0] = r0) >= FP_2) {
154 			(void) __fpu_shr(r, 1);
155 			r->fp_exp++;
156 		}
157 	} else {
158 		FPU_DECL_CARRY
159 
160 		/*
161 		 * The signs differ, so things are rather more difficult.
162 		 * H&P would have us negate the negative operand and add;
163 		 * this is the same as subtracting the negative operand.
164 		 * This is quite a headache.  Instead, we will subtract
165 		 * y from x, regardless of whether y itself is the negative
166 		 * operand.  When this is done one of three conditions will
167 		 * hold, depending on the magnitudes of x and y:
168 		 *   case i)   |x| > |y|.  The result is just x - y,
169 		 *	with x's sign, but it may need to be normalized.
170 		 *   case ii)  |x| = |y|.  The result is 0 (maybe -0)
171 		 *	so must be fixed up.
172 		 *   case iii) |x| < |y|.  We goofed; the result should
173 		 *	be (y - x), with the same sign as y.
174 		 * We could compare |x| and |y| here and avoid case iii,
175 		 * but that would take just as much work as the subtract.
176 		 * We can tell case iii has occurred by an overflow.
177 		 *
178 		 * N.B.: since x->fp_exp >= y->fp_exp, x->fp_sticky = 0.
179 		 */
180 		/* r->fp_mant = x->fp_mant - y->fp_mant */
181 		FPU_SET_CARRY(y->fp_sticky);
182 		FPU_SUBCS(r3, x->fp_mant[3], y->fp_mant[3]);
183 		FPU_SUBCS(r2, x->fp_mant[2], y->fp_mant[2]);
184 		FPU_SUBCS(r1, x->fp_mant[1], y->fp_mant[1]);
185 		FPU_SUBC(r0, x->fp_mant[0], y->fp_mant[0]);
186 		if (r0 < FP_2) {
187 			/* cases i and ii */
188 			if ((r0 | r1 | r2 | r3) == 0) {
189 				/* case ii */
190 				r->fp_class = FPC_ZERO;
191 				r->fp_sign = rd == FSR_RD_RM;
192 				return (r);
193 			}
194 		} else {
195 			/*
196 			 * Oops, case iii.  This can only occur when the
197 			 * exponents were equal, in which case neither
198 			 * x nor y have sticky bits set.  Flip the sign
199 			 * (to y's sign) and negate the result to get y - x.
200 			 */
201 #ifdef DIAGNOSTIC
202 			if (x->fp_exp != y->fp_exp || r->fp_sticky)
203 				__utrap_panic("fpu_add");
204 #endif
205 			r->fp_sign = y->fp_sign;
206 			FPU_SUBS(r3, 0, r3);
207 			FPU_SUBCS(r2, 0, r2);
208 			FPU_SUBCS(r1, 0, r1);
209 			FPU_SUBC(r0, 0, r0);
210 		}
211 		r->fp_mant[3] = r3;
212 		r->fp_mant[2] = r2;
213 		r->fp_mant[1] = r1;
214 		r->fp_mant[0] = r0;
215 		if (r0 < FP_1)
216 			__fpu_norm(r);
217 	}
218 	return (r);
219 }
220