xref: /openbsd-src/lib/libc/arch/mips64/gen/setjmp.S (revision f2da64fbbbf1b03f09f390ab01267c93dfd77c4c)
1/*	$OpenBSD: setjmp.S,v 1.11 2016/05/30 02:06:02 guenther Exp $ */
2
3/*
4 * Copyright (c) 2001-2002 Opsycon AB  (www.opsycon.se / www.opsycon.com)
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 * 3. Neither the name of Opsycon AB nor the names of its contributors
15 *    may be used to endorse or promote products derived from this software
16 *    without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
19 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
20 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
22 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 */
31
32#include "SYS.h"
33#include <machine/regnum.h>
34#include <machine/signal.h>
35
36	.section	.openbsd.randomdata,"aw",@progbits
37	.balign	8
38	.globl	__jmpxor
39	.hidden	__jmpxor
40__jmpxor:
41	.space	3*REGSZ			# (28/gp, 29/sp, 31/ra)
42	.size	__jmpxor, . - __jmpxor
43	.type	__jmpxor,@object
44	.text
45
46/*
47 * setjmp, longjmp implementation for libc. this code depends
48 * on the layout of the struct sigcontext in machine/signal.h.
49 */
50
51FRAMESZ= MKFSIZ(0,4)
52GPOFF= FRAMESZ-2*REGSZ
53
54LEAF(setjmp, FRAMESZ)
55	PTR_SUBU sp, FRAMESZ
56	SETUP_GP64(GPOFF, setjmp)
57	.set	noreorder
58
59	move	a2, a0				# save jmpbuf
60	li	a0, 1				# how = SIG_BLOCK
61	move	a1, zero			# get current signal mask
62	li	v0, SYS_sigprocmask
63	syscall					# mask in v0
64	bne	a3, zero, botch
65	REG_S	v0, SC_MASK(a2)			# save sc_mask
66
67	LI	v0, 0xACEDBADE			# sigcontext magic number
68	REG_S	v0, SC_REGS+ZERO*REGSZ(a2)
69	REG_S	s0, SC_REGS+S0*REGSZ(a2)
70	REG_S	s1, SC_REGS+S1*REGSZ(a2)
71	REG_S	s2, SC_REGS+S2*REGSZ(a2)
72	REG_S	s3, SC_REGS+S3*REGSZ(a2)
73	REG_S	s4, SC_REGS+S4*REGSZ(a2)
74	REG_S	s5, SC_REGS+S5*REGSZ(a2)
75	REG_S	s6, SC_REGS+S6*REGSZ(a2)
76	REG_S	s7, SC_REGS+S7*REGSZ(a2)
77	REG_S	s8, SC_REGS+S8*REGSZ(a2)
78	LA	t0, __jmpxor			# load cookie addr
79	REG_L	v0, 0(t0)			# load gp cookie
80	REG_L	v1, GPOFF(sp)
81	xor	v0, v0, v1
82	REG_S	v0, SC_REGS+GP*REGSZ(a2)
83	REG_L	v0, REGSZ(t0)			# load sp cookie over gp cookie
84	PTR_ADDU v1, sp, FRAMESZ
85	xor	v0, v0, v1
86	REG_S	v0, SC_REGS+SP*REGSZ(a2)
87	REG_L	t0, 2*REGSZ(t0)			# load ra cookie over addr
88	xor	t0, ra, t0
89	REG_S	t0, SC_PC(a2)
90	cfc1	t0, $31				# overwrite ra cookie
91#if _MIPS_FPSET == 32
92	sdc1	$f20, SC_FPREGS+((F20-F0)*REGSZ)(a2)
93	sdc1	$f21, SC_FPREGS+((F21-F0)*REGSZ)(a2)
94	sdc1	$f22, SC_FPREGS+((F22-F0)*REGSZ)(a2)
95	sdc1	$f23, SC_FPREGS+((F23-F0)*REGSZ)(a2)
96	sdc1	$f24, SC_FPREGS+((F24-F0)*REGSZ)(a2)
97	sdc1	$f25, SC_FPREGS+((F25-F0)*REGSZ)(a2)
98	sdc1	$f26, SC_FPREGS+((F26-F0)*REGSZ)(a2)
99	sdc1	$f27, SC_FPREGS+((F27-F0)*REGSZ)(a2)
100	sdc1	$f28, SC_FPREGS+((F28-F0)*REGSZ)(a2)
101	sdc1	$f29, SC_FPREGS+((F29-F0)*REGSZ)(a2)
102	sdc1	$f30, SC_FPREGS+((F30-F0)*REGSZ)(a2)
103	sdc1	$f31, SC_FPREGS+((F31-F0)*REGSZ)(a2)
104#else
105	swc1	$f20, SC_FPREGS+((F20-F0)*REGSZ)(a2)
106	swc1	$f21, SC_FPREGS+((F21-F0)*REGSZ)(a2)
107	swc1	$f22, SC_FPREGS+((F22-F0)*REGSZ)(a2)
108	swc1	$f23, SC_FPREGS+((F23-F0)*REGSZ)(a2)
109	swc1	$f24, SC_FPREGS+((F24-F0)*REGSZ)(a2)
110	swc1	$f25, SC_FPREGS+((F25-F0)*REGSZ)(a2)
111	swc1	$f26, SC_FPREGS+((F26-F0)*REGSZ)(a2)
112	swc1	$f27, SC_FPREGS+((F27-F0)*REGSZ)(a2)
113	swc1	$f28, SC_FPREGS+((F28-F0)*REGSZ)(a2)
114	swc1	$f29, SC_FPREGS+((F29-F0)*REGSZ)(a2)
115	swc1	$f30, SC_FPREGS+((F30-F0)*REGSZ)(a2)
116	swc1	$f31, SC_FPREGS+((F31-F0)*REGSZ)(a2)
117#endif
118	REG_S	t0, SC_FPREGS+((FSR-F0)*REGSZ)(a2)
119	RESTORE_GP64
120	PTR_ADDU sp, FRAMESZ
121	j	ra
122	move	v0, zero
123END_STRONG(setjmp)
124
125LEAF(longjmp, FRAMESZ)
126	PTR_SUBU sp, FRAMESZ
127	SETUP_GP64(GPOFF, longjmp)
128	.set    noreorder
129
130	move	a2, a0				# save jmpbuf
131	move	a4, a1				# save val
132	REG_L	a1, SC_MASK(a2)			# load sc_mask
133	li	a0, 3				# how = SIG_SETMASK
134	li	v0, SYS_sigprocmask
135	syscall
136	bne	a3, zero, botch
137
138	REG_L	v0, SC_REGS+ZERO*REGSZ(a2)
139	bne	v0, 0xACEDBADE, botch		# jump if error
140	LA	v0, __jmpxor			# load cookie addr
141	REG_L	v1, 2*REGSZ(v0)			# load ra cookie
142	REG_L	ra, SC_PC(a2)
143	xor	ra, ra, v1
144	REG_L	s0, SC_REGS+S0*REGSZ(a2)
145	REG_L	s1, SC_REGS+S1*REGSZ(a2)
146	REG_L	s2, SC_REGS+S2*REGSZ(a2)
147	REG_L	s3, SC_REGS+S3*REGSZ(a2)
148	REG_L	s4, SC_REGS+S4*REGSZ(a2)
149	REG_L	s5, SC_REGS+S5*REGSZ(a2)
150	REG_L	s6, SC_REGS+S6*REGSZ(a2)
151	REG_L	s7, SC_REGS+S7*REGSZ(a2)
152	REG_L	s8, SC_REGS+S8*REGSZ(a2)
153	REG_L	v1, 0(v0)			# load gp cookie over ra cookie
154	REG_L	gp, SC_REGS+GP*REGSZ(a2)
155	xor	gp, gp, v1
156	REG_L	v1, REGSZ(v0)			# load sp cookie over gp cookie
157	REG_L	sp, SC_REGS+SP*REGSZ(a2)
158	xor	sp, sp, v1
159	REG_L	v1, SC_FPREGS+((FSR-F0)*REGSZ)(a2)	# overwrite sp cookie
160	ctc1	v1, $31
161#if _MIPS_FPSET == 32
162	ldc1	$f20, SC_FPREGS+((F20-F0)*REGSZ)(a2)
163	ldc1	$f21, SC_FPREGS+((F21-F0)*REGSZ)(a2)
164	ldc1	$f22, SC_FPREGS+((F22-F0)*REGSZ)(a2)
165	ldc1	$f23, SC_FPREGS+((F23-F0)*REGSZ)(a2)
166	ldc1	$f24, SC_FPREGS+((F24-F0)*REGSZ)(a2)
167	ldc1	$f25, SC_FPREGS+((F25-F0)*REGSZ)(a2)
168	ldc1	$f26, SC_FPREGS+((F26-F0)*REGSZ)(a2)
169	ldc1	$f27, SC_FPREGS+((F27-F0)*REGSZ)(a2)
170	ldc1	$f28, SC_FPREGS+((F28-F0)*REGSZ)(a2)
171	ldc1	$f29, SC_FPREGS+((F29-F0)*REGSZ)(a2)
172	ldc1	$f30, SC_FPREGS+((F30-F0)*REGSZ)(a2)
173	ldc1	$f31, SC_FPREGS+((F31-F0)*REGSZ)(a2)
174#else
175	lwc1	$f20, SC_FPREGS+((F20-F0)*REGSZ)(a2)
176	lwc1	$f21, SC_FPREGS+((F21-F0)*REGSZ)(a2)
177	lwc1	$f22, SC_FPREGS+((F22-F0)*REGSZ)(a2)
178	lwc1	$f23, SC_FPREGS+((F23-F0)*REGSZ)(a2)
179	lwc1	$f24, SC_FPREGS+((F24-F0)*REGSZ)(a2)
180	lwc1	$f25, SC_FPREGS+((F25-F0)*REGSZ)(a2)
181	lwc1	$f26, SC_FPREGS+((F26-F0)*REGSZ)(a2)
182	lwc1	$f27, SC_FPREGS+((F27-F0)*REGSZ)(a2)
183	lwc1	$f28, SC_FPREGS+((F28-F0)*REGSZ)(a2)
184	lwc1	$f29, SC_FPREGS+((F29-F0)*REGSZ)(a2)
185	lwc1	$f30, SC_FPREGS+((F30-F0)*REGSZ)(a2)
186	lwc1	$f31, SC_FPREGS+((F31-F0)*REGSZ)(a2)
187#endif
188	beql	a4, zero, 1f
189	li	a4, 1		# only executed if branch taken.
1901:
191	j	ra
192	move	v0, a4
193
194botch:
195	jal	_libc_abort
196	nop
197	RESTORE_GP64
198	PTR_ADDU sp, FRAMESZ
199END_STRONG(longjmp)
200