xref: /openbsd-src/lib/libc/arch/arm/string/memcmp.S (revision d45a0e270db178ccbfd7b63e28a4c8dcf511dbb1)
1/*	$OpenBSD: memcmp.S,v 1.2 2004/02/01 05:40:52 drahn Exp $	*/
2/*      $NetBSD: memcmp.S,v 1.2 2003/04/05 23:08:52 bjh21 Exp $ */
3
4/*
5 * Copyright (c) 2002 ARM Ltd
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 * 3. The name of the company may not be used to endorse or promote
17 *    products derived from this software without specific prior written
18 *    permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
21 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
25 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
26 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
27 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
28 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
29 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#include <machine/asm.h>
33
34RCSID("$NetBSD: memcmp.S,v 1.2 2003/04/05 23:08:52 bjh21 Exp $")
35
36ENTRY(memcmp)
37/* if ((len - 1) < 0) return 0 */
38	subs	r2, r2, #1
39	movmi	r0, #0
40	movmi	pc, lr
41
42/* ip == last src address to compare */
43	add	ip, r0, r2
441:
45	ldrb	r2, [r0], #1
46	ldrb	r3, [r1], #1
47	cmp	ip, r0
48	cmpcs	r2, r3
49	beq	1b
50	sub	r0, r2, r3
51	mov	pc, lr
52