1*d2201f2fSdrahn /* Disassemble SH64 instructions.
2*d2201f2fSdrahn Copyright 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3*d2201f2fSdrahn
4*d2201f2fSdrahn This program is free software; you can redistribute it and/or modify
5*d2201f2fSdrahn it under the terms of the GNU General Public License as published by
6*d2201f2fSdrahn the Free Software Foundation; either version 2 of the License, or
7*d2201f2fSdrahn (at your option) any later version.
8*d2201f2fSdrahn
9*d2201f2fSdrahn This program is distributed in the hope that it will be useful,
10*d2201f2fSdrahn but WITHOUT ANY WARRANTY; without even the implied warranty of
11*d2201f2fSdrahn MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12*d2201f2fSdrahn GNU General Public License for more details.
13*d2201f2fSdrahn
14*d2201f2fSdrahn You should have received a copy of the GNU General Public License
15*d2201f2fSdrahn along with this program; if not, write to the Free Software
16*d2201f2fSdrahn Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
17*d2201f2fSdrahn
18*d2201f2fSdrahn #include <stdio.h>
19*d2201f2fSdrahn
20*d2201f2fSdrahn #include "dis-asm.h"
21*d2201f2fSdrahn #include "sysdep.h"
22*d2201f2fSdrahn #include "sh64-opc.h"
23*d2201f2fSdrahn #include "libiberty.h"
24*d2201f2fSdrahn
25*d2201f2fSdrahn /* We need to refer to the ELF header structure. */
26*d2201f2fSdrahn #include "elf-bfd.h"
27*d2201f2fSdrahn #include "elf/sh.h"
28*d2201f2fSdrahn #include "elf32-sh64.h"
29*d2201f2fSdrahn
30*d2201f2fSdrahn #define ELF_MODE32_CODE_LABEL_P(SYM) \
31*d2201f2fSdrahn (((elf_symbol_type *) (SYM))->internal_elf_sym.st_other & STO_SH5_ISA32)
32*d2201f2fSdrahn
33*d2201f2fSdrahn #define SAVED_MOVI_R(INFO) \
34*d2201f2fSdrahn (((struct sh64_disassemble_info *) ((INFO)->private_data))->address_reg)
35*d2201f2fSdrahn
36*d2201f2fSdrahn #define SAVED_MOVI_IMM(INFO) \
37*d2201f2fSdrahn (((struct sh64_disassemble_info *) ((INFO)->private_data))->built_address)
38*d2201f2fSdrahn
39*d2201f2fSdrahn struct sh64_disassemble_info
40*d2201f2fSdrahn {
41*d2201f2fSdrahn /* When we see a MOVI, we save the register and the value, and merge a
42*d2201f2fSdrahn subsequent SHORI and display the address, if there is one. */
43*d2201f2fSdrahn unsigned int address_reg;
44*d2201f2fSdrahn bfd_signed_vma built_address;
45*d2201f2fSdrahn
46*d2201f2fSdrahn /* This is the range decriptor for the current address. It is kept
47*d2201f2fSdrahn around for the next call. */
48*d2201f2fSdrahn sh64_elf_crange crange;
49*d2201f2fSdrahn };
50*d2201f2fSdrahn
51*d2201f2fSdrahn /* Each item in the table is a mask to indicate which bits to be set
52*d2201f2fSdrahn to determine an instruction's operator.
53*d2201f2fSdrahn The index is as same as the instruction in the opcode table.
54*d2201f2fSdrahn Note that some archs have this as a field in the opcode table. */
55*d2201f2fSdrahn static unsigned long *shmedia_opcode_mask_table;
56*d2201f2fSdrahn
57*d2201f2fSdrahn static void initialize_shmedia_opcode_mask_table PARAMS ((void));
58*d2201f2fSdrahn static int print_insn_shmedia PARAMS ((bfd_vma, disassemble_info *));
59*d2201f2fSdrahn static const char *creg_name PARAMS ((int));
60*d2201f2fSdrahn static bfd_boolean init_sh64_disasm_info PARAMS ((struct disassemble_info *));
61*d2201f2fSdrahn static enum sh64_elf_cr_type sh64_get_contents_type_disasm
62*d2201f2fSdrahn PARAMS ((bfd_vma, struct disassemble_info *));
63*d2201f2fSdrahn
64*d2201f2fSdrahn /* Initialize the SH64 opcode mask table for each instruction in SHmedia
65*d2201f2fSdrahn mode. */
66*d2201f2fSdrahn
67*d2201f2fSdrahn static void
initialize_shmedia_opcode_mask_table()68*d2201f2fSdrahn initialize_shmedia_opcode_mask_table ()
69*d2201f2fSdrahn {
70*d2201f2fSdrahn int n_opc;
71*d2201f2fSdrahn int n;
72*d2201f2fSdrahn
73*d2201f2fSdrahn /* Calculate number of opcodes. */
74*d2201f2fSdrahn for (n_opc = 0; shmedia_table[n_opc].name != NULL; n_opc++)
75*d2201f2fSdrahn ;
76*d2201f2fSdrahn
77*d2201f2fSdrahn shmedia_opcode_mask_table
78*d2201f2fSdrahn = xmalloc (sizeof (shmedia_opcode_mask_table[0]) * n_opc);
79*d2201f2fSdrahn
80*d2201f2fSdrahn for (n = 0; n < n_opc; n++)
81*d2201f2fSdrahn {
82*d2201f2fSdrahn int i;
83*d2201f2fSdrahn
84*d2201f2fSdrahn unsigned long mask = 0;
85*d2201f2fSdrahn
86*d2201f2fSdrahn for (i = 0; shmedia_table[n].arg[i] != A_NONE; i++)
87*d2201f2fSdrahn {
88*d2201f2fSdrahn int offset = shmedia_table[n].nibbles[i];
89*d2201f2fSdrahn int length;
90*d2201f2fSdrahn
91*d2201f2fSdrahn switch (shmedia_table[n].arg[i])
92*d2201f2fSdrahn {
93*d2201f2fSdrahn case A_GREG_M:
94*d2201f2fSdrahn case A_GREG_N:
95*d2201f2fSdrahn case A_GREG_D:
96*d2201f2fSdrahn case A_CREG_K:
97*d2201f2fSdrahn case A_CREG_J:
98*d2201f2fSdrahn case A_FREG_G:
99*d2201f2fSdrahn case A_FREG_H:
100*d2201f2fSdrahn case A_FREG_F:
101*d2201f2fSdrahn case A_DREG_G:
102*d2201f2fSdrahn case A_DREG_H:
103*d2201f2fSdrahn case A_DREG_F:
104*d2201f2fSdrahn case A_FMREG_G:
105*d2201f2fSdrahn case A_FMREG_H:
106*d2201f2fSdrahn case A_FMREG_F:
107*d2201f2fSdrahn case A_FPREG_G:
108*d2201f2fSdrahn case A_FPREG_H:
109*d2201f2fSdrahn case A_FPREG_F:
110*d2201f2fSdrahn case A_FVREG_G:
111*d2201f2fSdrahn case A_FVREG_H:
112*d2201f2fSdrahn case A_FVREG_F:
113*d2201f2fSdrahn case A_REUSE_PREV:
114*d2201f2fSdrahn length = 6;
115*d2201f2fSdrahn break;
116*d2201f2fSdrahn
117*d2201f2fSdrahn case A_TREG_A:
118*d2201f2fSdrahn case A_TREG_B:
119*d2201f2fSdrahn length = 3;
120*d2201f2fSdrahn break;
121*d2201f2fSdrahn
122*d2201f2fSdrahn case A_IMMM:
123*d2201f2fSdrahn abort ();
124*d2201f2fSdrahn break;
125*d2201f2fSdrahn
126*d2201f2fSdrahn case A_IMMU5:
127*d2201f2fSdrahn length = 5;
128*d2201f2fSdrahn break;
129*d2201f2fSdrahn
130*d2201f2fSdrahn case A_IMMS6:
131*d2201f2fSdrahn case A_IMMU6:
132*d2201f2fSdrahn case A_IMMS6BY32:
133*d2201f2fSdrahn length = 6;
134*d2201f2fSdrahn break;
135*d2201f2fSdrahn
136*d2201f2fSdrahn case A_IMMS10:
137*d2201f2fSdrahn case A_IMMS10BY1:
138*d2201f2fSdrahn case A_IMMS10BY2:
139*d2201f2fSdrahn case A_IMMS10BY4:
140*d2201f2fSdrahn case A_IMMS10BY8:
141*d2201f2fSdrahn length = 10;
142*d2201f2fSdrahn break;
143*d2201f2fSdrahn
144*d2201f2fSdrahn case A_IMMU16:
145*d2201f2fSdrahn case A_IMMS16:
146*d2201f2fSdrahn case A_PCIMMS16BY4:
147*d2201f2fSdrahn case A_PCIMMS16BY4_PT:
148*d2201f2fSdrahn length = 16;
149*d2201f2fSdrahn break;
150*d2201f2fSdrahn
151*d2201f2fSdrahn default:
152*d2201f2fSdrahn abort ();
153*d2201f2fSdrahn length = 0;
154*d2201f2fSdrahn break;
155*d2201f2fSdrahn }
156*d2201f2fSdrahn
157*d2201f2fSdrahn if (length != 0)
158*d2201f2fSdrahn mask |= (0xffffffff >> (32 - length)) << offset;
159*d2201f2fSdrahn }
160*d2201f2fSdrahn shmedia_opcode_mask_table[n] = 0xffffffff & ~mask;
161*d2201f2fSdrahn }
162*d2201f2fSdrahn }
163*d2201f2fSdrahn
164*d2201f2fSdrahn /* Get a predefined control-register-name, or return NULL. */
165*d2201f2fSdrahn
166*d2201f2fSdrahn const char *
creg_name(cregno)167*d2201f2fSdrahn creg_name (cregno)
168*d2201f2fSdrahn int cregno;
169*d2201f2fSdrahn {
170*d2201f2fSdrahn const shmedia_creg_info *cregp;
171*d2201f2fSdrahn
172*d2201f2fSdrahn /* If control register usage is common enough, change this to search a
173*d2201f2fSdrahn hash-table. */
174*d2201f2fSdrahn for (cregp = shmedia_creg_table; cregp->name != NULL; cregp++)
175*d2201f2fSdrahn {
176*d2201f2fSdrahn if (cregp->cregno == cregno)
177*d2201f2fSdrahn return cregp->name;
178*d2201f2fSdrahn }
179*d2201f2fSdrahn
180*d2201f2fSdrahn return NULL;
181*d2201f2fSdrahn }
182*d2201f2fSdrahn
183*d2201f2fSdrahn /* Main function to disassemble SHmedia instructions. */
184*d2201f2fSdrahn
185*d2201f2fSdrahn static int
print_insn_shmedia(memaddr,info)186*d2201f2fSdrahn print_insn_shmedia (memaddr, info)
187*d2201f2fSdrahn bfd_vma memaddr;
188*d2201f2fSdrahn struct disassemble_info *info;
189*d2201f2fSdrahn {
190*d2201f2fSdrahn fprintf_ftype fprintf_fn = info->fprintf_func;
191*d2201f2fSdrahn void *stream = info->stream;
192*d2201f2fSdrahn
193*d2201f2fSdrahn unsigned char insn[4];
194*d2201f2fSdrahn unsigned long instruction;
195*d2201f2fSdrahn int status;
196*d2201f2fSdrahn int n;
197*d2201f2fSdrahn const shmedia_opcode_info *op;
198*d2201f2fSdrahn int i;
199*d2201f2fSdrahn unsigned int r = 0;
200*d2201f2fSdrahn long imm = 0;
201*d2201f2fSdrahn bfd_vma disp_pc_addr;
202*d2201f2fSdrahn
203*d2201f2fSdrahn status = info->read_memory_func (memaddr, insn, 4, info);
204*d2201f2fSdrahn
205*d2201f2fSdrahn /* If we can't read four bytes, something is wrong. Display any data we
206*d2201f2fSdrahn can get as .byte:s. */
207*d2201f2fSdrahn if (status != 0)
208*d2201f2fSdrahn {
209*d2201f2fSdrahn int i;
210*d2201f2fSdrahn
211*d2201f2fSdrahn for (i = 0; i < 3; i++)
212*d2201f2fSdrahn {
213*d2201f2fSdrahn status = info->read_memory_func (memaddr + i, insn, 1, info);
214*d2201f2fSdrahn if (status != 0)
215*d2201f2fSdrahn break;
216*d2201f2fSdrahn (*fprintf_fn) (stream, "%s0x%02x",
217*d2201f2fSdrahn i == 0 ? ".byte " : ", ",
218*d2201f2fSdrahn insn[0]);
219*d2201f2fSdrahn }
220*d2201f2fSdrahn
221*d2201f2fSdrahn return i ? i : -1;
222*d2201f2fSdrahn }
223*d2201f2fSdrahn
224*d2201f2fSdrahn /* Rearrange the bytes to make up an instruction. */
225*d2201f2fSdrahn if (info->endian == BFD_ENDIAN_LITTLE)
226*d2201f2fSdrahn instruction = bfd_getl32 (insn);
227*d2201f2fSdrahn else
228*d2201f2fSdrahn instruction = bfd_getb32 (insn);
229*d2201f2fSdrahn
230*d2201f2fSdrahn /* FIXME: Searching could be implemented using a hash on relevant
231*d2201f2fSdrahn fields. */
232*d2201f2fSdrahn for (n = 0, op = shmedia_table;
233*d2201f2fSdrahn op->name != NULL
234*d2201f2fSdrahn && ((instruction & shmedia_opcode_mask_table[n]) != op->opcode_base);
235*d2201f2fSdrahn n++, op++)
236*d2201f2fSdrahn ;
237*d2201f2fSdrahn
238*d2201f2fSdrahn /* FIXME: We should also check register number constraints. */
239*d2201f2fSdrahn if (op->name == NULL)
240*d2201f2fSdrahn {
241*d2201f2fSdrahn fprintf_fn (stream, ".long 0x%08x", instruction);
242*d2201f2fSdrahn return 4;
243*d2201f2fSdrahn }
244*d2201f2fSdrahn
245*d2201f2fSdrahn fprintf_fn (stream, "%s\t", op->name);
246*d2201f2fSdrahn
247*d2201f2fSdrahn for (i = 0; i < 3 && op->arg[i] != A_NONE; i++)
248*d2201f2fSdrahn {
249*d2201f2fSdrahn unsigned long temp = instruction >> op->nibbles[i];
250*d2201f2fSdrahn int by_number = 0;
251*d2201f2fSdrahn
252*d2201f2fSdrahn if (i > 0 && op->arg[i] != A_REUSE_PREV)
253*d2201f2fSdrahn fprintf_fn (stream, ",");
254*d2201f2fSdrahn
255*d2201f2fSdrahn switch (op->arg[i])
256*d2201f2fSdrahn {
257*d2201f2fSdrahn case A_REUSE_PREV:
258*d2201f2fSdrahn continue;
259*d2201f2fSdrahn
260*d2201f2fSdrahn case A_GREG_M:
261*d2201f2fSdrahn case A_GREG_N:
262*d2201f2fSdrahn case A_GREG_D:
263*d2201f2fSdrahn r = temp & 0x3f;
264*d2201f2fSdrahn fprintf_fn (stream, "r%d", r);
265*d2201f2fSdrahn break;
266*d2201f2fSdrahn
267*d2201f2fSdrahn case A_FVREG_F:
268*d2201f2fSdrahn case A_FVREG_G:
269*d2201f2fSdrahn case A_FVREG_H:
270*d2201f2fSdrahn r = temp & 0x3f;
271*d2201f2fSdrahn fprintf_fn (stream, "fv%d", r);
272*d2201f2fSdrahn break;
273*d2201f2fSdrahn
274*d2201f2fSdrahn case A_FPREG_F:
275*d2201f2fSdrahn case A_FPREG_G:
276*d2201f2fSdrahn case A_FPREG_H:
277*d2201f2fSdrahn r = temp & 0x3f;
278*d2201f2fSdrahn fprintf_fn (stream, "fp%d", r);
279*d2201f2fSdrahn break;
280*d2201f2fSdrahn
281*d2201f2fSdrahn case A_FMREG_F:
282*d2201f2fSdrahn case A_FMREG_G:
283*d2201f2fSdrahn case A_FMREG_H:
284*d2201f2fSdrahn r = temp & 0x3f;
285*d2201f2fSdrahn fprintf_fn (stream, "mtrx%d", r);
286*d2201f2fSdrahn break;
287*d2201f2fSdrahn
288*d2201f2fSdrahn case A_CREG_K:
289*d2201f2fSdrahn case A_CREG_J:
290*d2201f2fSdrahn {
291*d2201f2fSdrahn const char *name;
292*d2201f2fSdrahn r = temp & 0x3f;
293*d2201f2fSdrahn
294*d2201f2fSdrahn name = creg_name (r);
295*d2201f2fSdrahn
296*d2201f2fSdrahn if (name != NULL)
297*d2201f2fSdrahn fprintf_fn (stream, "%s", name);
298*d2201f2fSdrahn else
299*d2201f2fSdrahn fprintf_fn (stream, "cr%d", r);
300*d2201f2fSdrahn }
301*d2201f2fSdrahn break;
302*d2201f2fSdrahn
303*d2201f2fSdrahn case A_FREG_G:
304*d2201f2fSdrahn case A_FREG_H:
305*d2201f2fSdrahn case A_FREG_F:
306*d2201f2fSdrahn r = temp & 0x3f;
307*d2201f2fSdrahn fprintf_fn (stream, "fr%d", r);
308*d2201f2fSdrahn break;
309*d2201f2fSdrahn
310*d2201f2fSdrahn case A_DREG_G:
311*d2201f2fSdrahn case A_DREG_H:
312*d2201f2fSdrahn case A_DREG_F:
313*d2201f2fSdrahn r = temp & 0x3f;
314*d2201f2fSdrahn fprintf_fn (stream, "dr%d", r);
315*d2201f2fSdrahn break;
316*d2201f2fSdrahn
317*d2201f2fSdrahn case A_TREG_A:
318*d2201f2fSdrahn case A_TREG_B:
319*d2201f2fSdrahn r = temp & 0x7;
320*d2201f2fSdrahn fprintf_fn (stream, "tr%d", r);
321*d2201f2fSdrahn break;
322*d2201f2fSdrahn
323*d2201f2fSdrahn /* A signed 6-bit number. */
324*d2201f2fSdrahn case A_IMMS6:
325*d2201f2fSdrahn imm = temp & 0x3f;
326*d2201f2fSdrahn if (imm & (unsigned long) 0x20)
327*d2201f2fSdrahn imm |= ~(unsigned long) 0x3f;
328*d2201f2fSdrahn fprintf_fn (stream, "%d", imm);
329*d2201f2fSdrahn break;
330*d2201f2fSdrahn
331*d2201f2fSdrahn /* A signed 6-bit number, multiplied by 32 when used. */
332*d2201f2fSdrahn case A_IMMS6BY32:
333*d2201f2fSdrahn imm = temp & 0x3f;
334*d2201f2fSdrahn if (imm & (unsigned long) 0x20)
335*d2201f2fSdrahn imm |= ~(unsigned long) 0x3f;
336*d2201f2fSdrahn fprintf_fn (stream, "%d", imm * 32);
337*d2201f2fSdrahn break;
338*d2201f2fSdrahn
339*d2201f2fSdrahn /* A signed 10-bit number, multiplied by 8 when used. */
340*d2201f2fSdrahn case A_IMMS10BY8:
341*d2201f2fSdrahn by_number++;
342*d2201f2fSdrahn /* Fall through. */
343*d2201f2fSdrahn
344*d2201f2fSdrahn /* A signed 10-bit number, multiplied by 4 when used. */
345*d2201f2fSdrahn case A_IMMS10BY4:
346*d2201f2fSdrahn by_number++;
347*d2201f2fSdrahn /* Fall through. */
348*d2201f2fSdrahn
349*d2201f2fSdrahn /* A signed 10-bit number, multiplied by 2 when used. */
350*d2201f2fSdrahn case A_IMMS10BY2:
351*d2201f2fSdrahn by_number++;
352*d2201f2fSdrahn /* Fall through. */
353*d2201f2fSdrahn
354*d2201f2fSdrahn /* A signed 10-bit number. */
355*d2201f2fSdrahn case A_IMMS10:
356*d2201f2fSdrahn case A_IMMS10BY1:
357*d2201f2fSdrahn imm = temp & 0x3ff;
358*d2201f2fSdrahn if (imm & (unsigned long) 0x200)
359*d2201f2fSdrahn imm |= ~(unsigned long) 0x3ff;
360*d2201f2fSdrahn imm <<= by_number;
361*d2201f2fSdrahn fprintf_fn (stream, "%d", imm);
362*d2201f2fSdrahn break;
363*d2201f2fSdrahn
364*d2201f2fSdrahn /* A signed 16-bit number. */
365*d2201f2fSdrahn case A_IMMS16:
366*d2201f2fSdrahn imm = temp & 0xffff;
367*d2201f2fSdrahn if (imm & (unsigned long) 0x8000)
368*d2201f2fSdrahn imm |= ~((unsigned long) 0xffff);
369*d2201f2fSdrahn fprintf_fn (stream, "%d", imm);
370*d2201f2fSdrahn break;
371*d2201f2fSdrahn
372*d2201f2fSdrahn /* A PC-relative signed 16-bit number, multiplied by 4 when
373*d2201f2fSdrahn used. */
374*d2201f2fSdrahn case A_PCIMMS16BY4:
375*d2201f2fSdrahn imm = temp & 0xffff; /* 16 bits */
376*d2201f2fSdrahn if (imm & (unsigned long) 0x8000)
377*d2201f2fSdrahn imm |= ~(unsigned long) 0xffff;
378*d2201f2fSdrahn imm <<= 2;
379*d2201f2fSdrahn disp_pc_addr = (bfd_vma) imm + memaddr;
380*d2201f2fSdrahn (*info->print_address_func) (disp_pc_addr, info);
381*d2201f2fSdrahn break;
382*d2201f2fSdrahn
383*d2201f2fSdrahn /* An unsigned 5-bit number. */
384*d2201f2fSdrahn case A_IMMU5:
385*d2201f2fSdrahn imm = temp & 0x1f;
386*d2201f2fSdrahn fprintf_fn (stream, "%d", imm);
387*d2201f2fSdrahn break;
388*d2201f2fSdrahn
389*d2201f2fSdrahn /* An unsigned 6-bit number. */
390*d2201f2fSdrahn case A_IMMU6:
391*d2201f2fSdrahn imm = temp & 0x3f;
392*d2201f2fSdrahn fprintf_fn (stream, "%d", imm);
393*d2201f2fSdrahn break;
394*d2201f2fSdrahn
395*d2201f2fSdrahn /* An unsigned 16-bit number. */
396*d2201f2fSdrahn case A_IMMU16:
397*d2201f2fSdrahn imm = temp & 0xffff;
398*d2201f2fSdrahn fprintf_fn (stream, "%d", imm);
399*d2201f2fSdrahn break;
400*d2201f2fSdrahn
401*d2201f2fSdrahn default:
402*d2201f2fSdrahn abort ();
403*d2201f2fSdrahn break;
404*d2201f2fSdrahn }
405*d2201f2fSdrahn }
406*d2201f2fSdrahn
407*d2201f2fSdrahn /* FIXME: Looks like 32-bit values only are handled.
408*d2201f2fSdrahn FIXME: PC-relative numbers aren't handled correctly. */
409*d2201f2fSdrahn if (op->opcode_base == (unsigned long) SHMEDIA_SHORI_OPC
410*d2201f2fSdrahn && SAVED_MOVI_R (info) == r)
411*d2201f2fSdrahn {
412*d2201f2fSdrahn asection *section = info->section;
413*d2201f2fSdrahn
414*d2201f2fSdrahn /* Most callers do not set the section field correctly yet. Revert
415*d2201f2fSdrahn to getting the section from symbols, if any. */
416*d2201f2fSdrahn if (section == NULL
417*d2201f2fSdrahn && info->symbols != NULL
418*d2201f2fSdrahn && bfd_asymbol_flavour (info->symbols[0]) == bfd_target_elf_flavour
419*d2201f2fSdrahn && ! bfd_is_und_section (bfd_get_section (info->symbols[0]))
420*d2201f2fSdrahn && ! bfd_is_abs_section (bfd_get_section (info->symbols[0])))
421*d2201f2fSdrahn section = bfd_get_section (info->symbols[0]);
422*d2201f2fSdrahn
423*d2201f2fSdrahn /* Only guess addresses when the contents of this section is fully
424*d2201f2fSdrahn relocated. Otherwise, the value will be zero or perhaps even
425*d2201f2fSdrahn bogus. */
426*d2201f2fSdrahn if (section == NULL
427*d2201f2fSdrahn || section->owner == NULL
428*d2201f2fSdrahn || elf_elfheader (section->owner)->e_type == ET_EXEC)
429*d2201f2fSdrahn {
430*d2201f2fSdrahn bfd_signed_vma shori_addr;
431*d2201f2fSdrahn
432*d2201f2fSdrahn shori_addr = SAVED_MOVI_IMM (info) << 16;
433*d2201f2fSdrahn shori_addr |= imm;
434*d2201f2fSdrahn
435*d2201f2fSdrahn fprintf_fn (stream, "\t! 0x");
436*d2201f2fSdrahn (*info->print_address_func) (shori_addr, info);
437*d2201f2fSdrahn }
438*d2201f2fSdrahn }
439*d2201f2fSdrahn
440*d2201f2fSdrahn if (op->opcode_base == SHMEDIA_MOVI_OPC)
441*d2201f2fSdrahn {
442*d2201f2fSdrahn SAVED_MOVI_IMM (info) = imm;
443*d2201f2fSdrahn SAVED_MOVI_R (info) = r;
444*d2201f2fSdrahn }
445*d2201f2fSdrahn else
446*d2201f2fSdrahn {
447*d2201f2fSdrahn SAVED_MOVI_IMM (info) = 0;
448*d2201f2fSdrahn SAVED_MOVI_R (info) = 255;
449*d2201f2fSdrahn }
450*d2201f2fSdrahn
451*d2201f2fSdrahn return 4;
452*d2201f2fSdrahn }
453*d2201f2fSdrahn
454*d2201f2fSdrahn /* Check the type of contents about to be disassembled. This is like
455*d2201f2fSdrahn sh64_get_contents_type (which may be called from here), except that it
456*d2201f2fSdrahn takes the same arguments as print_insn_* and does what can be done if
457*d2201f2fSdrahn no section is available. */
458*d2201f2fSdrahn
459*d2201f2fSdrahn static enum sh64_elf_cr_type
sh64_get_contents_type_disasm(memaddr,info)460*d2201f2fSdrahn sh64_get_contents_type_disasm (memaddr, info)
461*d2201f2fSdrahn bfd_vma memaddr;
462*d2201f2fSdrahn struct disassemble_info *info;
463*d2201f2fSdrahn {
464*d2201f2fSdrahn struct sh64_disassemble_info *sh64_infop = info->private_data;
465*d2201f2fSdrahn
466*d2201f2fSdrahn /* Perhaps we have a region from a previous probe and it still counts
467*d2201f2fSdrahn for this address? */
468*d2201f2fSdrahn if (sh64_infop->crange.cr_type != CRT_NONE
469*d2201f2fSdrahn && memaddr >= sh64_infop->crange.cr_addr
470*d2201f2fSdrahn && memaddr < sh64_infop->crange.cr_addr + sh64_infop->crange.cr_size)
471*d2201f2fSdrahn return sh64_infop->crange.cr_type;
472*d2201f2fSdrahn
473*d2201f2fSdrahn /* If we have a section, try and use it. */
474*d2201f2fSdrahn if (info->section
475*d2201f2fSdrahn && bfd_get_flavour (info->section->owner) == bfd_target_elf_flavour)
476*d2201f2fSdrahn {
477*d2201f2fSdrahn enum sh64_elf_cr_type cr_type
478*d2201f2fSdrahn = sh64_get_contents_type (info->section, memaddr,
479*d2201f2fSdrahn &sh64_infop->crange);
480*d2201f2fSdrahn
481*d2201f2fSdrahn if (cr_type != CRT_NONE)
482*d2201f2fSdrahn return cr_type;
483*d2201f2fSdrahn }
484*d2201f2fSdrahn
485*d2201f2fSdrahn /* If we have symbols, we can try and get at a section from *that*. */
486*d2201f2fSdrahn if (info->symbols != NULL
487*d2201f2fSdrahn && bfd_asymbol_flavour (info->symbols[0]) == bfd_target_elf_flavour
488*d2201f2fSdrahn && ! bfd_is_und_section (bfd_get_section (info->symbols[0]))
489*d2201f2fSdrahn && ! bfd_is_abs_section (bfd_get_section (info->symbols[0])))
490*d2201f2fSdrahn {
491*d2201f2fSdrahn enum sh64_elf_cr_type cr_type
492*d2201f2fSdrahn = sh64_get_contents_type (bfd_get_section (info->symbols[0]),
493*d2201f2fSdrahn memaddr, &sh64_infop->crange);
494*d2201f2fSdrahn
495*d2201f2fSdrahn if (cr_type != CRT_NONE)
496*d2201f2fSdrahn return cr_type;
497*d2201f2fSdrahn }
498*d2201f2fSdrahn
499*d2201f2fSdrahn /* We can make a reasonable guess based on the st_other field of a
500*d2201f2fSdrahn symbol; for a BranchTarget this is marked as STO_SH5_ISA32 and then
501*d2201f2fSdrahn it's most probably code there. */
502*d2201f2fSdrahn if (info->symbols
503*d2201f2fSdrahn && bfd_asymbol_flavour (info->symbols[0]) == bfd_target_elf_flavour
504*d2201f2fSdrahn && elf_symbol_from (bfd_asymbol_bfd (info->symbols[0]),
505*d2201f2fSdrahn info->symbols[0])->internal_elf_sym.st_other
506*d2201f2fSdrahn == STO_SH5_ISA32)
507*d2201f2fSdrahn return CRT_SH5_ISA32;
508*d2201f2fSdrahn
509*d2201f2fSdrahn /* If all else fails, guess this is code and guess on the low bit set. */
510*d2201f2fSdrahn return (memaddr & 1) == 1 ? CRT_SH5_ISA32 : CRT_SH5_ISA16;
511*d2201f2fSdrahn }
512*d2201f2fSdrahn
513*d2201f2fSdrahn /* Initialize static and dynamic disassembly state. */
514*d2201f2fSdrahn
515*d2201f2fSdrahn static bfd_boolean
init_sh64_disasm_info(info)516*d2201f2fSdrahn init_sh64_disasm_info (info)
517*d2201f2fSdrahn struct disassemble_info *info;
518*d2201f2fSdrahn {
519*d2201f2fSdrahn struct sh64_disassemble_info *sh64_infop
520*d2201f2fSdrahn = calloc (sizeof (*sh64_infop), 1);
521*d2201f2fSdrahn
522*d2201f2fSdrahn if (sh64_infop == NULL)
523*d2201f2fSdrahn return FALSE;
524*d2201f2fSdrahn
525*d2201f2fSdrahn info->private_data = sh64_infop;
526*d2201f2fSdrahn
527*d2201f2fSdrahn SAVED_MOVI_IMM (info) = 0;
528*d2201f2fSdrahn SAVED_MOVI_R (info) = 255;
529*d2201f2fSdrahn
530*d2201f2fSdrahn if (shmedia_opcode_mask_table == NULL)
531*d2201f2fSdrahn initialize_shmedia_opcode_mask_table ();
532*d2201f2fSdrahn
533*d2201f2fSdrahn return TRUE;
534*d2201f2fSdrahn }
535*d2201f2fSdrahn
536*d2201f2fSdrahn /* Main entry to disassemble SHmedia instructions, given an endian set in
537*d2201f2fSdrahn INFO. Note that the simulator uses this as the main entry and does not
538*d2201f2fSdrahn use any of the functions further below. */
539*d2201f2fSdrahn
540*d2201f2fSdrahn int
print_insn_sh64x_media(memaddr,info)541*d2201f2fSdrahn print_insn_sh64x_media (memaddr, info)
542*d2201f2fSdrahn bfd_vma memaddr;
543*d2201f2fSdrahn struct disassemble_info *info;
544*d2201f2fSdrahn {
545*d2201f2fSdrahn if (info->private_data == NULL && ! init_sh64_disasm_info (info))
546*d2201f2fSdrahn return -1;
547*d2201f2fSdrahn
548*d2201f2fSdrahn /* Make reasonable output. */
549*d2201f2fSdrahn info->bytes_per_line = 4;
550*d2201f2fSdrahn info->bytes_per_chunk = 4;
551*d2201f2fSdrahn
552*d2201f2fSdrahn return print_insn_shmedia (memaddr, info);
553*d2201f2fSdrahn }
554*d2201f2fSdrahn
555*d2201f2fSdrahn /* Main entry to disassemble SHmedia insns.
556*d2201f2fSdrahn If we see an SHcompact instruction, return -2. */
557*d2201f2fSdrahn
558*d2201f2fSdrahn int
print_insn_sh64(memaddr,info)559*d2201f2fSdrahn print_insn_sh64 (memaddr, info)
560*d2201f2fSdrahn bfd_vma memaddr;
561*d2201f2fSdrahn struct disassemble_info *info;
562*d2201f2fSdrahn {
563*d2201f2fSdrahn enum bfd_endian endian = info->endian;
564*d2201f2fSdrahn enum sh64_elf_cr_type cr_type;
565*d2201f2fSdrahn
566*d2201f2fSdrahn if (info->private_data == NULL && ! init_sh64_disasm_info (info))
567*d2201f2fSdrahn return -1;
568*d2201f2fSdrahn
569*d2201f2fSdrahn cr_type = sh64_get_contents_type_disasm (memaddr, info);
570*d2201f2fSdrahn if (cr_type != CRT_SH5_ISA16)
571*d2201f2fSdrahn {
572*d2201f2fSdrahn int length = 4 - (memaddr % 4);
573*d2201f2fSdrahn info->display_endian = endian;
574*d2201f2fSdrahn
575*d2201f2fSdrahn /* If we got an uneven address to indicate SHmedia, adjust it. */
576*d2201f2fSdrahn if (cr_type == CRT_SH5_ISA32 && length == 3)
577*d2201f2fSdrahn memaddr--, length = 4;
578*d2201f2fSdrahn
579*d2201f2fSdrahn /* Only disassemble on four-byte boundaries. Addresses that are not
580*d2201f2fSdrahn a multiple of four can happen after a data region. */
581*d2201f2fSdrahn if (cr_type == CRT_SH5_ISA32 && length == 4)
582*d2201f2fSdrahn return print_insn_sh64x_media (memaddr, info);
583*d2201f2fSdrahn
584*d2201f2fSdrahn /* We get CRT_DATA *only* for data regions in a mixed-contents
585*d2201f2fSdrahn section. For sections with data only, we get indication of one
586*d2201f2fSdrahn of the ISA:s. You may think that we shouldn't disassemble
587*d2201f2fSdrahn section with only data if we can figure that out. However, the
588*d2201f2fSdrahn disassembly function is by default not called for data-only
589*d2201f2fSdrahn sections, so if the user explicitly specified disassembly of a
590*d2201f2fSdrahn data section, that's what we should do. */
591*d2201f2fSdrahn if (cr_type == CRT_DATA || length != 4)
592*d2201f2fSdrahn {
593*d2201f2fSdrahn int status;
594*d2201f2fSdrahn unsigned char data[4];
595*d2201f2fSdrahn struct sh64_disassemble_info *sh64_infop = info->private_data;
596*d2201f2fSdrahn
597*d2201f2fSdrahn if (length == 4
598*d2201f2fSdrahn && sh64_infop->crange.cr_type != CRT_NONE
599*d2201f2fSdrahn && memaddr >= sh64_infop->crange.cr_addr
600*d2201f2fSdrahn && memaddr < (sh64_infop->crange.cr_addr
601*d2201f2fSdrahn + sh64_infop->crange.cr_size))
602*d2201f2fSdrahn length
603*d2201f2fSdrahn = (sh64_infop->crange.cr_addr
604*d2201f2fSdrahn + sh64_infop->crange.cr_size - memaddr);
605*d2201f2fSdrahn
606*d2201f2fSdrahn status
607*d2201f2fSdrahn = (*info->read_memory_func) (memaddr, data,
608*d2201f2fSdrahn length >= 4 ? 4 : length, info);
609*d2201f2fSdrahn
610*d2201f2fSdrahn if (status == 0 && length >= 4)
611*d2201f2fSdrahn {
612*d2201f2fSdrahn (*info->fprintf_func) (info->stream, ".long 0x%08lx",
613*d2201f2fSdrahn endian == BFD_ENDIAN_BIG
614*d2201f2fSdrahn ? (long) (bfd_getb32 (data))
615*d2201f2fSdrahn : (long) (bfd_getl32 (data)));
616*d2201f2fSdrahn return 4;
617*d2201f2fSdrahn }
618*d2201f2fSdrahn else
619*d2201f2fSdrahn {
620*d2201f2fSdrahn int i;
621*d2201f2fSdrahn
622*d2201f2fSdrahn for (i = 0; i < length; i++)
623*d2201f2fSdrahn {
624*d2201f2fSdrahn status = info->read_memory_func (memaddr + i, data, 1, info);
625*d2201f2fSdrahn if (status != 0)
626*d2201f2fSdrahn break;
627*d2201f2fSdrahn (*info->fprintf_func) (info->stream, "%s0x%02x",
628*d2201f2fSdrahn i == 0 ? ".byte " : ", ",
629*d2201f2fSdrahn data[0]);
630*d2201f2fSdrahn }
631*d2201f2fSdrahn
632*d2201f2fSdrahn return i ? i : -1;
633*d2201f2fSdrahn }
634*d2201f2fSdrahn }
635*d2201f2fSdrahn }
636*d2201f2fSdrahn
637*d2201f2fSdrahn /* SH1 .. SH4 instruction, let caller handle it. */
638*d2201f2fSdrahn return -2;
639*d2201f2fSdrahn }
640