1 /* Assembler interface for targets using CGEN. -*- C -*- 2 CGEN: Cpu tools GENerator 3 4 THIS FILE IS MACHINE GENERATED WITH CGEN. 5 - the resultant file is machine generated, cgen-asm.in isn't 6 7 Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. 8 9 This file is part of the GNU Binutils and GDB, the GNU debugger. 10 11 This program is free software; you can redistribute it and/or modify 12 it under the terms of the GNU General Public License as published by 13 the Free Software Foundation; either version 2, or (at your option) 14 any later version. 15 16 This program is distributed in the hope that it will be useful, 17 but WITHOUT ANY WARRANTY; without even the implied warranty of 18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 GNU General Public License for more details. 20 21 You should have received a copy of the GNU General Public License 22 along with this program; if not, write to the Free Software Foundation, Inc., 23 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 24 25 /* ??? Eventually more and more of this stuff can go to cpu-independent files. 26 Keep that in mind. */ 27 28 #include "sysdep.h" 29 #include <stdio.h> 30 #include "ansidecl.h" 31 #include "bfd.h" 32 #include "symcat.h" 33 #include "m32r-desc.h" 34 #include "m32r-opc.h" 35 #include "opintl.h" 36 #include "xregex.h" 37 #include "libiberty.h" 38 #include "safe-ctype.h" 39 40 #undef min 41 #define min(a,b) ((a) < (b) ? (a) : (b)) 42 #undef max 43 #define max(a,b) ((a) > (b) ? (a) : (b)) 44 45 static const char * parse_insn_normal 46 PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *)); 47 48 /* -- assembler routines inserted here. */ 49 50 /* -- asm.c */ 51 static const char * parse_hash 52 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); 53 static const char * parse_hi16 54 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); 55 static const char * parse_slo16 56 PARAMS ((CGEN_CPU_DESC, const char **, int, long *)); 57 static const char * parse_ulo16 58 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); 59 60 /* Handle '#' prefixes (i.e. skip over them). */ 61 62 static const char * 63 parse_hash (cd, strp, opindex, valuep) 64 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; 65 const char **strp; 66 int opindex ATTRIBUTE_UNUSED; 67 unsigned long *valuep ATTRIBUTE_UNUSED; 68 { 69 if (**strp == '#') 70 ++*strp; 71 return NULL; 72 } 73 74 /* Handle shigh(), high(). */ 75 76 static const char * 77 parse_hi16 (cd, strp, opindex, valuep) 78 CGEN_CPU_DESC cd; 79 const char **strp; 80 int opindex; 81 unsigned long *valuep; 82 { 83 const char *errmsg; 84 enum cgen_parse_operand_result result_type; 85 bfd_vma value; 86 87 if (**strp == '#') 88 ++*strp; 89 90 if (strncasecmp (*strp, "high(", 5) == 0) 91 { 92 *strp += 5; 93 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_ULO, 94 &result_type, &value); 95 if (**strp != ')') 96 return "missing `)'"; 97 ++*strp; 98 if (errmsg == NULL 99 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 100 value >>= 16; 101 *valuep = value; 102 return errmsg; 103 } 104 else if (strncasecmp (*strp, "shigh(", 6) == 0) 105 { 106 *strp += 6; 107 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_SLO, 108 &result_type, &value); 109 if (**strp != ')') 110 return "missing `)'"; 111 ++*strp; 112 if (errmsg == NULL 113 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 114 value = (value >> 16) + (value & 0x8000 ? 1 : 0); 115 *valuep = value; 116 return errmsg; 117 } 118 119 return cgen_parse_unsigned_integer (cd, strp, opindex, valuep); 120 } 121 122 /* Handle low() in a signed context. Also handle sda(). 123 The signedness of the value doesn't matter to low(), but this also 124 handles the case where low() isn't present. */ 125 126 static const char * 127 parse_slo16 (cd, strp, opindex, valuep) 128 CGEN_CPU_DESC cd; 129 const char **strp; 130 int opindex; 131 long *valuep; 132 { 133 const char *errmsg; 134 enum cgen_parse_operand_result result_type; 135 bfd_vma value; 136 137 if (**strp == '#') 138 ++*strp; 139 140 if (strncasecmp (*strp, "low(", 4) == 0) 141 { 142 *strp += 4; 143 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16, 144 &result_type, &value); 145 if (**strp != ')') 146 return "missing `)'"; 147 ++*strp; 148 if (errmsg == NULL 149 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 150 value &= 0xffff; 151 *valuep = value; 152 return errmsg; 153 } 154 155 if (strncasecmp (*strp, "sda(", 4) == 0) 156 { 157 *strp += 4; 158 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_SDA16, 159 NULL, &value); 160 if (**strp != ')') 161 return "missing `)'"; 162 ++*strp; 163 *valuep = value; 164 return errmsg; 165 } 166 167 return cgen_parse_signed_integer (cd, strp, opindex, valuep); 168 } 169 170 /* Handle low() in an unsigned context. 171 The signedness of the value doesn't matter to low(), but this also 172 handles the case where low() isn't present. */ 173 174 static const char * 175 parse_ulo16 (cd, strp, opindex, valuep) 176 CGEN_CPU_DESC cd; 177 const char **strp; 178 int opindex; 179 unsigned long *valuep; 180 { 181 const char *errmsg; 182 enum cgen_parse_operand_result result_type; 183 bfd_vma value; 184 185 if (**strp == '#') 186 ++*strp; 187 188 if (strncasecmp (*strp, "low(", 4) == 0) 189 { 190 *strp += 4; 191 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16, 192 &result_type, &value); 193 if (**strp != ')') 194 return "missing `)'"; 195 ++*strp; 196 if (errmsg == NULL 197 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 198 value &= 0xffff; 199 *valuep = value; 200 return errmsg; 201 } 202 203 return cgen_parse_unsigned_integer (cd, strp, opindex, valuep); 204 } 205 206 /* -- */ 207 208 const char * m32r_cgen_parse_operand 209 PARAMS ((CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *)); 210 211 /* Main entry point for operand parsing. 212 213 This function is basically just a big switch statement. Earlier versions 214 used tables to look up the function to use, but 215 - if the table contains both assembler and disassembler functions then 216 the disassembler contains much of the assembler and vice-versa, 217 - there's a lot of inlining possibilities as things grow, 218 - using a switch statement avoids the function call overhead. 219 220 This function could be moved into `parse_insn_normal', but keeping it 221 separate makes clear the interface between `parse_insn_normal' and each of 222 the handlers. */ 223 224 const char * 225 m32r_cgen_parse_operand (cd, opindex, strp, fields) 226 CGEN_CPU_DESC cd; 227 int opindex; 228 const char ** strp; 229 CGEN_FIELDS * fields; 230 { 231 const char * errmsg = NULL; 232 /* Used by scalar operands that still need to be parsed. */ 233 long junk ATTRIBUTE_UNUSED; 234 235 switch (opindex) 236 { 237 case M32R_OPERAND_ACC : 238 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_acc); 239 break; 240 case M32R_OPERAND_ACCD : 241 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accd); 242 break; 243 case M32R_OPERAND_ACCS : 244 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accs); 245 break; 246 case M32R_OPERAND_DCR : 247 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r1); 248 break; 249 case M32R_OPERAND_DISP16 : 250 { 251 bfd_vma value; 252 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP16, 0, NULL, & value); 253 fields->f_disp16 = value; 254 } 255 break; 256 case M32R_OPERAND_DISP24 : 257 { 258 bfd_vma value; 259 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP24, 0, NULL, & value); 260 fields->f_disp24 = value; 261 } 262 break; 263 case M32R_OPERAND_DISP8 : 264 { 265 bfd_vma value; 266 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP8, 0, NULL, & value); 267 fields->f_disp8 = value; 268 } 269 break; 270 case M32R_OPERAND_DR : 271 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1); 272 break; 273 case M32R_OPERAND_HASH : 274 errmsg = parse_hash (cd, strp, M32R_OPERAND_HASH, &junk); 275 break; 276 case M32R_OPERAND_HI16 : 277 errmsg = parse_hi16 (cd, strp, M32R_OPERAND_HI16, &fields->f_hi16); 278 break; 279 case M32R_OPERAND_IMM1 : 280 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_IMM1, &fields->f_imm1); 281 break; 282 case M32R_OPERAND_SCR : 283 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r2); 284 break; 285 case M32R_OPERAND_SIMM16 : 286 errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM16, &fields->f_simm16); 287 break; 288 case M32R_OPERAND_SIMM8 : 289 errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM8, &fields->f_simm8); 290 break; 291 case M32R_OPERAND_SLO16 : 292 errmsg = parse_slo16 (cd, strp, M32R_OPERAND_SLO16, &fields->f_simm16); 293 break; 294 case M32R_OPERAND_SR : 295 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2); 296 break; 297 case M32R_OPERAND_SRC1 : 298 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1); 299 break; 300 case M32R_OPERAND_SRC2 : 301 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2); 302 break; 303 case M32R_OPERAND_UIMM16 : 304 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM16, &fields->f_uimm16); 305 break; 306 case M32R_OPERAND_UIMM24 : 307 { 308 bfd_vma value; 309 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_UIMM24, 0, NULL, & value); 310 fields->f_uimm24 = value; 311 } 312 break; 313 case M32R_OPERAND_UIMM4 : 314 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM4, &fields->f_uimm4); 315 break; 316 case M32R_OPERAND_UIMM5 : 317 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM5, &fields->f_uimm5); 318 break; 319 case M32R_OPERAND_ULO16 : 320 errmsg = parse_ulo16 (cd, strp, M32R_OPERAND_ULO16, &fields->f_uimm16); 321 break; 322 323 default : 324 /* xgettext:c-format */ 325 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex); 326 abort (); 327 } 328 329 return errmsg; 330 } 331 332 cgen_parse_fn * const m32r_cgen_parse_handlers[] = 333 { 334 parse_insn_normal, 335 }; 336 337 void 338 m32r_cgen_init_asm (cd) 339 CGEN_CPU_DESC cd; 340 { 341 m32r_cgen_init_opcode_table (cd); 342 m32r_cgen_init_ibld_table (cd); 343 cd->parse_handlers = & m32r_cgen_parse_handlers[0]; 344 cd->parse_operand = m32r_cgen_parse_operand; 345 } 346 347 348 349 /* Regex construction routine. 350 351 This translates an opcode syntax string into a regex string, 352 by replacing any non-character syntax element (such as an 353 opcode) with the pattern '.*' 354 355 It then compiles the regex and stores it in the opcode, for 356 later use by m32r_cgen_assemble_insn 357 358 Returns NULL for success, an error message for failure. */ 359 360 char * 361 m32r_cgen_build_insn_regex (insn) 362 CGEN_INSN *insn; 363 { 364 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); 365 const char *mnem = CGEN_INSN_MNEMONIC (insn); 366 char rxbuf[CGEN_MAX_RX_ELEMENTS]; 367 char *rx = rxbuf; 368 const CGEN_SYNTAX_CHAR_TYPE *syn; 369 int reg_err; 370 371 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); 372 373 /* Mnemonics come first in the syntax string. */ 374 if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) 375 return _("missing mnemonic in syntax string"); 376 ++syn; 377 378 /* Generate a case sensitive regular expression that emulates case 379 insensitive matching in the "C" locale. We cannot generate a case 380 insensitive regular expression because in Turkish locales, 'i' and 'I' 381 are not equal modulo case conversion. */ 382 383 /* Copy the literal mnemonic out of the insn. */ 384 for (; *mnem; mnem++) 385 { 386 char c = *mnem; 387 388 if (ISALPHA (c)) 389 { 390 *rx++ = '['; 391 *rx++ = TOLOWER (c); 392 *rx++ = TOUPPER (c); 393 *rx++ = ']'; 394 } 395 else 396 *rx++ = c; 397 } 398 399 /* Copy any remaining literals from the syntax string into the rx. */ 400 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) 401 { 402 if (CGEN_SYNTAX_CHAR_P (* syn)) 403 { 404 char c = CGEN_SYNTAX_CHAR (* syn); 405 406 switch (c) 407 { 408 /* Escape any regex metacharacters in the syntax. */ 409 case '.': case '[': case '\\': 410 case '*': case '^': case '$': 411 412 #ifdef CGEN_ESCAPE_EXTENDED_REGEX 413 case '?': case '{': case '}': 414 case '(': case ')': case '*': 415 case '|': case '+': case ']': 416 #endif 417 *rx++ = '\\'; 418 *rx++ = c; 419 break; 420 421 default: 422 if (ISALPHA (c)) 423 { 424 *rx++ = '['; 425 *rx++ = TOLOWER (c); 426 *rx++ = TOUPPER (c); 427 *rx++ = ']'; 428 } 429 else 430 *rx++ = c; 431 break; 432 } 433 } 434 else 435 { 436 /* Replace non-syntax fields with globs. */ 437 *rx++ = '.'; 438 *rx++ = '*'; 439 } 440 } 441 442 /* Trailing whitespace ok. */ 443 * rx++ = '['; 444 * rx++ = ' '; 445 * rx++ = '\t'; 446 * rx++ = ']'; 447 * rx++ = '*'; 448 449 /* But anchor it after that. */ 450 * rx++ = '$'; 451 * rx = '\0'; 452 453 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t)); 454 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB); 455 456 if (reg_err == 0) 457 return NULL; 458 else 459 { 460 static char msg[80]; 461 462 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80); 463 regfree ((regex_t *) CGEN_INSN_RX (insn)); 464 free (CGEN_INSN_RX (insn)); 465 (CGEN_INSN_RX (insn)) = NULL; 466 return msg; 467 } 468 } 469 470 471 /* Default insn parser. 472 473 The syntax string is scanned and operands are parsed and stored in FIELDS. 474 Relocs are queued as we go via other callbacks. 475 476 ??? Note that this is currently an all-or-nothing parser. If we fail to 477 parse the instruction, we return 0 and the caller will start over from 478 the beginning. Backtracking will be necessary in parsing subexpressions, 479 but that can be handled there. Not handling backtracking here may get 480 expensive in the case of the m68k. Deal with later. 481 482 Returns NULL for success, an error message for failure. */ 483 484 static const char * 485 parse_insn_normal (cd, insn, strp, fields) 486 CGEN_CPU_DESC cd; 487 const CGEN_INSN *insn; 488 const char **strp; 489 CGEN_FIELDS *fields; 490 { 491 /* ??? Runtime added insns not handled yet. */ 492 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 493 const char *str = *strp; 494 const char *errmsg; 495 const char *p; 496 const CGEN_SYNTAX_CHAR_TYPE * syn; 497 #ifdef CGEN_MNEMONIC_OPERANDS 498 /* FIXME: wip */ 499 int past_opcode_p; 500 #endif 501 502 /* For now we assume the mnemonic is first (there are no leading operands). 503 We can parse it without needing to set up operand parsing. 504 GAS's input scrubber will ensure mnemonics are lowercase, but we may 505 not be called from GAS. */ 506 p = CGEN_INSN_MNEMONIC (insn); 507 while (*p && TOLOWER (*p) == TOLOWER (*str)) 508 ++p, ++str; 509 510 if (* p) 511 return _("unrecognized instruction"); 512 513 #ifndef CGEN_MNEMONIC_OPERANDS 514 if (* str && ! ISSPACE (* str)) 515 return _("unrecognized instruction"); 516 #endif 517 518 CGEN_INIT_PARSE (cd); 519 cgen_init_parse_operand (cd); 520 #ifdef CGEN_MNEMONIC_OPERANDS 521 past_opcode_p = 0; 522 #endif 523 524 /* We don't check for (*str != '\0') here because we want to parse 525 any trailing fake arguments in the syntax string. */ 526 syn = CGEN_SYNTAX_STRING (syntax); 527 528 /* Mnemonics come first for now, ensure valid string. */ 529 if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) 530 abort (); 531 532 ++syn; 533 534 while (* syn != 0) 535 { 536 /* Non operand chars must match exactly. */ 537 if (CGEN_SYNTAX_CHAR_P (* syn)) 538 { 539 /* FIXME: While we allow for non-GAS callers above, we assume the 540 first char after the mnemonic part is a space. */ 541 /* FIXME: We also take inappropriate advantage of the fact that 542 GAS's input scrubber will remove extraneous blanks. */ 543 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn))) 544 { 545 #ifdef CGEN_MNEMONIC_OPERANDS 546 if (CGEN_SYNTAX_CHAR(* syn) == ' ') 547 past_opcode_p = 1; 548 #endif 549 ++ syn; 550 ++ str; 551 } 552 else if (*str) 553 { 554 /* Syntax char didn't match. Can't be this insn. */ 555 static char msg [80]; 556 557 /* xgettext:c-format */ 558 sprintf (msg, _("syntax error (expected char `%c', found `%c')"), 559 CGEN_SYNTAX_CHAR(*syn), *str); 560 return msg; 561 } 562 else 563 { 564 /* Ran out of input. */ 565 static char msg [80]; 566 567 /* xgettext:c-format */ 568 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"), 569 CGEN_SYNTAX_CHAR(*syn)); 570 return msg; 571 } 572 continue; 573 } 574 575 /* We have an operand of some sort. */ 576 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), 577 &str, fields); 578 if (errmsg) 579 return errmsg; 580 581 /* Done with this operand, continue with next one. */ 582 ++ syn; 583 } 584 585 /* If we're at the end of the syntax string, we're done. */ 586 if (* syn == 0) 587 { 588 /* FIXME: For the moment we assume a valid `str' can only contain 589 blanks now. IE: We needn't try again with a longer version of 590 the insn and it is assumed that longer versions of insns appear 591 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */ 592 while (ISSPACE (* str)) 593 ++ str; 594 595 if (* str != '\0') 596 return _("junk at end of line"); /* FIXME: would like to include `str' */ 597 598 return NULL; 599 } 600 601 /* We couldn't parse it. */ 602 return _("unrecognized instruction"); 603 } 604 605 /* Main entry point. 606 This routine is called for each instruction to be assembled. 607 STR points to the insn to be assembled. 608 We assume all necessary tables have been initialized. 609 The assembled instruction, less any fixups, is stored in BUF. 610 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value 611 still needs to be converted to target byte order, otherwise BUF is an array 612 of bytes in target byte order. 613 The result is a pointer to the insn's entry in the opcode table, 614 or NULL if an error occured (an error message will have already been 615 printed). 616 617 Note that when processing (non-alias) macro-insns, 618 this function recurses. 619 620 ??? It's possible to make this cpu-independent. 621 One would have to deal with a few minor things. 622 At this point in time doing so would be more of a curiosity than useful 623 [for example this file isn't _that_ big], but keeping the possibility in 624 mind helps keep the design clean. */ 625 626 const CGEN_INSN * 627 m32r_cgen_assemble_insn (cd, str, fields, buf, errmsg) 628 CGEN_CPU_DESC cd; 629 const char *str; 630 CGEN_FIELDS *fields; 631 CGEN_INSN_BYTES_PTR buf; 632 char **errmsg; 633 { 634 const char *start; 635 CGEN_INSN_LIST *ilist; 636 const char *parse_errmsg = NULL; 637 const char *insert_errmsg = NULL; 638 int recognized_mnemonic = 0; 639 640 /* Skip leading white space. */ 641 while (ISSPACE (* str)) 642 ++ str; 643 644 /* The instructions are stored in hashed lists. 645 Get the first in the list. */ 646 ilist = CGEN_ASM_LOOKUP_INSN (cd, str); 647 648 /* Keep looking until we find a match. */ 649 start = str; 650 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist)) 651 { 652 const CGEN_INSN *insn = ilist->insn; 653 recognized_mnemonic = 1; 654 655 #ifdef CGEN_VALIDATE_INSN_SUPPORTED 656 /* Not usually needed as unsupported opcodes 657 shouldn't be in the hash lists. */ 658 /* Is this insn supported by the selected cpu? */ 659 if (! m32r_cgen_insn_supported (cd, insn)) 660 continue; 661 #endif 662 /* If the RELAX attribute is set, this is an insn that shouldn't be 663 chosen immediately. Instead, it is used during assembler/linker 664 relaxation if possible. */ 665 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0) 666 continue; 667 668 str = start; 669 670 /* Skip this insn if str doesn't look right lexically. */ 671 if (CGEN_INSN_RX (insn) != NULL && 672 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH) 673 continue; 674 675 /* Allow parse/insert handlers to obtain length of insn. */ 676 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); 677 678 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields); 679 if (parse_errmsg != NULL) 680 continue; 681 682 /* ??? 0 is passed for `pc'. */ 683 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf, 684 (bfd_vma) 0); 685 if (insert_errmsg != NULL) 686 continue; 687 688 /* It is up to the caller to actually output the insn and any 689 queued relocs. */ 690 return insn; 691 } 692 693 { 694 static char errbuf[150]; 695 #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS 696 const char *tmp_errmsg; 697 698 /* If requesting verbose error messages, use insert_errmsg. 699 Failing that, use parse_errmsg. */ 700 tmp_errmsg = (insert_errmsg ? insert_errmsg : 701 parse_errmsg ? parse_errmsg : 702 recognized_mnemonic ? 703 _("unrecognized form of instruction") : 704 _("unrecognized instruction")); 705 706 if (strlen (start) > 50) 707 /* xgettext:c-format */ 708 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start); 709 else 710 /* xgettext:c-format */ 711 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start); 712 #else 713 if (strlen (start) > 50) 714 /* xgettext:c-format */ 715 sprintf (errbuf, _("bad instruction `%.50s...'"), start); 716 else 717 /* xgettext:c-format */ 718 sprintf (errbuf, _("bad instruction `%.50s'"), start); 719 #endif 720 721 *errmsg = errbuf; 722 return NULL; 723 } 724 } 725 726 #if 0 /* This calls back to GAS which we can't do without care. */ 727 728 /* Record each member of OPVALS in the assembler's symbol table. 729 This lets GAS parse registers for us. 730 ??? Interesting idea but not currently used. */ 731 732 /* Record each member of OPVALS in the assembler's symbol table. 733 FIXME: Not currently used. */ 734 735 void 736 m32r_cgen_asm_hash_keywords (cd, opvals) 737 CGEN_CPU_DESC cd; 738 CGEN_KEYWORD *opvals; 739 { 740 CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL); 741 const CGEN_KEYWORD_ENTRY * ke; 742 743 while ((ke = cgen_keyword_search_next (& search)) != NULL) 744 { 745 #if 0 /* Unnecessary, should be done in the search routine. */ 746 if (! m32r_cgen_opval_supported (ke)) 747 continue; 748 #endif 749 cgen_asm_record_register (cd, ke->name, ke->value); 750 } 751 } 752 753 #endif /* 0 */ 754