1 /* Print i386 instructions for GDB, the GNU debugger. 2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 3 2001, 2002, 2003, 2004 Free Software Foundation, Inc. 4 5 This file is part of GDB. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 20 21 /* 22 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu) 23 * July 1988 24 * modified by John Hassey (hassey@dg-rtp.dg.com) 25 * x86-64 support added by Jan Hubicka (jh@suse.cz) 26 * VIA PadLock support by Michal Ludvig (mludvig@suse.cz) 27 */ 28 29 /* 30 * The main tables describing the instructions is essentially a copy 31 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386 32 * Programmers Manual. Usually, there is a capital letter, followed 33 * by a small letter. The capital letter tell the addressing mode, 34 * and the small letter tells about the operand size. Refer to 35 * the Intel manual for details. 36 */ 37 38 #include "dis-asm.h" 39 #include "sysdep.h" 40 #include "opintl.h" 41 42 #define MAXLEN 20 43 44 #include <setjmp.h> 45 46 #ifndef UNIXWARE_COMPAT 47 /* Set non-zero for broken, compatible instructions. Set to zero for 48 non-broken opcodes. */ 49 #define UNIXWARE_COMPAT 1 50 #endif 51 52 static int fetch_data (struct disassemble_info *, bfd_byte *); 53 static void ckprefix (void); 54 static const char *prefix_name (int, int); 55 static int print_insn (bfd_vma, disassemble_info *); 56 static void dofloat (int); 57 static void OP_ST (int, int); 58 static void OP_STi (int, int); 59 static int putop (const char *, int); 60 static void oappend (const char *); 61 static void append_seg (void); 62 static void OP_indirE (int, int); 63 static void print_operand_value (char *, int, bfd_vma); 64 static void OP_E (int, int); 65 static void OP_G (int, int); 66 static bfd_vma get64 (void); 67 static bfd_signed_vma get32 (void); 68 static bfd_signed_vma get32s (void); 69 static int get16 (void); 70 static void set_op (bfd_vma, int); 71 static void OP_REG (int, int); 72 static void OP_IMREG (int, int); 73 static void OP_I (int, int); 74 static void OP_I64 (int, int); 75 static void OP_sI (int, int); 76 static void OP_J (int, int); 77 static void OP_SEG (int, int); 78 static void OP_DIR (int, int); 79 static void OP_OFF (int, int); 80 static void OP_OFF64 (int, int); 81 static void ptr_reg (int, int); 82 static void OP_ESreg (int, int); 83 static void OP_DSreg (int, int); 84 static void OP_C (int, int); 85 static void OP_D (int, int); 86 static void OP_T (int, int); 87 static void OP_Rd (int, int); 88 static void OP_MMX (int, int); 89 static void OP_XMM (int, int); 90 static void OP_EM (int, int); 91 static void OP_EX (int, int); 92 static void OP_MS (int, int); 93 static void OP_XS (int, int); 94 static void OP_M (int, int); 95 static void OP_0fae (int, int); 96 static void NOP_Fixup (int, int); 97 static void OP_3DNowSuffix (int, int); 98 static void OP_xcrypt2 (int, int); 99 static void OP_xcrypt (int, int); 100 static void OP_SIMD_Suffix (int, int); 101 static void SIMD_Fixup (int, int); 102 static void PNI_Fixup (int, int); 103 static void INVLPG_Fixup (int, int); 104 static void OP_0f38 (int, int); 105 static void OP_0f3a (int, int); 106 static void BadOp (void); 107 108 struct dis_private { 109 /* Points to first byte not fetched. */ 110 bfd_byte *max_fetched; 111 bfd_byte the_buffer[MAXLEN]; 112 bfd_vma insn_start; 113 int orig_sizeflag; 114 jmp_buf bailout; 115 }; 116 117 /* The opcode for the fwait instruction, which we treat as a prefix 118 when we can. */ 119 #define FWAIT_OPCODE (0x9b) 120 121 /* Set to 1 for 64bit mode disassembly. */ 122 static int mode_64bit; 123 124 /* Flags for the prefixes for the current instruction. See below. */ 125 static int prefixes; 126 127 /* REX prefix the current instruction. See below. */ 128 static int rex; 129 /* Bits of REX we've already used. */ 130 static int rex_used; 131 #define REX_MODE64 8 132 #define REX_EXTX 4 133 #define REX_EXTY 2 134 #define REX_EXTZ 1 135 /* Mark parts used in the REX prefix. When we are testing for 136 empty prefix (for 8bit register REX extension), just mask it 137 out. Otherwise test for REX bit is excuse for existence of REX 138 only in case value is nonzero. */ 139 #define USED_REX(value) \ 140 { \ 141 if (value) \ 142 rex_used |= (rex & value) ? (value) | 0x40 : 0; \ 143 else \ 144 rex_used |= 0x40; \ 145 } 146 147 /* Flags for prefixes which we somehow handled when printing the 148 current instruction. */ 149 static int used_prefixes; 150 151 /* Flags stored in PREFIXES. */ 152 #define PREFIX_REPZ 1 153 #define PREFIX_REPNZ 2 154 #define PREFIX_LOCK 4 155 #define PREFIX_CS 8 156 #define PREFIX_SS 0x10 157 #define PREFIX_DS 0x20 158 #define PREFIX_ES 0x40 159 #define PREFIX_FS 0x80 160 #define PREFIX_GS 0x100 161 #define PREFIX_DATA 0x200 162 #define PREFIX_ADDR 0x400 163 #define PREFIX_FWAIT 0x800 164 165 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive) 166 to ADDR (exclusive) are valid. Returns 1 for success, longjmps 167 on error. */ 168 #define FETCH_DATA(info, addr) \ 169 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \ 170 ? 1 : fetch_data ((info), (addr))) 171 172 static int 173 fetch_data (struct disassemble_info *info, bfd_byte *addr) 174 { 175 int status; 176 struct dis_private *priv = (struct dis_private *) info->private_data; 177 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer); 178 179 status = (*info->read_memory_func) (start, 180 priv->max_fetched, 181 addr - priv->max_fetched, 182 info); 183 if (status != 0) 184 { 185 /* If we did manage to read at least one byte, then 186 print_insn_i386 will do something sensible. Otherwise, print 187 an error. We do that here because this is where we know 188 STATUS. */ 189 if (priv->max_fetched == priv->the_buffer) 190 (*info->memory_error_func) (status, start, info); 191 longjmp (priv->bailout, 1); 192 } 193 else 194 priv->max_fetched = addr; 195 return 1; 196 } 197 198 #define XX NULL, 0 199 200 #define Eb OP_E, b_mode 201 #define Ev OP_E, v_mode 202 #define Ed OP_E, d_mode 203 #define Edq OP_E, dq_mode 204 #define indirEb OP_indirE, b_mode 205 #define indirEv OP_indirE, v_mode 206 #define Ew OP_E, w_mode 207 #define Ma OP_E, v_mode 208 #define M OP_M, 0 /* lea, lgdt, etc. */ 209 #define Mp OP_M, 0 /* 32 or 48 bit memory operand for LDS, LES etc */ 210 #define Gb OP_G, b_mode 211 #define Gv OP_G, v_mode 212 #define Gd OP_G, d_mode 213 #define Gw OP_G, w_mode 214 #define Rd OP_Rd, d_mode 215 #define Rm OP_Rd, m_mode 216 #define Ib OP_I, b_mode 217 #define sIb OP_sI, b_mode /* sign extened byte */ 218 #define Iv OP_I, v_mode 219 #define Iq OP_I, q_mode 220 #define Iv64 OP_I64, v_mode 221 #define Iw OP_I, w_mode 222 #define Jb OP_J, b_mode 223 #define Jv OP_J, v_mode 224 #define Cm OP_C, m_mode 225 #define Dm OP_D, m_mode 226 #define Td OP_T, d_mode 227 228 #define RMeAX OP_REG, eAX_reg 229 #define RMeBX OP_REG, eBX_reg 230 #define RMeCX OP_REG, eCX_reg 231 #define RMeDX OP_REG, eDX_reg 232 #define RMeSP OP_REG, eSP_reg 233 #define RMeBP OP_REG, eBP_reg 234 #define RMeSI OP_REG, eSI_reg 235 #define RMeDI OP_REG, eDI_reg 236 #define RMrAX OP_REG, rAX_reg 237 #define RMrBX OP_REG, rBX_reg 238 #define RMrCX OP_REG, rCX_reg 239 #define RMrDX OP_REG, rDX_reg 240 #define RMrSP OP_REG, rSP_reg 241 #define RMrBP OP_REG, rBP_reg 242 #define RMrSI OP_REG, rSI_reg 243 #define RMrDI OP_REG, rDI_reg 244 #define RMAL OP_REG, al_reg 245 #define RMAL OP_REG, al_reg 246 #define RMCL OP_REG, cl_reg 247 #define RMDL OP_REG, dl_reg 248 #define RMBL OP_REG, bl_reg 249 #define RMAH OP_REG, ah_reg 250 #define RMCH OP_REG, ch_reg 251 #define RMDH OP_REG, dh_reg 252 #define RMBH OP_REG, bh_reg 253 #define RMAX OP_REG, ax_reg 254 #define RMDX OP_REG, dx_reg 255 256 #define eAX OP_IMREG, eAX_reg 257 #define eBX OP_IMREG, eBX_reg 258 #define eCX OP_IMREG, eCX_reg 259 #define eDX OP_IMREG, eDX_reg 260 #define eSP OP_IMREG, eSP_reg 261 #define eBP OP_IMREG, eBP_reg 262 #define eSI OP_IMREG, eSI_reg 263 #define eDI OP_IMREG, eDI_reg 264 #define AL OP_IMREG, al_reg 265 #define AL OP_IMREG, al_reg 266 #define CL OP_IMREG, cl_reg 267 #define DL OP_IMREG, dl_reg 268 #define BL OP_IMREG, bl_reg 269 #define AH OP_IMREG, ah_reg 270 #define CH OP_IMREG, ch_reg 271 #define DH OP_IMREG, dh_reg 272 #define BH OP_IMREG, bh_reg 273 #define AX OP_IMREG, ax_reg 274 #define DX OP_IMREG, dx_reg 275 #define indirDX OP_IMREG, indir_dx_reg 276 277 #define Sw OP_SEG, w_mode 278 #define Ap OP_DIR, 0 279 #define Ob OP_OFF, b_mode 280 #define Ob64 OP_OFF64, b_mode 281 #define Ov OP_OFF, v_mode 282 #define Ov64 OP_OFF64, v_mode 283 #define Xb OP_DSreg, eSI_reg 284 #define Xv OP_DSreg, eSI_reg 285 #define Yb OP_ESreg, eDI_reg 286 #define Yv OP_ESreg, eDI_reg 287 #define DSBX OP_DSreg, eBX_reg 288 289 #define es OP_REG, es_reg 290 #define ss OP_REG, ss_reg 291 #define cs OP_REG, cs_reg 292 #define ds OP_REG, ds_reg 293 #define fs OP_REG, fs_reg 294 #define gs OP_REG, gs_reg 295 296 #define MX OP_MMX, 0 297 #define XM OP_XMM, 0 298 #define EM OP_EM, v_mode 299 #define EX OP_EX, v_mode 300 #define MS OP_MS, v_mode 301 #define XS OP_XS, v_mode 302 #define OPSUF OP_3DNowSuffix, 0 303 #define OPXCRYPT OP_xcrypt, 0 304 #define OPXCRYPT2 OP_xcrypt2, 0 305 #define OPSIMD OP_SIMD_Suffix, 0 306 #define OP0F38 OP_0f38, 0 307 #define OP0F3A OP_0f3a, 0 308 309 #define cond_jump_flag NULL, cond_jump_mode 310 #define loop_jcxz_flag NULL, loop_jcxz_mode 311 312 /* bits in sizeflag */ 313 #define SUFFIX_ALWAYS 4 314 #define AFLAG 2 315 #define DFLAG 1 316 317 #define b_mode 1 /* byte operand */ 318 #define v_mode 2 /* operand size depends on prefixes */ 319 #define w_mode 3 /* word operand */ 320 #define d_mode 4 /* double word operand */ 321 #define q_mode 5 /* quad word operand */ 322 #define x_mode 6 323 #define m_mode 7 /* d_mode in 32bit, q_mode in 64bit mode. */ 324 #define cond_jump_mode 8 325 #define loop_jcxz_mode 9 326 #define dq_mode 10 /* operand size depends on REX prefixes. */ 327 328 #define es_reg 100 329 #define cs_reg 101 330 #define ss_reg 102 331 #define ds_reg 103 332 #define fs_reg 104 333 #define gs_reg 105 334 335 #define eAX_reg 108 336 #define eCX_reg 109 337 #define eDX_reg 110 338 #define eBX_reg 111 339 #define eSP_reg 112 340 #define eBP_reg 113 341 #define eSI_reg 114 342 #define eDI_reg 115 343 344 #define al_reg 116 345 #define cl_reg 117 346 #define dl_reg 118 347 #define bl_reg 119 348 #define ah_reg 120 349 #define ch_reg 121 350 #define dh_reg 122 351 #define bh_reg 123 352 353 #define ax_reg 124 354 #define cx_reg 125 355 #define dx_reg 126 356 #define bx_reg 127 357 #define sp_reg 128 358 #define bp_reg 129 359 #define si_reg 130 360 #define di_reg 131 361 362 #define rAX_reg 132 363 #define rCX_reg 133 364 #define rDX_reg 134 365 #define rBX_reg 135 366 #define rSP_reg 136 367 #define rBP_reg 137 368 #define rSI_reg 138 369 #define rDI_reg 139 370 371 #define indir_dx_reg 150 372 373 #define FLOATCODE 1 374 #define USE_GROUPS 2 375 #define USE_PREFIX_USER_TABLE 3 376 #define X86_64_SPECIAL 4 377 378 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0 379 380 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0 381 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0 382 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0 383 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0 384 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0 385 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0 386 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0 387 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0 388 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0 389 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0 390 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0 391 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0 392 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0 393 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0 394 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0 395 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0 396 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0 397 #define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0 398 #define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0 399 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0 400 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0 401 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0 402 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0 403 404 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0 405 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0 406 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0 407 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0 408 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0 409 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0 410 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0 411 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0 412 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0 413 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0 414 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0 415 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0 416 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0 417 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0 418 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0 419 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0 420 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0 421 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0 422 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0 423 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0 424 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0 425 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0 426 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0 427 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0 428 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0 429 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0 430 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0 431 #define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0 432 #define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0 433 #define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0 434 #define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0 435 #define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0 436 #define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0 437 438 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0 439 440 typedef void (*op_rtn) (int bytemode, int sizeflag); 441 442 struct dis386 { 443 const char *name; 444 op_rtn op1; 445 int bytemode1; 446 op_rtn op2; 447 int bytemode2; 448 op_rtn op3; 449 int bytemode3; 450 }; 451 452 /* Upper case letters in the instruction names here are macros. 453 'A' => print 'b' if no register operands or suffix_always is true 454 'B' => print 'b' if suffix_always is true 455 'E' => print 'e' if 32-bit form of jcxz 456 'F' => print 'w' or 'l' depending on address size prefix (loop insns) 457 'H' => print ",pt" or ",pn" branch hint 458 'L' => print 'l' if suffix_always is true 459 'N' => print 'n' if instruction has no wait "prefix" 460 'O' => print 'd', or 'o' 461 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix, 462 . or suffix_always is true. print 'q' if rex prefix is present. 463 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always 464 . is true 465 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode) 466 'S' => print 'w', 'l' or 'q' if suffix_always is true 467 'T' => print 'q' in 64bit mode and behave as 'P' otherwise 468 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise 469 'X' => print 's', 'd' depending on data16 prefix (for XMM) 470 'W' => print 'b' or 'w' ("w" or "de" in intel mode) 471 'Y' => 'q' if instruction has an REX 64bit overwrite prefix 472 473 Many of the above letters print nothing in Intel mode. See "putop" 474 for the details. 475 476 Braces '{' and '}', and vertical bars '|', indicate alternative 477 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel 478 modes. In cases where there are only two alternatives, the X86_64 479 instruction is reserved, and "(bad)" is printed. 480 */ 481 482 static const struct dis386 dis386[] = { 483 /* 00 */ 484 { "addB", Eb, Gb, XX }, 485 { "addS", Ev, Gv, XX }, 486 { "addB", Gb, Eb, XX }, 487 { "addS", Gv, Ev, XX }, 488 { "addB", AL, Ib, XX }, 489 { "addS", eAX, Iv, XX }, 490 { "push{T|}", es, XX, XX }, 491 { "pop{T|}", es, XX, XX }, 492 /* 08 */ 493 { "orB", Eb, Gb, XX }, 494 { "orS", Ev, Gv, XX }, 495 { "orB", Gb, Eb, XX }, 496 { "orS", Gv, Ev, XX }, 497 { "orB", AL, Ib, XX }, 498 { "orS", eAX, Iv, XX }, 499 { "push{T|}", cs, XX, XX }, 500 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */ 501 /* 10 */ 502 { "adcB", Eb, Gb, XX }, 503 { "adcS", Ev, Gv, XX }, 504 { "adcB", Gb, Eb, XX }, 505 { "adcS", Gv, Ev, XX }, 506 { "adcB", AL, Ib, XX }, 507 { "adcS", eAX, Iv, XX }, 508 { "push{T|}", ss, XX, XX }, 509 { "popT|}", ss, XX, XX }, 510 /* 18 */ 511 { "sbbB", Eb, Gb, XX }, 512 { "sbbS", Ev, Gv, XX }, 513 { "sbbB", Gb, Eb, XX }, 514 { "sbbS", Gv, Ev, XX }, 515 { "sbbB", AL, Ib, XX }, 516 { "sbbS", eAX, Iv, XX }, 517 { "push{T|}", ds, XX, XX }, 518 { "pop{T|}", ds, XX, XX }, 519 /* 20 */ 520 { "andB", Eb, Gb, XX }, 521 { "andS", Ev, Gv, XX }, 522 { "andB", Gb, Eb, XX }, 523 { "andS", Gv, Ev, XX }, 524 { "andB", AL, Ib, XX }, 525 { "andS", eAX, Iv, XX }, 526 { "(bad)", XX, XX, XX }, /* SEG ES prefix */ 527 { "daa{|}", XX, XX, XX }, 528 /* 28 */ 529 { "subB", Eb, Gb, XX }, 530 { "subS", Ev, Gv, XX }, 531 { "subB", Gb, Eb, XX }, 532 { "subS", Gv, Ev, XX }, 533 { "subB", AL, Ib, XX }, 534 { "subS", eAX, Iv, XX }, 535 { "(bad)", XX, XX, XX }, /* SEG CS prefix */ 536 { "das{|}", XX, XX, XX }, 537 /* 30 */ 538 { "xorB", Eb, Gb, XX }, 539 { "xorS", Ev, Gv, XX }, 540 { "xorB", Gb, Eb, XX }, 541 { "xorS", Gv, Ev, XX }, 542 { "xorB", AL, Ib, XX }, 543 { "xorS", eAX, Iv, XX }, 544 { "(bad)", XX, XX, XX }, /* SEG SS prefix */ 545 { "aaa{|}", XX, XX, XX }, 546 /* 38 */ 547 { "cmpB", Eb, Gb, XX }, 548 { "cmpS", Ev, Gv, XX }, 549 { "cmpB", Gb, Eb, XX }, 550 { "cmpS", Gv, Ev, XX }, 551 { "cmpB", AL, Ib, XX }, 552 { "cmpS", eAX, Iv, XX }, 553 { "(bad)", XX, XX, XX }, /* SEG DS prefix */ 554 { "aas{|}", XX, XX, XX }, 555 /* 40 */ 556 { "inc{S|}", RMeAX, XX, XX }, 557 { "inc{S|}", RMeCX, XX, XX }, 558 { "inc{S|}", RMeDX, XX, XX }, 559 { "inc{S|}", RMeBX, XX, XX }, 560 { "inc{S|}", RMeSP, XX, XX }, 561 { "inc{S|}", RMeBP, XX, XX }, 562 { "inc{S|}", RMeSI, XX, XX }, 563 { "inc{S|}", RMeDI, XX, XX }, 564 /* 48 */ 565 { "dec{S|}", RMeAX, XX, XX }, 566 { "dec{S|}", RMeCX, XX, XX }, 567 { "dec{S|}", RMeDX, XX, XX }, 568 { "dec{S|}", RMeBX, XX, XX }, 569 { "dec{S|}", RMeSP, XX, XX }, 570 { "dec{S|}", RMeBP, XX, XX }, 571 { "dec{S|}", RMeSI, XX, XX }, 572 { "dec{S|}", RMeDI, XX, XX }, 573 /* 50 */ 574 { "pushS", RMrAX, XX, XX }, 575 { "pushS", RMrCX, XX, XX }, 576 { "pushS", RMrDX, XX, XX }, 577 { "pushS", RMrBX, XX, XX }, 578 { "pushS", RMrSP, XX, XX }, 579 { "pushS", RMrBP, XX, XX }, 580 { "pushS", RMrSI, XX, XX }, 581 { "pushS", RMrDI, XX, XX }, 582 /* 58 */ 583 { "popS", RMrAX, XX, XX }, 584 { "popS", RMrCX, XX, XX }, 585 { "popS", RMrDX, XX, XX }, 586 { "popS", RMrBX, XX, XX }, 587 { "popS", RMrSP, XX, XX }, 588 { "popS", RMrBP, XX, XX }, 589 { "popS", RMrSI, XX, XX }, 590 { "popS", RMrDI, XX, XX }, 591 /* 60 */ 592 { "pusha{P|}", XX, XX, XX }, 593 { "popa{P|}", XX, XX, XX }, 594 { "bound{S|}", Gv, Ma, XX }, 595 { X86_64_0 }, 596 { "(bad)", XX, XX, XX }, /* seg fs */ 597 { "(bad)", XX, XX, XX }, /* seg gs */ 598 { "(bad)", XX, XX, XX }, /* op size prefix */ 599 { "(bad)", XX, XX, XX }, /* adr size prefix */ 600 /* 68 */ 601 { "pushT", Iq, XX, XX }, 602 { "imulS", Gv, Ev, Iv }, 603 { "pushT", sIb, XX, XX }, 604 { "imulS", Gv, Ev, sIb }, 605 { "ins{b||b|}", Yb, indirDX, XX }, 606 { "ins{R||R|}", Yv, indirDX, XX }, 607 { "outs{b||b|}", indirDX, Xb, XX }, 608 { "outs{R||R|}", indirDX, Xv, XX }, 609 /* 70 */ 610 { "joH", Jb, XX, cond_jump_flag }, 611 { "jnoH", Jb, XX, cond_jump_flag }, 612 { "jbH", Jb, XX, cond_jump_flag }, 613 { "jaeH", Jb, XX, cond_jump_flag }, 614 { "jeH", Jb, XX, cond_jump_flag }, 615 { "jneH", Jb, XX, cond_jump_flag }, 616 { "jbeH", Jb, XX, cond_jump_flag }, 617 { "jaH", Jb, XX, cond_jump_flag }, 618 /* 78 */ 619 { "jsH", Jb, XX, cond_jump_flag }, 620 { "jnsH", Jb, XX, cond_jump_flag }, 621 { "jpH", Jb, XX, cond_jump_flag }, 622 { "jnpH", Jb, XX, cond_jump_flag }, 623 { "jlH", Jb, XX, cond_jump_flag }, 624 { "jgeH", Jb, XX, cond_jump_flag }, 625 { "jleH", Jb, XX, cond_jump_flag }, 626 { "jgH", Jb, XX, cond_jump_flag }, 627 /* 80 */ 628 { GRP1b }, 629 { GRP1S }, 630 { "(bad)", XX, XX, XX }, 631 { GRP1Ss }, 632 { "testB", Eb, Gb, XX }, 633 { "testS", Ev, Gv, XX }, 634 { "xchgB", Eb, Gb, XX }, 635 { "xchgS", Ev, Gv, XX }, 636 /* 88 */ 637 { "movB", Eb, Gb, XX }, 638 { "movS", Ev, Gv, XX }, 639 { "movB", Gb, Eb, XX }, 640 { "movS", Gv, Ev, XX }, 641 { "movQ", Ev, Sw, XX }, 642 { "leaS", Gv, M, XX }, 643 { "movQ", Sw, Ev, XX }, 644 { "popU", Ev, XX, XX }, 645 /* 90 */ 646 { "nop", NOP_Fixup, 0, XX, XX }, 647 { "xchgS", RMeCX, eAX, XX }, 648 { "xchgS", RMeDX, eAX, XX }, 649 { "xchgS", RMeBX, eAX, XX }, 650 { "xchgS", RMeSP, eAX, XX }, 651 { "xchgS", RMeBP, eAX, XX }, 652 { "xchgS", RMeSI, eAX, XX }, 653 { "xchgS", RMeDI, eAX, XX }, 654 /* 98 */ 655 { "cW{tR||tR|}", XX, XX, XX }, 656 { "cR{tO||tO|}", XX, XX, XX }, 657 { "lcall{T|}", Ap, XX, XX }, 658 { "(bad)", XX, XX, XX }, /* fwait */ 659 { "pushfT", XX, XX, XX }, 660 { "popfT", XX, XX, XX }, 661 { "sahf{|}", XX, XX, XX }, 662 { "lahf{|}", XX, XX, XX }, 663 /* a0 */ 664 { "movB", AL, Ob64, XX }, 665 { "movS", eAX, Ov64, XX }, 666 { "movB", Ob64, AL, XX }, 667 { "movS", Ov64, eAX, XX }, 668 { "movs{b||b|}", Yb, Xb, XX }, 669 { "movs{R||R|}", Yv, Xv, XX }, 670 { "cmps{b||b|}", Xb, Yb, XX }, 671 { "cmps{R||R|}", Xv, Yv, XX }, 672 /* a8 */ 673 { "testB", AL, Ib, XX }, 674 { "testS", eAX, Iv, XX }, 675 { "stosB", Yb, AL, XX }, 676 { "stosS", Yv, eAX, XX }, 677 { "lodsB", AL, Xb, XX }, 678 { "lodsS", eAX, Xv, XX }, 679 { "scasB", AL, Yb, XX }, 680 { "scasS", eAX, Yv, XX }, 681 /* b0 */ 682 { "movB", RMAL, Ib, XX }, 683 { "movB", RMCL, Ib, XX }, 684 { "movB", RMDL, Ib, XX }, 685 { "movB", RMBL, Ib, XX }, 686 { "movB", RMAH, Ib, XX }, 687 { "movB", RMCH, Ib, XX }, 688 { "movB", RMDH, Ib, XX }, 689 { "movB", RMBH, Ib, XX }, 690 /* b8 */ 691 { "movS", RMeAX, Iv64, XX }, 692 { "movS", RMeCX, Iv64, XX }, 693 { "movS", RMeDX, Iv64, XX }, 694 { "movS", RMeBX, Iv64, XX }, 695 { "movS", RMeSP, Iv64, XX }, 696 { "movS", RMeBP, Iv64, XX }, 697 { "movS", RMeSI, Iv64, XX }, 698 { "movS", RMeDI, Iv64, XX }, 699 /* c0 */ 700 { GRP2b }, 701 { GRP2S }, 702 { "retT", Iw, XX, XX }, 703 { "retT", XX, XX, XX }, 704 { "les{S|}", Gv, Mp, XX }, 705 { "ldsS", Gv, Mp, XX }, 706 { "movA", Eb, Ib, XX }, 707 { "movQ", Ev, Iv, XX }, 708 /* c8 */ 709 { "enterT", Iw, Ib, XX }, 710 { "leaveT", XX, XX, XX }, 711 { "lretP", Iw, XX, XX }, 712 { "lretP", XX, XX, XX }, 713 { "int3", XX, XX, XX }, 714 { "int", Ib, XX, XX }, 715 { "into{|}", XX, XX, XX }, 716 { "iretP", XX, XX, XX }, 717 /* d0 */ 718 { GRP2b_one }, 719 { GRP2S_one }, 720 { GRP2b_cl }, 721 { GRP2S_cl }, 722 { "aam{|}", sIb, XX, XX }, 723 { "aad{|}", sIb, XX, XX }, 724 { "(bad)", XX, XX, XX }, 725 { "xlat", DSBX, XX, XX }, 726 /* d8 */ 727 { FLOAT }, 728 { FLOAT }, 729 { FLOAT }, 730 { FLOAT }, 731 { FLOAT }, 732 { FLOAT }, 733 { FLOAT }, 734 { FLOAT }, 735 /* e0 */ 736 { "loopneFH", Jb, XX, loop_jcxz_flag }, 737 { "loopeFH", Jb, XX, loop_jcxz_flag }, 738 { "loopFH", Jb, XX, loop_jcxz_flag }, 739 { "jEcxzH", Jb, XX, loop_jcxz_flag }, 740 { "inB", AL, Ib, XX }, 741 { "inS", eAX, Ib, XX }, 742 { "outB", Ib, AL, XX }, 743 { "outS", Ib, eAX, XX }, 744 /* e8 */ 745 { "callT", Jv, XX, XX }, 746 { "jmpT", Jv, XX, XX }, 747 { "ljmp{T|}", Ap, XX, XX }, 748 { "jmp", Jb, XX, XX }, 749 { "inB", AL, indirDX, XX }, 750 { "inS", eAX, indirDX, XX }, 751 { "outB", indirDX, AL, XX }, 752 { "outS", indirDX, eAX, XX }, 753 /* f0 */ 754 { "(bad)", XX, XX, XX }, /* lock prefix */ 755 { "icebp", XX, XX, XX }, 756 { "(bad)", XX, XX, XX }, /* repne */ 757 { "(bad)", XX, XX, XX }, /* repz */ 758 { "hlt", XX, XX, XX }, 759 { "cmc", XX, XX, XX }, 760 { GRP3b }, 761 { GRP3S }, 762 /* f8 */ 763 { "clc", XX, XX, XX }, 764 { "stc", XX, XX, XX }, 765 { "cli", XX, XX, XX }, 766 { "sti", XX, XX, XX }, 767 { "cld", XX, XX, XX }, 768 { "std", XX, XX, XX }, 769 { GRP4 }, 770 { GRP5 }, 771 }; 772 773 static const struct dis386 dis386_twobyte[] = { 774 /* 00 */ 775 { GRP6 }, 776 { GRP7 }, 777 { "larS", Gv, Ew, XX }, 778 { "lslS", Gv, Ew, XX }, 779 { "(bad)", XX, XX, XX }, 780 { "syscall", XX, XX, XX }, 781 { "clts", XX, XX, XX }, 782 { "sysretP", XX, XX, XX }, 783 /* 08 */ 784 { "invd", XX, XX, XX }, 785 { "wbinvd", XX, XX, XX }, 786 { "(bad)", XX, XX, XX }, 787 { "ud2a", XX, XX, XX }, 788 { "(bad)", XX, XX, XX }, 789 { GRPAMD }, 790 { "femms", XX, XX, XX }, 791 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */ 792 /* 10 */ 793 { PREGRP8 }, 794 { PREGRP9 }, 795 { PREGRP30 }, 796 { "movlpX", EX, XM, SIMD_Fixup, 'h' }, 797 { "unpcklpX", XM, EX, XX }, 798 { "unpckhpX", XM, EX, XX }, 799 { PREGRP31 }, 800 { "movhpX", EX, XM, SIMD_Fixup, 'l' }, 801 /* 18 */ 802 { GRP14 }, 803 { "(bad)", XX, XX, XX }, 804 { "(bad)", XX, XX, XX }, 805 { "(bad)", XX, XX, XX }, 806 { "(bad)", XX, XX, XX }, 807 { "(bad)", XX, XX, XX }, 808 { "(bad)", XX, XX, XX }, 809 { "(bad)", XX, XX, XX }, 810 /* 20 */ 811 { "movL", Rm, Cm, XX }, 812 { "movL", Rm, Dm, XX }, 813 { "movL", Cm, Rm, XX }, 814 { "movL", Dm, Rm, XX }, 815 { "movL", Rd, Td, XX }, 816 { "(bad)", XX, XX, XX }, 817 { "movL", Td, Rd, XX }, 818 { "(bad)", XX, XX, XX }, 819 /* 28 */ 820 { "movapX", XM, EX, XX }, 821 { "movapX", EX, XM, XX }, 822 { PREGRP2 }, 823 { "movntpX", Ev, XM, XX }, 824 { PREGRP4 }, 825 { PREGRP3 }, 826 { "ucomisX", XM,EX, XX }, 827 { "comisX", XM,EX, XX }, 828 /* 30 */ 829 { "wrmsr", XX, XX, XX }, 830 { "rdtsc", XX, XX, XX }, 831 { "rdmsr", XX, XX, XX }, 832 { "rdpmc", XX, XX, XX }, 833 { "sysenter", XX, XX, XX }, 834 { "sysexit", XX, XX, XX }, 835 { "(bad)", XX, XX, XX }, 836 { "(bad)", XX, XX, XX }, 837 /* 38 */ 838 { "", OP0F38, XX, XX }, 839 { "(bad)", XX, XX, XX }, 840 { "", OP0F3A, XX, XX }, 841 { "(bad)", XX, XX, XX }, 842 { "(bad)", XX, XX, XX }, 843 { "(bad)", XX, XX, XX }, 844 { "(bad)", XX, XX, XX }, 845 { "(bad)", XX, XX, XX }, 846 /* 40 */ 847 { "cmovo", Gv, Ev, XX }, 848 { "cmovno", Gv, Ev, XX }, 849 { "cmovb", Gv, Ev, XX }, 850 { "cmovae", Gv, Ev, XX }, 851 { "cmove", Gv, Ev, XX }, 852 { "cmovne", Gv, Ev, XX }, 853 { "cmovbe", Gv, Ev, XX }, 854 { "cmova", Gv, Ev, XX }, 855 /* 48 */ 856 { "cmovs", Gv, Ev, XX }, 857 { "cmovns", Gv, Ev, XX }, 858 { "cmovp", Gv, Ev, XX }, 859 { "cmovnp", Gv, Ev, XX }, 860 { "cmovl", Gv, Ev, XX }, 861 { "cmovge", Gv, Ev, XX }, 862 { "cmovle", Gv, Ev, XX }, 863 { "cmovg", Gv, Ev, XX }, 864 /* 50 */ 865 { "movmskpX", Gd, XS, XX }, 866 { PREGRP13 }, 867 { PREGRP12 }, 868 { PREGRP11 }, 869 { "andpX", XM, EX, XX }, 870 { "andnpX", XM, EX, XX }, 871 { "orpX", XM, EX, XX }, 872 { "xorpX", XM, EX, XX }, 873 /* 58 */ 874 { PREGRP0 }, 875 { PREGRP10 }, 876 { PREGRP17 }, 877 { PREGRP16 }, 878 { PREGRP14 }, 879 { PREGRP7 }, 880 { PREGRP5 }, 881 { PREGRP6 }, 882 /* 60 */ 883 { "punpcklbw", MX, EM, XX }, 884 { "punpcklwd", MX, EM, XX }, 885 { "punpckldq", MX, EM, XX }, 886 { "packsswb", MX, EM, XX }, 887 { "pcmpgtb", MX, EM, XX }, 888 { "pcmpgtw", MX, EM, XX }, 889 { "pcmpgtd", MX, EM, XX }, 890 { "packuswb", MX, EM, XX }, 891 /* 68 */ 892 { "punpckhbw", MX, EM, XX }, 893 { "punpckhwd", MX, EM, XX }, 894 { "punpckhdq", MX, EM, XX }, 895 { "packssdw", MX, EM, XX }, 896 { PREGRP26 }, 897 { PREGRP24 }, 898 { "movd", MX, Edq, XX }, 899 { PREGRP19 }, 900 /* 70 */ 901 { PREGRP22 }, 902 { GRP10 }, 903 { GRP11 }, 904 { GRP12 }, 905 { "pcmpeqb", MX, EM, XX }, 906 { "pcmpeqw", MX, EM, XX }, 907 { "pcmpeqd", MX, EM, XX }, 908 { "emms", XX, XX, XX }, 909 /* 78 */ 910 { "(bad)", XX, XX, XX }, 911 { "(bad)", XX, XX, XX }, 912 { "(bad)", XX, XX, XX }, 913 { "(bad)", XX, XX, XX }, 914 { PREGRP28 }, 915 { PREGRP29 }, 916 { PREGRP23 }, 917 { PREGRP20 }, 918 /* 80 */ 919 { "joH", Jv, XX, cond_jump_flag }, 920 { "jnoH", Jv, XX, cond_jump_flag }, 921 { "jbH", Jv, XX, cond_jump_flag }, 922 { "jaeH", Jv, XX, cond_jump_flag }, 923 { "jeH", Jv, XX, cond_jump_flag }, 924 { "jneH", Jv, XX, cond_jump_flag }, 925 { "jbeH", Jv, XX, cond_jump_flag }, 926 { "jaH", Jv, XX, cond_jump_flag }, 927 /* 88 */ 928 { "jsH", Jv, XX, cond_jump_flag }, 929 { "jnsH", Jv, XX, cond_jump_flag }, 930 { "jpH", Jv, XX, cond_jump_flag }, 931 { "jnpH", Jv, XX, cond_jump_flag }, 932 { "jlH", Jv, XX, cond_jump_flag }, 933 { "jgeH", Jv, XX, cond_jump_flag }, 934 { "jleH", Jv, XX, cond_jump_flag }, 935 { "jgH", Jv, XX, cond_jump_flag }, 936 /* 90 */ 937 { "seto", Eb, XX, XX }, 938 { "setno", Eb, XX, XX }, 939 { "setb", Eb, XX, XX }, 940 { "setae", Eb, XX, XX }, 941 { "sete", Eb, XX, XX }, 942 { "setne", Eb, XX, XX }, 943 { "setbe", Eb, XX, XX }, 944 { "seta", Eb, XX, XX }, 945 /* 98 */ 946 { "sets", Eb, XX, XX }, 947 { "setns", Eb, XX, XX }, 948 { "setp", Eb, XX, XX }, 949 { "setnp", Eb, XX, XX }, 950 { "setl", Eb, XX, XX }, 951 { "setge", Eb, XX, XX }, 952 { "setle", Eb, XX, XX }, 953 { "setg", Eb, XX, XX }, 954 /* a0 */ 955 { "pushT", fs, XX, XX }, 956 { "popT", fs, XX, XX }, 957 { "cpuid", XX, XX, XX }, 958 { "btS", Ev, Gv, XX }, 959 { "shldS", Ev, Gv, Ib }, 960 { "shldS", Ev, Gv, CL }, 961 { "", OPXCRYPT2, XX, XX }, 962 { "", OPXCRYPT, XX, XX }, 963 /* a8 */ 964 { "pushT", gs, XX, XX }, 965 { "popT", gs, XX, XX }, 966 { "rsm", XX, XX, XX }, 967 { "btsS", Ev, Gv, XX }, 968 { "shrdS", Ev, Gv, Ib }, 969 { "shrdS", Ev, Gv, CL }, 970 { GRP13 }, 971 { "imulS", Gv, Ev, XX }, 972 /* b0 */ 973 { "cmpxchgB", Eb, Gb, XX }, 974 { "cmpxchgS", Ev, Gv, XX }, 975 { "lssS", Gv, Mp, XX }, 976 { "btrS", Ev, Gv, XX }, 977 { "lfsS", Gv, Mp, XX }, 978 { "lgsS", Gv, Mp, XX }, 979 { "movz{bR|x|bR|x}", Gv, Eb, XX }, 980 { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */ 981 /* b8 */ 982 { "(bad)", XX, XX, XX }, 983 { "ud2b", XX, XX, XX }, 984 { GRP8 }, 985 { "btcS", Ev, Gv, XX }, 986 { "bsfS", Gv, Ev, XX }, 987 { "bsrS", Gv, Ev, XX }, 988 { "movs{bR|x|bR|x}", Gv, Eb, XX }, 989 { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */ 990 /* c0 */ 991 { "xaddB", Eb, Gb, XX }, 992 { "xaddS", Ev, Gv, XX }, 993 { PREGRP1 }, 994 { "movntiS", Ev, Gv, XX }, 995 { "pinsrw", MX, Ed, Ib }, 996 { "pextrw", Gd, MS, Ib }, 997 { "shufpX", XM, EX, Ib }, 998 { GRP9 }, 999 /* c8 */ 1000 { "bswap", RMeAX, XX, XX }, 1001 { "bswap", RMeCX, XX, XX }, 1002 { "bswap", RMeDX, XX, XX }, 1003 { "bswap", RMeBX, XX, XX }, 1004 { "bswap", RMeSP, XX, XX }, 1005 { "bswap", RMeBP, XX, XX }, 1006 { "bswap", RMeSI, XX, XX }, 1007 { "bswap", RMeDI, XX, XX }, 1008 /* d0 */ 1009 { PREGRP27 }, 1010 { "psrlw", MX, EM, XX }, 1011 { "psrld", MX, EM, XX }, 1012 { "psrlq", MX, EM, XX }, 1013 { "paddq", MX, EM, XX }, 1014 { "pmullw", MX, EM, XX }, 1015 { PREGRP21 }, 1016 { "pmovmskb", Gd, MS, XX }, 1017 /* d8 */ 1018 { "psubusb", MX, EM, XX }, 1019 { "psubusw", MX, EM, XX }, 1020 { "pminub", MX, EM, XX }, 1021 { "pand", MX, EM, XX }, 1022 { "paddusb", MX, EM, XX }, 1023 { "paddusw", MX, EM, XX }, 1024 { "pmaxub", MX, EM, XX }, 1025 { "pandn", MX, EM, XX }, 1026 /* e0 */ 1027 { "pavgb", MX, EM, XX }, 1028 { "psraw", MX, EM, XX }, 1029 { "psrad", MX, EM, XX }, 1030 { "pavgw", MX, EM, XX }, 1031 { "pmulhuw", MX, EM, XX }, 1032 { "pmulhw", MX, EM, XX }, 1033 { PREGRP15 }, 1034 { PREGRP25 }, 1035 /* e8 */ 1036 { "psubsb", MX, EM, XX }, 1037 { "psubsw", MX, EM, XX }, 1038 { "pminsw", MX, EM, XX }, 1039 { "por", MX, EM, XX }, 1040 { "paddsb", MX, EM, XX }, 1041 { "paddsw", MX, EM, XX }, 1042 { "pmaxsw", MX, EM, XX }, 1043 { "pxor", MX, EM, XX }, 1044 /* f0 */ 1045 { PREGRP32 }, 1046 { "psllw", MX, EM, XX }, 1047 { "pslld", MX, EM, XX }, 1048 { "psllq", MX, EM, XX }, 1049 { "pmuludq", MX, EM, XX }, 1050 { "pmaddwd", MX, EM, XX }, 1051 { "psadbw", MX, EM, XX }, 1052 { PREGRP18 }, 1053 /* f8 */ 1054 { "psubb", MX, EM, XX }, 1055 { "psubw", MX, EM, XX }, 1056 { "psubd", MX, EM, XX }, 1057 { "psubq", MX, EM, XX }, 1058 { "paddb", MX, EM, XX }, 1059 { "paddw", MX, EM, XX }, 1060 { "paddd", MX, EM, XX }, 1061 { "(bad)", XX, XX, XX } 1062 }; 1063 1064 static const unsigned char onebyte_has_modrm[256] = { 1065 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1066 /* ------------------------------- */ 1067 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */ 1068 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */ 1069 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */ 1070 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */ 1071 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */ 1072 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */ 1073 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */ 1074 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */ 1075 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */ 1076 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */ 1077 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */ 1078 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */ 1079 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */ 1080 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */ 1081 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */ 1082 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */ 1083 /* ------------------------------- */ 1084 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1085 }; 1086 1087 static const unsigned char twobyte_has_modrm[256] = { 1088 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1089 /* ------------------------------- */ 1090 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */ 1091 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */ 1092 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */ 1093 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1094 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */ 1095 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */ 1096 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */ 1097 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,1,1,1,1, /* 7f */ 1098 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1099 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */ 1100 /* a0 */ 0,0,0,1,1,1,0,1,0,0,0,1,1,1,1,1, /* af */ 1101 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */ 1102 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */ 1103 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */ 1104 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */ 1105 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */ 1106 /* ------------------------------- */ 1107 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1108 }; 1109 1110 static const unsigned char twobyte_uses_SSE_prefix[256] = { 1111 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1112 /* ------------------------------- */ 1113 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1114 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */ 1115 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */ 1116 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */ 1117 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1118 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */ 1119 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */ 1120 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1, /* 7f */ 1121 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1122 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1123 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1124 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1125 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1126 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */ 1127 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */ 1128 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */ 1129 /* ------------------------------- */ 1130 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1131 }; 1132 1133 static char obuf[100]; 1134 static char *obufp; 1135 static char scratchbuf[100]; 1136 static unsigned char *start_codep; 1137 static unsigned char *insn_codep; 1138 static unsigned char *codep; 1139 static disassemble_info *the_info; 1140 static int mod; 1141 static int rm; 1142 static int reg; 1143 static unsigned char need_modrm; 1144 1145 /* If we are accessing mod/rm/reg without need_modrm set, then the 1146 values are stale. Hitting this abort likely indicates that you 1147 need to update onebyte_has_modrm or twobyte_has_modrm. */ 1148 #define MODRM_CHECK if (!need_modrm) abort () 1149 1150 static const char **names64; 1151 static const char **names32; 1152 static const char **names16; 1153 static const char **names8; 1154 static const char **names8rex; 1155 static const char **names_seg; 1156 static const char **index16; 1157 1158 static const char *intel_names64[] = { 1159 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi", 1160 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 1161 }; 1162 static const char *intel_names32[] = { 1163 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi", 1164 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d" 1165 }; 1166 static const char *intel_names16[] = { 1167 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di", 1168 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w" 1169 }; 1170 static const char *intel_names8[] = { 1171 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh", 1172 }; 1173 static const char *intel_names8rex[] = { 1174 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil", 1175 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b" 1176 }; 1177 static const char *intel_names_seg[] = { 1178 "es", "cs", "ss", "ds", "fs", "gs", "?", "?", 1179 }; 1180 static const char *intel_index16[] = { 1181 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx" 1182 }; 1183 1184 static const char *att_names64[] = { 1185 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi", 1186 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15" 1187 }; 1188 static const char *att_names32[] = { 1189 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi", 1190 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d" 1191 }; 1192 static const char *att_names16[] = { 1193 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di", 1194 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w" 1195 }; 1196 static const char *att_names8[] = { 1197 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh", 1198 }; 1199 static const char *att_names8rex[] = { 1200 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil", 1201 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b" 1202 }; 1203 static const char *att_names_seg[] = { 1204 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?", 1205 }; 1206 static const char *att_index16[] = { 1207 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx" 1208 }; 1209 1210 static const struct dis386 grps[][8] = { 1211 /* GRP1b */ 1212 { 1213 { "addA", Eb, Ib, XX }, 1214 { "orA", Eb, Ib, XX }, 1215 { "adcA", Eb, Ib, XX }, 1216 { "sbbA", Eb, Ib, XX }, 1217 { "andA", Eb, Ib, XX }, 1218 { "subA", Eb, Ib, XX }, 1219 { "xorA", Eb, Ib, XX }, 1220 { "cmpA", Eb, Ib, XX } 1221 }, 1222 /* GRP1S */ 1223 { 1224 { "addQ", Ev, Iv, XX }, 1225 { "orQ", Ev, Iv, XX }, 1226 { "adcQ", Ev, Iv, XX }, 1227 { "sbbQ", Ev, Iv, XX }, 1228 { "andQ", Ev, Iv, XX }, 1229 { "subQ", Ev, Iv, XX }, 1230 { "xorQ", Ev, Iv, XX }, 1231 { "cmpQ", Ev, Iv, XX } 1232 }, 1233 /* GRP1Ss */ 1234 { 1235 { "addQ", Ev, sIb, XX }, 1236 { "orQ", Ev, sIb, XX }, 1237 { "adcQ", Ev, sIb, XX }, 1238 { "sbbQ", Ev, sIb, XX }, 1239 { "andQ", Ev, sIb, XX }, 1240 { "subQ", Ev, sIb, XX }, 1241 { "xorQ", Ev, sIb, XX }, 1242 { "cmpQ", Ev, sIb, XX } 1243 }, 1244 /* GRP2b */ 1245 { 1246 { "rolA", Eb, Ib, XX }, 1247 { "rorA", Eb, Ib, XX }, 1248 { "rclA", Eb, Ib, XX }, 1249 { "rcrA", Eb, Ib, XX }, 1250 { "shlA", Eb, Ib, XX }, 1251 { "shrA", Eb, Ib, XX }, 1252 { "(bad)", XX, XX, XX }, 1253 { "sarA", Eb, Ib, XX }, 1254 }, 1255 /* GRP2S */ 1256 { 1257 { "rolQ", Ev, Ib, XX }, 1258 { "rorQ", Ev, Ib, XX }, 1259 { "rclQ", Ev, Ib, XX }, 1260 { "rcrQ", Ev, Ib, XX }, 1261 { "shlQ", Ev, Ib, XX }, 1262 { "shrQ", Ev, Ib, XX }, 1263 { "(bad)", XX, XX, XX }, 1264 { "sarQ", Ev, Ib, XX }, 1265 }, 1266 /* GRP2b_one */ 1267 { 1268 { "rolA", Eb, XX, XX }, 1269 { "rorA", Eb, XX, XX }, 1270 { "rclA", Eb, XX, XX }, 1271 { "rcrA", Eb, XX, XX }, 1272 { "shlA", Eb, XX, XX }, 1273 { "shrA", Eb, XX, XX }, 1274 { "(bad)", XX, XX, XX }, 1275 { "sarA", Eb, XX, XX }, 1276 }, 1277 /* GRP2S_one */ 1278 { 1279 { "rolQ", Ev, XX, XX }, 1280 { "rorQ", Ev, XX, XX }, 1281 { "rclQ", Ev, XX, XX }, 1282 { "rcrQ", Ev, XX, XX }, 1283 { "shlQ", Ev, XX, XX }, 1284 { "shrQ", Ev, XX, XX }, 1285 { "(bad)", XX, XX, XX}, 1286 { "sarQ", Ev, XX, XX }, 1287 }, 1288 /* GRP2b_cl */ 1289 { 1290 { "rolA", Eb, CL, XX }, 1291 { "rorA", Eb, CL, XX }, 1292 { "rclA", Eb, CL, XX }, 1293 { "rcrA", Eb, CL, XX }, 1294 { "shlA", Eb, CL, XX }, 1295 { "shrA", Eb, CL, XX }, 1296 { "(bad)", XX, XX, XX }, 1297 { "sarA", Eb, CL, XX }, 1298 }, 1299 /* GRP2S_cl */ 1300 { 1301 { "rolQ", Ev, CL, XX }, 1302 { "rorQ", Ev, CL, XX }, 1303 { "rclQ", Ev, CL, XX }, 1304 { "rcrQ", Ev, CL, XX }, 1305 { "shlQ", Ev, CL, XX }, 1306 { "shrQ", Ev, CL, XX }, 1307 { "(bad)", XX, XX, XX }, 1308 { "sarQ", Ev, CL, XX } 1309 }, 1310 /* GRP3b */ 1311 { 1312 { "testA", Eb, Ib, XX }, 1313 { "(bad)", Eb, XX, XX }, 1314 { "notA", Eb, XX, XX }, 1315 { "negA", Eb, XX, XX }, 1316 { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */ 1317 { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */ 1318 { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */ 1319 { "idivA", Eb, XX, XX } /* and idiv for consistency. */ 1320 }, 1321 /* GRP3S */ 1322 { 1323 { "testQ", Ev, Iv, XX }, 1324 { "(bad)", XX, XX, XX }, 1325 { "notQ", Ev, XX, XX }, 1326 { "negQ", Ev, XX, XX }, 1327 { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */ 1328 { "imulQ", Ev, XX, XX }, 1329 { "divQ", Ev, XX, XX }, 1330 { "idivQ", Ev, XX, XX }, 1331 }, 1332 /* GRP4 */ 1333 { 1334 { "incA", Eb, XX, XX }, 1335 { "decA", Eb, XX, XX }, 1336 { "(bad)", XX, XX, XX }, 1337 { "(bad)", XX, XX, XX }, 1338 { "(bad)", XX, XX, XX }, 1339 { "(bad)", XX, XX, XX }, 1340 { "(bad)", XX, XX, XX }, 1341 { "(bad)", XX, XX, XX }, 1342 }, 1343 /* GRP5 */ 1344 { 1345 { "incQ", Ev, XX, XX }, 1346 { "decQ", Ev, XX, XX }, 1347 { "callT", indirEv, XX, XX }, 1348 { "lcallT", indirEv, XX, XX }, 1349 { "jmpT", indirEv, XX, XX }, 1350 { "ljmpT", indirEv, XX, XX }, 1351 { "pushU", Ev, XX, XX }, 1352 { "(bad)", XX, XX, XX }, 1353 }, 1354 /* GRP6 */ 1355 { 1356 { "sldtQ", Ev, XX, XX }, 1357 { "strQ", Ev, XX, XX }, 1358 { "lldt", Ew, XX, XX }, 1359 { "ltr", Ew, XX, XX }, 1360 { "verr", Ew, XX, XX }, 1361 { "verw", Ew, XX, XX }, 1362 { "(bad)", XX, XX, XX }, 1363 { "(bad)", XX, XX, XX } 1364 }, 1365 /* GRP7 */ 1366 { 1367 { "sgdtQ", M, XX, XX }, 1368 { "sidtQ", PNI_Fixup, 0, XX, XX }, 1369 { "lgdtQ", M, XX, XX }, 1370 { "lidtQ", M, XX, XX }, 1371 { "smswQ", Ev, XX, XX }, 1372 { "(bad)", XX, XX, XX }, 1373 { "lmsw", Ew, XX, XX }, 1374 { "invlpg", INVLPG_Fixup, w_mode, XX, XX }, 1375 }, 1376 /* GRP8 */ 1377 { 1378 { "(bad)", XX, XX, XX }, 1379 { "(bad)", XX, XX, XX }, 1380 { "(bad)", XX, XX, XX }, 1381 { "(bad)", XX, XX, XX }, 1382 { "btQ", Ev, Ib, XX }, 1383 { "btsQ", Ev, Ib, XX }, 1384 { "btrQ", Ev, Ib, XX }, 1385 { "btcQ", Ev, Ib, XX }, 1386 }, 1387 /* GRP9 */ 1388 { 1389 { "(bad)", XX, XX, XX }, 1390 { "cmpxchg8b", Ev, XX, XX }, 1391 { "(bad)", XX, XX, XX }, 1392 { "(bad)", XX, XX, XX }, 1393 { "(bad)", XX, XX, XX }, 1394 { "(bad)", XX, XX, XX }, 1395 { "(bad)", XX, XX, XX }, 1396 { "(bad)", XX, XX, XX }, 1397 }, 1398 /* GRP10 */ 1399 { 1400 { "(bad)", XX, XX, XX }, 1401 { "(bad)", XX, XX, XX }, 1402 { "psrlw", MS, Ib, XX }, 1403 { "(bad)", XX, XX, XX }, 1404 { "psraw", MS, Ib, XX }, 1405 { "(bad)", XX, XX, XX }, 1406 { "psllw", MS, Ib, XX }, 1407 { "(bad)", XX, XX, XX }, 1408 }, 1409 /* GRP11 */ 1410 { 1411 { "(bad)", XX, XX, XX }, 1412 { "(bad)", XX, XX, XX }, 1413 { "psrld", MS, Ib, XX }, 1414 { "(bad)", XX, XX, XX }, 1415 { "psrad", MS, Ib, XX }, 1416 { "(bad)", XX, XX, XX }, 1417 { "pslld", MS, Ib, XX }, 1418 { "(bad)", XX, XX, XX }, 1419 }, 1420 /* GRP12 */ 1421 { 1422 { "(bad)", XX, XX, XX }, 1423 { "(bad)", XX, XX, XX }, 1424 { "psrlq", MS, Ib, XX }, 1425 { "psrldq", MS, Ib, XX }, 1426 { "(bad)", XX, XX, XX }, 1427 { "(bad)", XX, XX, XX }, 1428 { "psllq", MS, Ib, XX }, 1429 { "pslldq", MS, Ib, XX }, 1430 }, 1431 /* GRP13 */ 1432 { 1433 { "fxsave", Ev, XX, XX }, 1434 { "fxrstor", Ev, XX, XX }, 1435 { "ldmxcsr", Ev, XX, XX }, 1436 { "stmxcsr", Ev, XX, XX }, 1437 { "(bad)", XX, XX, XX }, 1438 { "lfence", OP_0fae, 0, XX, XX }, 1439 { "mfence", OP_0fae, 0, XX, XX }, 1440 { "clflush", OP_0fae, 0, XX, XX }, 1441 }, 1442 /* GRP14 */ 1443 { 1444 { "prefetchnta", Ev, XX, XX }, 1445 { "prefetcht0", Ev, XX, XX }, 1446 { "prefetcht1", Ev, XX, XX }, 1447 { "prefetcht2", Ev, XX, XX }, 1448 { "(bad)", XX, XX, XX }, 1449 { "(bad)", XX, XX, XX }, 1450 { "(bad)", XX, XX, XX }, 1451 { "(bad)", XX, XX, XX }, 1452 }, 1453 /* GRPAMD */ 1454 { 1455 { "prefetch", Eb, XX, XX }, 1456 { "prefetchw", Eb, XX, XX }, 1457 { "(bad)", XX, XX, XX }, 1458 { "(bad)", XX, XX, XX }, 1459 { "(bad)", XX, XX, XX }, 1460 { "(bad)", XX, XX, XX }, 1461 { "(bad)", XX, XX, XX }, 1462 { "(bad)", XX, XX, XX }, 1463 }, 1464 }; 1465 1466 static const struct dis386 prefix_user_table[][4] = { 1467 /* PREGRP0 */ 1468 { 1469 { "addps", XM, EX, XX }, 1470 { "addss", XM, EX, XX }, 1471 { "addpd", XM, EX, XX }, 1472 { "addsd", XM, EX, XX }, 1473 }, 1474 /* PREGRP1 */ 1475 { 1476 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */ 1477 { "", XM, EX, OPSIMD }, 1478 { "", XM, EX, OPSIMD }, 1479 { "", XM, EX, OPSIMD }, 1480 }, 1481 /* PREGRP2 */ 1482 { 1483 { "cvtpi2ps", XM, EM, XX }, 1484 { "cvtsi2ssY", XM, Ev, XX }, 1485 { "cvtpi2pd", XM, EM, XX }, 1486 { "cvtsi2sdY", XM, Ev, XX }, 1487 }, 1488 /* PREGRP3 */ 1489 { 1490 { "cvtps2pi", MX, EX, XX }, 1491 { "cvtss2siY", Gv, EX, XX }, 1492 { "cvtpd2pi", MX, EX, XX }, 1493 { "cvtsd2siY", Gv, EX, XX }, 1494 }, 1495 /* PREGRP4 */ 1496 { 1497 { "cvttps2pi", MX, EX, XX }, 1498 { "cvttss2siY", Gv, EX, XX }, 1499 { "cvttpd2pi", MX, EX, XX }, 1500 { "cvttsd2siY", Gv, EX, XX }, 1501 }, 1502 /* PREGRP5 */ 1503 { 1504 { "divps", XM, EX, XX }, 1505 { "divss", XM, EX, XX }, 1506 { "divpd", XM, EX, XX }, 1507 { "divsd", XM, EX, XX }, 1508 }, 1509 /* PREGRP6 */ 1510 { 1511 { "maxps", XM, EX, XX }, 1512 { "maxss", XM, EX, XX }, 1513 { "maxpd", XM, EX, XX }, 1514 { "maxsd", XM, EX, XX }, 1515 }, 1516 /* PREGRP7 */ 1517 { 1518 { "minps", XM, EX, XX }, 1519 { "minss", XM, EX, XX }, 1520 { "minpd", XM, EX, XX }, 1521 { "minsd", XM, EX, XX }, 1522 }, 1523 /* PREGRP8 */ 1524 { 1525 { "movups", XM, EX, XX }, 1526 { "movss", XM, EX, XX }, 1527 { "movupd", XM, EX, XX }, 1528 { "movsd", XM, EX, XX }, 1529 }, 1530 /* PREGRP9 */ 1531 { 1532 { "movups", EX, XM, XX }, 1533 { "movss", EX, XM, XX }, 1534 { "movupd", EX, XM, XX }, 1535 { "movsd", EX, XM, XX }, 1536 }, 1537 /* PREGRP10 */ 1538 { 1539 { "mulps", XM, EX, XX }, 1540 { "mulss", XM, EX, XX }, 1541 { "mulpd", XM, EX, XX }, 1542 { "mulsd", XM, EX, XX }, 1543 }, 1544 /* PREGRP11 */ 1545 { 1546 { "rcpps", XM, EX, XX }, 1547 { "rcpss", XM, EX, XX }, 1548 { "(bad)", XM, EX, XX }, 1549 { "(bad)", XM, EX, XX }, 1550 }, 1551 /* PREGRP12 */ 1552 { 1553 { "rsqrtps", XM, EX, XX }, 1554 { "rsqrtss", XM, EX, XX }, 1555 { "(bad)", XM, EX, XX }, 1556 { "(bad)", XM, EX, XX }, 1557 }, 1558 /* PREGRP13 */ 1559 { 1560 { "sqrtps", XM, EX, XX }, 1561 { "sqrtss", XM, EX, XX }, 1562 { "sqrtpd", XM, EX, XX }, 1563 { "sqrtsd", XM, EX, XX }, 1564 }, 1565 /* PREGRP14 */ 1566 { 1567 { "subps", XM, EX, XX }, 1568 { "subss", XM, EX, XX }, 1569 { "subpd", XM, EX, XX }, 1570 { "subsd", XM, EX, XX }, 1571 }, 1572 /* PREGRP15 */ 1573 { 1574 { "(bad)", XM, EX, XX }, 1575 { "cvtdq2pd", XM, EX, XX }, 1576 { "cvttpd2dq", XM, EX, XX }, 1577 { "cvtpd2dq", XM, EX, XX }, 1578 }, 1579 /* PREGRP16 */ 1580 { 1581 { "cvtdq2ps", XM, EX, XX }, 1582 { "cvttps2dq",XM, EX, XX }, 1583 { "cvtps2dq",XM, EX, XX }, 1584 { "(bad)", XM, EX, XX }, 1585 }, 1586 /* PREGRP17 */ 1587 { 1588 { "cvtps2pd", XM, EX, XX }, 1589 { "cvtss2sd", XM, EX, XX }, 1590 { "cvtpd2ps", XM, EX, XX }, 1591 { "cvtsd2ss", XM, EX, XX }, 1592 }, 1593 /* PREGRP18 */ 1594 { 1595 { "maskmovq", MX, MS, XX }, 1596 { "(bad)", XM, EX, XX }, 1597 { "maskmovdqu", XM, EX, XX }, 1598 { "(bad)", XM, EX, XX }, 1599 }, 1600 /* PREGRP19 */ 1601 { 1602 { "movq", MX, EM, XX }, 1603 { "movdqu", XM, EX, XX }, 1604 { "movdqa", XM, EX, XX }, 1605 { "(bad)", XM, EX, XX }, 1606 }, 1607 /* PREGRP20 */ 1608 { 1609 { "movq", EM, MX, XX }, 1610 { "movdqu", EX, XM, XX }, 1611 { "movdqa", EX, XM, XX }, 1612 { "(bad)", EX, XM, XX }, 1613 }, 1614 /* PREGRP21 */ 1615 { 1616 { "(bad)", EX, XM, XX }, 1617 { "movq2dq", XM, MS, XX }, 1618 { "movq", EX, XM, XX }, 1619 { "movdq2q", MX, XS, XX }, 1620 }, 1621 /* PREGRP22 */ 1622 { 1623 { "pshufw", MX, EM, Ib }, 1624 { "pshufhw", XM, EX, Ib }, 1625 { "pshufd", XM, EX, Ib }, 1626 { "pshuflw", XM, EX, Ib }, 1627 }, 1628 /* PREGRP23 */ 1629 { 1630 { "movd", Edq, MX, XX }, 1631 { "movq", XM, EX, XX }, 1632 { "movd", Edq, XM, XX }, 1633 { "(bad)", Ed, XM, XX }, 1634 }, 1635 /* PREGRP24 */ 1636 { 1637 { "(bad)", MX, EX, XX }, 1638 { "(bad)", XM, EX, XX }, 1639 { "punpckhqdq", XM, EX, XX }, 1640 { "(bad)", XM, EX, XX }, 1641 }, 1642 /* PREGRP25 */ 1643 { 1644 { "movntq", Ev, MX, XX }, 1645 { "(bad)", Ev, XM, XX }, 1646 { "movntdq", Ev, XM, XX }, 1647 { "(bad)", Ev, XM, XX }, 1648 }, 1649 /* PREGRP26 */ 1650 { 1651 { "(bad)", MX, EX, XX }, 1652 { "(bad)", XM, EX, XX }, 1653 { "punpcklqdq", XM, EX, XX }, 1654 { "(bad)", XM, EX, XX }, 1655 }, 1656 /* PREGRP27 */ 1657 { 1658 { "(bad)", MX, EX, XX }, 1659 { "(bad)", XM, EX, XX }, 1660 { "addsubpd", XM, EX, XX }, 1661 { "addsubps", XM, EX, XX }, 1662 }, 1663 /* PREGRP28 */ 1664 { 1665 { "(bad)", MX, EX, XX }, 1666 { "(bad)", XM, EX, XX }, 1667 { "haddpd", XM, EX, XX }, 1668 { "haddps", XM, EX, XX }, 1669 }, 1670 /* PREGRP29 */ 1671 { 1672 { "(bad)", MX, EX, XX }, 1673 { "(bad)", XM, EX, XX }, 1674 { "hsubpd", XM, EX, XX }, 1675 { "hsubps", XM, EX, XX }, 1676 }, 1677 /* PREGRP30 */ 1678 { 1679 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */ 1680 { "movsldup", XM, EX, XX }, 1681 { "movlpd", XM, EX, XX }, 1682 { "movddup", XM, EX, XX }, 1683 }, 1684 /* PREGRP31 */ 1685 { 1686 { "movhpX", XM, EX, SIMD_Fixup, 'l' }, 1687 { "movshdup", XM, EX, XX }, 1688 { "movhpd", XM, EX, XX }, 1689 { "(bad)", XM, EX, XX }, 1690 }, 1691 /* PREGRP32 */ 1692 { 1693 { "(bad)", XM, EX, XX }, 1694 { "(bad)", XM, EX, XX }, 1695 { "(bad)", XM, EX, XX }, 1696 { "lddqu", XM, M, XX }, 1697 }, 1698 }; 1699 1700 static const struct dis386 x86_64_table[][2] = { 1701 { 1702 { "arpl", Ew, Gw, XX }, 1703 { "movs{||lq|xd}", Gv, Ed, XX }, 1704 }, 1705 }; 1706 1707 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>") 1708 1709 static void 1710 ckprefix (void) 1711 { 1712 int newrex; 1713 rex = 0; 1714 prefixes = 0; 1715 used_prefixes = 0; 1716 rex_used = 0; 1717 while (1) 1718 { 1719 FETCH_DATA (the_info, codep + 1); 1720 newrex = 0; 1721 switch (*codep) 1722 { 1723 /* REX prefixes family. */ 1724 case 0x40: 1725 case 0x41: 1726 case 0x42: 1727 case 0x43: 1728 case 0x44: 1729 case 0x45: 1730 case 0x46: 1731 case 0x47: 1732 case 0x48: 1733 case 0x49: 1734 case 0x4a: 1735 case 0x4b: 1736 case 0x4c: 1737 case 0x4d: 1738 case 0x4e: 1739 case 0x4f: 1740 if (mode_64bit) 1741 newrex = *codep; 1742 else 1743 return; 1744 break; 1745 case 0xf3: 1746 prefixes |= PREFIX_REPZ; 1747 break; 1748 case 0xf2: 1749 prefixes |= PREFIX_REPNZ; 1750 break; 1751 case 0xf0: 1752 prefixes |= PREFIX_LOCK; 1753 break; 1754 case 0x2e: 1755 prefixes |= PREFIX_CS; 1756 break; 1757 case 0x36: 1758 prefixes |= PREFIX_SS; 1759 break; 1760 case 0x3e: 1761 prefixes |= PREFIX_DS; 1762 break; 1763 case 0x26: 1764 prefixes |= PREFIX_ES; 1765 break; 1766 case 0x64: 1767 prefixes |= PREFIX_FS; 1768 break; 1769 case 0x65: 1770 prefixes |= PREFIX_GS; 1771 break; 1772 case 0x66: 1773 prefixes |= PREFIX_DATA; 1774 break; 1775 case 0x67: 1776 prefixes |= PREFIX_ADDR; 1777 break; 1778 case FWAIT_OPCODE: 1779 /* fwait is really an instruction. If there are prefixes 1780 before the fwait, they belong to the fwait, *not* to the 1781 following instruction. */ 1782 if (prefixes) 1783 { 1784 prefixes |= PREFIX_FWAIT; 1785 codep++; 1786 return; 1787 } 1788 prefixes = PREFIX_FWAIT; 1789 break; 1790 default: 1791 return; 1792 } 1793 /* Rex is ignored when followed by another prefix. */ 1794 if (rex) 1795 { 1796 oappend (prefix_name (rex, 0)); 1797 oappend (" "); 1798 } 1799 rex = newrex; 1800 codep++; 1801 } 1802 } 1803 1804 /* Return the name of the prefix byte PREF, or NULL if PREF is not a 1805 prefix byte. */ 1806 1807 static const char * 1808 prefix_name (int pref, int sizeflag) 1809 { 1810 switch (pref) 1811 { 1812 /* REX prefixes family. */ 1813 case 0x40: 1814 return "rex"; 1815 case 0x41: 1816 return "rexZ"; 1817 case 0x42: 1818 return "rexY"; 1819 case 0x43: 1820 return "rexYZ"; 1821 case 0x44: 1822 return "rexX"; 1823 case 0x45: 1824 return "rexXZ"; 1825 case 0x46: 1826 return "rexXY"; 1827 case 0x47: 1828 return "rexXYZ"; 1829 case 0x48: 1830 return "rex64"; 1831 case 0x49: 1832 return "rex64Z"; 1833 case 0x4a: 1834 return "rex64Y"; 1835 case 0x4b: 1836 return "rex64YZ"; 1837 case 0x4c: 1838 return "rex64X"; 1839 case 0x4d: 1840 return "rex64XZ"; 1841 case 0x4e: 1842 return "rex64XY"; 1843 case 0x4f: 1844 return "rex64XYZ"; 1845 case 0xf3: 1846 return "repz"; 1847 case 0xf2: 1848 return "repnz"; 1849 case 0xf0: 1850 return "lock"; 1851 case 0x2e: 1852 return "cs"; 1853 case 0x36: 1854 return "ss"; 1855 case 0x3e: 1856 return "ds"; 1857 case 0x26: 1858 return "es"; 1859 case 0x64: 1860 return "fs"; 1861 case 0x65: 1862 return "gs"; 1863 case 0x66: 1864 return (sizeflag & DFLAG) ? "data16" : "data32"; 1865 case 0x67: 1866 if (mode_64bit) 1867 return (sizeflag & AFLAG) ? "addr32" : "addr64"; 1868 else 1869 return ((sizeflag & AFLAG) && !mode_64bit) ? "addr16" : "addr32"; 1870 case FWAIT_OPCODE: 1871 return "fwait"; 1872 default: 1873 return NULL; 1874 } 1875 } 1876 1877 static char op1out[100], op2out[100], op3out[100]; 1878 static int op_ad, op_index[3]; 1879 static bfd_vma op_address[3]; 1880 static bfd_vma op_riprel[3]; 1881 static bfd_vma start_pc; 1882 1883 /* 1884 * On the 386's of 1988, the maximum length of an instruction is 15 bytes. 1885 * (see topic "Redundant prefixes" in the "Differences from 8086" 1886 * section of the "Virtual 8086 Mode" chapter.) 1887 * 'pc' should be the address of this instruction, it will 1888 * be used to print the target address if this is a relative jump or call 1889 * The function returns the length of this instruction in bytes. 1890 */ 1891 1892 static char intel_syntax; 1893 static char open_char; 1894 static char close_char; 1895 static char separator_char; 1896 static char scale_char; 1897 1898 /* Here for backwards compatibility. When gdb stops using 1899 print_insn_i386_att and print_insn_i386_intel these functions can 1900 disappear, and print_insn_i386 be merged into print_insn. */ 1901 int 1902 print_insn_i386_att (bfd_vma pc, disassemble_info *info) 1903 { 1904 intel_syntax = 0; 1905 1906 return print_insn (pc, info); 1907 } 1908 1909 int 1910 print_insn_i386_intel (bfd_vma pc, disassemble_info *info) 1911 { 1912 intel_syntax = 1; 1913 1914 return print_insn (pc, info); 1915 } 1916 1917 int 1918 print_insn_i386 (bfd_vma pc, disassemble_info *info) 1919 { 1920 intel_syntax = -1; 1921 1922 return print_insn (pc, info); 1923 } 1924 1925 static int 1926 print_insn (bfd_vma pc, disassemble_info *info) 1927 { 1928 const struct dis386 *dp; 1929 int i; 1930 int two_source_ops; 1931 char *first, *second, *third; 1932 int needcomma; 1933 unsigned char uses_SSE_prefix; 1934 int sizeflag; 1935 const char *p; 1936 struct dis_private priv; 1937 1938 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax 1939 || info->mach == bfd_mach_x86_64); 1940 1941 if (intel_syntax == (char) -1) 1942 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax 1943 || info->mach == bfd_mach_x86_64_intel_syntax); 1944 1945 if (info->mach == bfd_mach_i386_i386 1946 || info->mach == bfd_mach_x86_64 1947 || info->mach == bfd_mach_i386_i386_intel_syntax 1948 || info->mach == bfd_mach_x86_64_intel_syntax) 1949 priv.orig_sizeflag = AFLAG | DFLAG; 1950 else if (info->mach == bfd_mach_i386_i8086) 1951 priv.orig_sizeflag = 0; 1952 else 1953 abort (); 1954 1955 for (p = info->disassembler_options; p != NULL; ) 1956 { 1957 if (strncmp (p, "x86-64", 6) == 0) 1958 { 1959 mode_64bit = 1; 1960 priv.orig_sizeflag = AFLAG | DFLAG; 1961 } 1962 else if (strncmp (p, "i386", 4) == 0) 1963 { 1964 mode_64bit = 0; 1965 priv.orig_sizeflag = AFLAG | DFLAG; 1966 } 1967 else if (strncmp (p, "i8086", 5) == 0) 1968 { 1969 mode_64bit = 0; 1970 priv.orig_sizeflag = 0; 1971 } 1972 else if (strncmp (p, "intel", 5) == 0) 1973 { 1974 intel_syntax = 1; 1975 } 1976 else if (strncmp (p, "att", 3) == 0) 1977 { 1978 intel_syntax = 0; 1979 } 1980 else if (strncmp (p, "addr", 4) == 0) 1981 { 1982 if (p[4] == '1' && p[5] == '6') 1983 priv.orig_sizeflag &= ~AFLAG; 1984 else if (p[4] == '3' && p[5] == '2') 1985 priv.orig_sizeflag |= AFLAG; 1986 } 1987 else if (strncmp (p, "data", 4) == 0) 1988 { 1989 if (p[4] == '1' && p[5] == '6') 1990 priv.orig_sizeflag &= ~DFLAG; 1991 else if (p[4] == '3' && p[5] == '2') 1992 priv.orig_sizeflag |= DFLAG; 1993 } 1994 else if (strncmp (p, "suffix", 6) == 0) 1995 priv.orig_sizeflag |= SUFFIX_ALWAYS; 1996 1997 p = strchr (p, ','); 1998 if (p != NULL) 1999 p++; 2000 } 2001 2002 if (intel_syntax) 2003 { 2004 names64 = intel_names64; 2005 names32 = intel_names32; 2006 names16 = intel_names16; 2007 names8 = intel_names8; 2008 names8rex = intel_names8rex; 2009 names_seg = intel_names_seg; 2010 index16 = intel_index16; 2011 open_char = '['; 2012 close_char = ']'; 2013 separator_char = '+'; 2014 scale_char = '*'; 2015 } 2016 else 2017 { 2018 names64 = att_names64; 2019 names32 = att_names32; 2020 names16 = att_names16; 2021 names8 = att_names8; 2022 names8rex = att_names8rex; 2023 names_seg = att_names_seg; 2024 index16 = att_index16; 2025 open_char = '('; 2026 close_char = ')'; 2027 separator_char = ','; 2028 scale_char = ','; 2029 } 2030 2031 /* The output looks better if we put 7 bytes on a line, since that 2032 puts most long word instructions on a single line. */ 2033 info->bytes_per_line = 7; 2034 2035 info->private_data = &priv; 2036 priv.max_fetched = priv.the_buffer; 2037 priv.insn_start = pc; 2038 2039 obuf[0] = 0; 2040 op1out[0] = 0; 2041 op2out[0] = 0; 2042 op3out[0] = 0; 2043 2044 op_index[0] = op_index[1] = op_index[2] = -1; 2045 2046 the_info = info; 2047 start_pc = pc; 2048 start_codep = priv.the_buffer; 2049 codep = priv.the_buffer; 2050 2051 if (setjmp (priv.bailout) != 0) 2052 { 2053 const char *name; 2054 2055 /* Getting here means we tried for data but didn't get it. That 2056 means we have an incomplete instruction of some sort. Just 2057 print the first byte as a prefix or a .byte pseudo-op. */ 2058 if (codep > priv.the_buffer) 2059 { 2060 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag); 2061 if (name != NULL) 2062 (*info->fprintf_func) (info->stream, "%s", name); 2063 else 2064 { 2065 /* Just print the first byte as a .byte instruction. */ 2066 (*info->fprintf_func) (info->stream, ".byte 0x%x", 2067 (unsigned int) priv.the_buffer[0]); 2068 } 2069 2070 return 1; 2071 } 2072 2073 return -1; 2074 } 2075 2076 obufp = obuf; 2077 ckprefix (); 2078 2079 insn_codep = codep; 2080 sizeflag = priv.orig_sizeflag; 2081 2082 FETCH_DATA (info, codep + 1); 2083 two_source_ops = (*codep == 0x62) || (*codep == 0xc8); 2084 2085 if ((prefixes & PREFIX_FWAIT) 2086 && ((*codep < 0xd8) || (*codep > 0xdf))) 2087 { 2088 const char *name; 2089 2090 /* fwait not followed by floating point instruction. Print the 2091 first prefix, which is probably fwait itself. */ 2092 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag); 2093 if (name == NULL) 2094 name = INTERNAL_DISASSEMBLER_ERROR; 2095 (*info->fprintf_func) (info->stream, "%s", name); 2096 return 1; 2097 } 2098 2099 if (*codep == 0x0f) 2100 { 2101 FETCH_DATA (info, codep + 2); 2102 dp = &dis386_twobyte[*++codep]; 2103 need_modrm = twobyte_has_modrm[*codep]; 2104 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep]; 2105 } 2106 else 2107 { 2108 dp = &dis386[*codep]; 2109 need_modrm = onebyte_has_modrm[*codep]; 2110 uses_SSE_prefix = 0; 2111 } 2112 codep++; 2113 2114 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ)) 2115 { 2116 oappend ("repz "); 2117 used_prefixes |= PREFIX_REPZ; 2118 } 2119 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ)) 2120 { 2121 oappend ("repnz "); 2122 used_prefixes |= PREFIX_REPNZ; 2123 } 2124 if (prefixes & PREFIX_LOCK) 2125 { 2126 oappend ("lock "); 2127 used_prefixes |= PREFIX_LOCK; 2128 } 2129 2130 if (prefixes & PREFIX_ADDR) 2131 { 2132 sizeflag ^= AFLAG; 2133 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax) 2134 { 2135 if ((sizeflag & AFLAG) || mode_64bit) 2136 oappend ("addr32 "); 2137 else 2138 oappend ("addr16 "); 2139 used_prefixes |= PREFIX_ADDR; 2140 } 2141 } 2142 2143 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA)) 2144 { 2145 sizeflag ^= DFLAG; 2146 if (dp->bytemode3 == cond_jump_mode 2147 && dp->bytemode1 == v_mode 2148 && !intel_syntax) 2149 { 2150 if (sizeflag & DFLAG) 2151 oappend ("data32 "); 2152 else 2153 oappend ("data16 "); 2154 used_prefixes |= PREFIX_DATA; 2155 } 2156 } 2157 2158 if (need_modrm) 2159 { 2160 FETCH_DATA (info, codep + 1); 2161 mod = (*codep >> 6) & 3; 2162 reg = (*codep >> 3) & 7; 2163 rm = *codep & 7; 2164 } 2165 2166 if (dp->name == NULL && dp->bytemode1 == FLOATCODE) 2167 { 2168 dofloat (sizeflag); 2169 } 2170 else 2171 { 2172 int index; 2173 if (dp->name == NULL) 2174 { 2175 switch (dp->bytemode1) 2176 { 2177 case USE_GROUPS: 2178 dp = &grps[dp->bytemode2][reg]; 2179 break; 2180 2181 case USE_PREFIX_USER_TABLE: 2182 index = 0; 2183 used_prefixes |= (prefixes & PREFIX_REPZ); 2184 if (prefixes & PREFIX_REPZ) 2185 index = 1; 2186 else 2187 { 2188 used_prefixes |= (prefixes & PREFIX_DATA); 2189 if (prefixes & PREFIX_DATA) 2190 index = 2; 2191 else 2192 { 2193 used_prefixes |= (prefixes & PREFIX_REPNZ); 2194 if (prefixes & PREFIX_REPNZ) 2195 index = 3; 2196 } 2197 } 2198 dp = &prefix_user_table[dp->bytemode2][index]; 2199 break; 2200 2201 case X86_64_SPECIAL: 2202 dp = &x86_64_table[dp->bytemode2][mode_64bit]; 2203 break; 2204 2205 default: 2206 oappend (INTERNAL_DISASSEMBLER_ERROR); 2207 break; 2208 } 2209 } 2210 2211 if (putop (dp->name, sizeflag) == 0) 2212 { 2213 obufp = op1out; 2214 op_ad = 2; 2215 if (dp->op1) 2216 (*dp->op1) (dp->bytemode1, sizeflag); 2217 2218 obufp = op2out; 2219 op_ad = 1; 2220 if (dp->op2) 2221 (*dp->op2) (dp->bytemode2, sizeflag); 2222 2223 obufp = op3out; 2224 op_ad = 0; 2225 if (dp->op3) 2226 (*dp->op3) (dp->bytemode3, sizeflag); 2227 } 2228 } 2229 2230 /* See if any prefixes were not used. If so, print the first one 2231 separately. If we don't do this, we'll wind up printing an 2232 instruction stream which does not precisely correspond to the 2233 bytes we are disassembling. */ 2234 if ((prefixes & ~used_prefixes) != 0) 2235 { 2236 const char *name; 2237 2238 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag); 2239 if (name == NULL) 2240 name = INTERNAL_DISASSEMBLER_ERROR; 2241 (*info->fprintf_func) (info->stream, "%s", name); 2242 return 1; 2243 } 2244 if (rex & ~rex_used) 2245 { 2246 const char *name; 2247 name = prefix_name (rex | 0x40, priv.orig_sizeflag); 2248 if (name == NULL) 2249 name = INTERNAL_DISASSEMBLER_ERROR; 2250 (*info->fprintf_func) (info->stream, "%s ", name); 2251 } 2252 2253 obufp = obuf + strlen (obuf); 2254 for (i = strlen (obuf); i < 6; i++) 2255 oappend (" "); 2256 oappend (" "); 2257 (*info->fprintf_func) (info->stream, "%s", obuf); 2258 2259 /* The enter and bound instructions are printed with operands in the same 2260 order as the intel book; everything else is printed in reverse order. */ 2261 if (intel_syntax || two_source_ops) 2262 { 2263 first = op1out; 2264 second = op2out; 2265 third = op3out; 2266 op_ad = op_index[0]; 2267 op_index[0] = op_index[2]; 2268 op_index[2] = op_ad; 2269 } 2270 else 2271 { 2272 first = op3out; 2273 second = op2out; 2274 third = op1out; 2275 } 2276 needcomma = 0; 2277 if (*first) 2278 { 2279 if (op_index[0] != -1 && !op_riprel[0]) 2280 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info); 2281 else 2282 (*info->fprintf_func) (info->stream, "%s", first); 2283 needcomma = 1; 2284 } 2285 if (*second) 2286 { 2287 if (needcomma) 2288 (*info->fprintf_func) (info->stream, ","); 2289 if (op_index[1] != -1 && !op_riprel[1]) 2290 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info); 2291 else 2292 (*info->fprintf_func) (info->stream, "%s", second); 2293 needcomma = 1; 2294 } 2295 if (*third) 2296 { 2297 if (needcomma) 2298 (*info->fprintf_func) (info->stream, ","); 2299 if (op_index[2] != -1 && !op_riprel[2]) 2300 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info); 2301 else 2302 (*info->fprintf_func) (info->stream, "%s", third); 2303 } 2304 for (i = 0; i < 3; i++) 2305 if (op_index[i] != -1 && op_riprel[i]) 2306 { 2307 (*info->fprintf_func) (info->stream, " # "); 2308 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep 2309 + op_address[op_index[i]]), info); 2310 } 2311 return codep - priv.the_buffer; 2312 } 2313 2314 static const char *float_mem[] = { 2315 /* d8 */ 2316 "fadd{s||s|}", 2317 "fmul{s||s|}", 2318 "fcom{s||s|}", 2319 "fcomp{s||s|}", 2320 "fsub{s||s|}", 2321 "fsubr{s||s|}", 2322 "fdiv{s||s|}", 2323 "fdivr{s||s|}", 2324 /* d9 */ 2325 "fld{s||s|}", 2326 "(bad)", 2327 "fst{s||s|}", 2328 "fstp{s||s|}", 2329 "fldenv", 2330 "fldcw", 2331 "fNstenv", 2332 "fNstcw", 2333 /* da */ 2334 "fiadd{l||l|}", 2335 "fimul{l||l|}", 2336 "ficom{l||l|}", 2337 "ficomp{l||l|}", 2338 "fisub{l||l|}", 2339 "fisubr{l||l|}", 2340 "fidiv{l||l|}", 2341 "fidivr{l||l|}", 2342 /* db */ 2343 "fild{l||l|}", 2344 "fisttp{l||l|}", 2345 "fist{l||l|}", 2346 "fistp{l||l|}", 2347 "(bad)", 2348 "fld{t||t|}", 2349 "(bad)", 2350 "fstp{t||t|}", 2351 /* dc */ 2352 "fadd{l||l|}", 2353 "fmul{l||l|}", 2354 "fcom{l||l|}", 2355 "fcomp{l||l|}", 2356 "fsub{l||l|}", 2357 "fsubr{l||l|}", 2358 "fdiv{l||l|}", 2359 "fdivr{l||l|}", 2360 /* dd */ 2361 "fld{l||l|}", 2362 "fisttpll", 2363 "fst{l||l|}", 2364 "fstp{l||l|}", 2365 "frstor", 2366 "(bad)", 2367 "fNsave", 2368 "fNstsw", 2369 /* de */ 2370 "fiadd", 2371 "fimul", 2372 "ficom", 2373 "ficomp", 2374 "fisub", 2375 "fisubr", 2376 "fidiv", 2377 "fidivr", 2378 /* df */ 2379 "fild", 2380 "fisttp", 2381 "fist", 2382 "fistp", 2383 "fbld", 2384 "fild{ll||ll|}", 2385 "fbstp", 2386 "fistpll", 2387 }; 2388 2389 #define ST OP_ST, 0 2390 #define STi OP_STi, 0 2391 2392 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0 2393 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0 2394 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0 2395 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0 2396 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0 2397 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0 2398 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0 2399 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0 2400 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0 2401 2402 static const struct dis386 float_reg[][8] = { 2403 /* d8 */ 2404 { 2405 { "fadd", ST, STi, XX }, 2406 { "fmul", ST, STi, XX }, 2407 { "fcom", STi, XX, XX }, 2408 { "fcomp", STi, XX, XX }, 2409 { "fsub", ST, STi, XX }, 2410 { "fsubr", ST, STi, XX }, 2411 { "fdiv", ST, STi, XX }, 2412 { "fdivr", ST, STi, XX }, 2413 }, 2414 /* d9 */ 2415 { 2416 { "fld", STi, XX, XX }, 2417 { "fxch", STi, XX, XX }, 2418 { FGRPd9_2 }, 2419 { "(bad)", XX, XX, XX }, 2420 { FGRPd9_4 }, 2421 { FGRPd9_5 }, 2422 { FGRPd9_6 }, 2423 { FGRPd9_7 }, 2424 }, 2425 /* da */ 2426 { 2427 { "fcmovb", ST, STi, XX }, 2428 { "fcmove", ST, STi, XX }, 2429 { "fcmovbe",ST, STi, XX }, 2430 { "fcmovu", ST, STi, XX }, 2431 { "(bad)", XX, XX, XX }, 2432 { FGRPda_5 }, 2433 { "(bad)", XX, XX, XX }, 2434 { "(bad)", XX, XX, XX }, 2435 }, 2436 /* db */ 2437 { 2438 { "fcmovnb",ST, STi, XX }, 2439 { "fcmovne",ST, STi, XX }, 2440 { "fcmovnbe",ST, STi, XX }, 2441 { "fcmovnu",ST, STi, XX }, 2442 { FGRPdb_4 }, 2443 { "fucomi", ST, STi, XX }, 2444 { "fcomi", ST, STi, XX }, 2445 { "(bad)", XX, XX, XX }, 2446 }, 2447 /* dc */ 2448 { 2449 { "fadd", STi, ST, XX }, 2450 { "fmul", STi, ST, XX }, 2451 { "(bad)", XX, XX, XX }, 2452 { "(bad)", XX, XX, XX }, 2453 #if UNIXWARE_COMPAT 2454 { "fsub", STi, ST, XX }, 2455 { "fsubr", STi, ST, XX }, 2456 { "fdiv", STi, ST, XX }, 2457 { "fdivr", STi, ST, XX }, 2458 #else 2459 { "fsubr", STi, ST, XX }, 2460 { "fsub", STi, ST, XX }, 2461 { "fdivr", STi, ST, XX }, 2462 { "fdiv", STi, ST, XX }, 2463 #endif 2464 }, 2465 /* dd */ 2466 { 2467 { "ffree", STi, XX, XX }, 2468 { "(bad)", XX, XX, XX }, 2469 { "fst", STi, XX, XX }, 2470 { "fstp", STi, XX, XX }, 2471 { "fucom", STi, XX, XX }, 2472 { "fucomp", STi, XX, XX }, 2473 { "(bad)", XX, XX, XX }, 2474 { "(bad)", XX, XX, XX }, 2475 }, 2476 /* de */ 2477 { 2478 { "faddp", STi, ST, XX }, 2479 { "fmulp", STi, ST, XX }, 2480 { "(bad)", XX, XX, XX }, 2481 { FGRPde_3 }, 2482 #if UNIXWARE_COMPAT 2483 { "fsubp", STi, ST, XX }, 2484 { "fsubrp", STi, ST, XX }, 2485 { "fdivp", STi, ST, XX }, 2486 { "fdivrp", STi, ST, XX }, 2487 #else 2488 { "fsubrp", STi, ST, XX }, 2489 { "fsubp", STi, ST, XX }, 2490 { "fdivrp", STi, ST, XX }, 2491 { "fdivp", STi, ST, XX }, 2492 #endif 2493 }, 2494 /* df */ 2495 { 2496 { "ffreep", STi, XX, XX }, 2497 { "(bad)", XX, XX, XX }, 2498 { "(bad)", XX, XX, XX }, 2499 { "(bad)", XX, XX, XX }, 2500 { FGRPdf_4 }, 2501 { "fucomip",ST, STi, XX }, 2502 { "fcomip", ST, STi, XX }, 2503 { "(bad)", XX, XX, XX }, 2504 }, 2505 }; 2506 2507 static char *fgrps[][8] = { 2508 /* d9_2 0 */ 2509 { 2510 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 2511 }, 2512 2513 /* d9_4 1 */ 2514 { 2515 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)", 2516 }, 2517 2518 /* d9_5 2 */ 2519 { 2520 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)", 2521 }, 2522 2523 /* d9_6 3 */ 2524 { 2525 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp", 2526 }, 2527 2528 /* d9_7 4 */ 2529 { 2530 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos", 2531 }, 2532 2533 /* da_5 5 */ 2534 { 2535 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 2536 }, 2537 2538 /* db_4 6 */ 2539 { 2540 "feni(287 only)","fdisi(287 only)","fNclex","fNinit", 2541 "fNsetpm(287 only)","(bad)","(bad)","(bad)", 2542 }, 2543 2544 /* de_3 7 */ 2545 { 2546 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 2547 }, 2548 2549 /* df_4 8 */ 2550 { 2551 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 2552 }, 2553 }; 2554 2555 static void 2556 dofloat (int sizeflag) 2557 { 2558 const struct dis386 *dp; 2559 unsigned char floatop; 2560 2561 floatop = codep[-1]; 2562 2563 if (mod != 3) 2564 { 2565 putop (float_mem[(floatop - 0xd8) * 8 + reg], sizeflag); 2566 obufp = op1out; 2567 if (floatop == 0xdb) 2568 OP_E (x_mode, sizeflag); 2569 else if (floatop == 0xdd) 2570 OP_E (d_mode, sizeflag); 2571 else 2572 OP_E (v_mode, sizeflag); 2573 return; 2574 } 2575 /* Skip mod/rm byte. */ 2576 MODRM_CHECK; 2577 codep++; 2578 2579 dp = &float_reg[floatop - 0xd8][reg]; 2580 if (dp->name == NULL) 2581 { 2582 putop (fgrps[dp->bytemode1][rm], sizeflag); 2583 2584 /* Instruction fnstsw is only one with strange arg. */ 2585 if (floatop == 0xdf && codep[-1] == 0xe0) 2586 strcpy (op1out, names16[0]); 2587 } 2588 else 2589 { 2590 putop (dp->name, sizeflag); 2591 2592 obufp = op1out; 2593 if (dp->op1) 2594 (*dp->op1) (dp->bytemode1, sizeflag); 2595 obufp = op2out; 2596 if (dp->op2) 2597 (*dp->op2) (dp->bytemode2, sizeflag); 2598 } 2599 } 2600 2601 static void 2602 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 2603 { 2604 oappend ("%st"); 2605 } 2606 2607 static void 2608 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 2609 { 2610 sprintf (scratchbuf, "%%st(%d)", rm); 2611 oappend (scratchbuf + intel_syntax); 2612 } 2613 2614 /* Capital letters in template are macros. */ 2615 static int 2616 putop (const char *template, int sizeflag) 2617 { 2618 const char *p; 2619 int alt; 2620 2621 for (p = template; *p; p++) 2622 { 2623 switch (*p) 2624 { 2625 default: 2626 *obufp++ = *p; 2627 break; 2628 case '{': 2629 alt = 0; 2630 if (intel_syntax) 2631 alt += 1; 2632 if (mode_64bit) 2633 alt += 2; 2634 while (alt != 0) 2635 { 2636 while (*++p != '|') 2637 { 2638 if (*p == '}') 2639 { 2640 /* Alternative not valid. */ 2641 strcpy (obuf, "(bad)"); 2642 obufp = obuf + 5; 2643 return 1; 2644 } 2645 else if (*p == '\0') 2646 abort (); 2647 } 2648 alt--; 2649 } 2650 break; 2651 case '|': 2652 while (*++p != '}') 2653 { 2654 if (*p == '\0') 2655 abort (); 2656 } 2657 break; 2658 case '}': 2659 break; 2660 case 'A': 2661 if (intel_syntax) 2662 break; 2663 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS)) 2664 *obufp++ = 'b'; 2665 break; 2666 case 'B': 2667 if (intel_syntax) 2668 break; 2669 if (sizeflag & SUFFIX_ALWAYS) 2670 *obufp++ = 'b'; 2671 break; 2672 case 'E': /* For jcxz/jecxz */ 2673 if (mode_64bit) 2674 { 2675 if (sizeflag & AFLAG) 2676 *obufp++ = 'r'; 2677 else 2678 *obufp++ = 'e'; 2679 } 2680 else 2681 if (sizeflag & AFLAG) 2682 *obufp++ = 'e'; 2683 used_prefixes |= (prefixes & PREFIX_ADDR); 2684 break; 2685 case 'F': 2686 if (intel_syntax) 2687 break; 2688 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS)) 2689 { 2690 if (sizeflag & AFLAG) 2691 *obufp++ = mode_64bit ? 'q' : 'l'; 2692 else 2693 *obufp++ = mode_64bit ? 'l' : 'w'; 2694 used_prefixes |= (prefixes & PREFIX_ADDR); 2695 } 2696 break; 2697 case 'H': 2698 if (intel_syntax) 2699 break; 2700 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS 2701 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS) 2702 { 2703 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS); 2704 *obufp++ = ','; 2705 *obufp++ = 'p'; 2706 if (prefixes & PREFIX_DS) 2707 *obufp++ = 't'; 2708 else 2709 *obufp++ = 'n'; 2710 } 2711 break; 2712 case 'L': 2713 if (intel_syntax) 2714 break; 2715 if (sizeflag & SUFFIX_ALWAYS) 2716 *obufp++ = 'l'; 2717 break; 2718 case 'N': 2719 if ((prefixes & PREFIX_FWAIT) == 0) 2720 *obufp++ = 'n'; 2721 else 2722 used_prefixes |= PREFIX_FWAIT; 2723 break; 2724 case 'O': 2725 USED_REX (REX_MODE64); 2726 if (rex & REX_MODE64) 2727 *obufp++ = 'o'; 2728 else 2729 *obufp++ = 'd'; 2730 break; 2731 case 'T': 2732 if (intel_syntax) 2733 break; 2734 if (mode_64bit) 2735 { 2736 *obufp++ = 'q'; 2737 break; 2738 } 2739 /* Fall through. */ 2740 case 'P': 2741 if (intel_syntax) 2742 break; 2743 if ((prefixes & PREFIX_DATA) 2744 || (rex & REX_MODE64) 2745 || (sizeflag & SUFFIX_ALWAYS)) 2746 { 2747 USED_REX (REX_MODE64); 2748 if (rex & REX_MODE64) 2749 *obufp++ = 'q'; 2750 else 2751 { 2752 if (sizeflag & DFLAG) 2753 *obufp++ = 'l'; 2754 else 2755 *obufp++ = 'w'; 2756 used_prefixes |= (prefixes & PREFIX_DATA); 2757 } 2758 } 2759 break; 2760 case 'U': 2761 if (intel_syntax) 2762 break; 2763 if (mode_64bit) 2764 { 2765 *obufp++ = 'q'; 2766 break; 2767 } 2768 /* Fall through. */ 2769 case 'Q': 2770 if (intel_syntax) 2771 break; 2772 USED_REX (REX_MODE64); 2773 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS)) 2774 { 2775 if (rex & REX_MODE64) 2776 *obufp++ = 'q'; 2777 else 2778 { 2779 if (sizeflag & DFLAG) 2780 *obufp++ = 'l'; 2781 else 2782 *obufp++ = 'w'; 2783 used_prefixes |= (prefixes & PREFIX_DATA); 2784 } 2785 } 2786 break; 2787 case 'R': 2788 USED_REX (REX_MODE64); 2789 if (intel_syntax) 2790 { 2791 if (rex & REX_MODE64) 2792 { 2793 *obufp++ = 'q'; 2794 *obufp++ = 't'; 2795 } 2796 else if (sizeflag & DFLAG) 2797 { 2798 *obufp++ = 'd'; 2799 *obufp++ = 'q'; 2800 } 2801 else 2802 { 2803 *obufp++ = 'w'; 2804 *obufp++ = 'd'; 2805 } 2806 } 2807 else 2808 { 2809 if (rex & REX_MODE64) 2810 *obufp++ = 'q'; 2811 else if (sizeflag & DFLAG) 2812 *obufp++ = 'l'; 2813 else 2814 *obufp++ = 'w'; 2815 } 2816 if (!(rex & REX_MODE64)) 2817 used_prefixes |= (prefixes & PREFIX_DATA); 2818 break; 2819 case 'S': 2820 if (intel_syntax) 2821 break; 2822 if (sizeflag & SUFFIX_ALWAYS) 2823 { 2824 if (rex & REX_MODE64) 2825 *obufp++ = 'q'; 2826 else 2827 { 2828 if (sizeflag & DFLAG) 2829 *obufp++ = 'l'; 2830 else 2831 *obufp++ = 'w'; 2832 used_prefixes |= (prefixes & PREFIX_DATA); 2833 } 2834 } 2835 break; 2836 case 'X': 2837 if (prefixes & PREFIX_DATA) 2838 *obufp++ = 'd'; 2839 else 2840 *obufp++ = 's'; 2841 used_prefixes |= (prefixes & PREFIX_DATA); 2842 break; 2843 case 'Y': 2844 if (intel_syntax) 2845 break; 2846 if (rex & REX_MODE64) 2847 { 2848 USED_REX (REX_MODE64); 2849 *obufp++ = 'q'; 2850 } 2851 break; 2852 /* implicit operand size 'l' for i386 or 'q' for x86-64 */ 2853 case 'W': 2854 /* operand size flag for cwtl, cbtw */ 2855 USED_REX (0); 2856 if (rex) 2857 *obufp++ = 'l'; 2858 else if (sizeflag & DFLAG) 2859 *obufp++ = 'w'; 2860 else 2861 *obufp++ = 'b'; 2862 if (intel_syntax) 2863 { 2864 if (rex) 2865 { 2866 *obufp++ = 'q'; 2867 *obufp++ = 'e'; 2868 } 2869 if (sizeflag & DFLAG) 2870 { 2871 *obufp++ = 'd'; 2872 *obufp++ = 'e'; 2873 } 2874 else 2875 { 2876 *obufp++ = 'w'; 2877 } 2878 } 2879 if (!rex) 2880 used_prefixes |= (prefixes & PREFIX_DATA); 2881 break; 2882 } 2883 } 2884 *obufp = 0; 2885 return 0; 2886 } 2887 2888 static void 2889 oappend (const char *s) 2890 { 2891 strcpy (obufp, s); 2892 obufp += strlen (s); 2893 } 2894 2895 static void 2896 append_seg (void) 2897 { 2898 if (prefixes & PREFIX_CS) 2899 { 2900 used_prefixes |= PREFIX_CS; 2901 oappend ("%cs:" + intel_syntax); 2902 } 2903 if (prefixes & PREFIX_DS) 2904 { 2905 used_prefixes |= PREFIX_DS; 2906 oappend ("%ds:" + intel_syntax); 2907 } 2908 if (prefixes & PREFIX_SS) 2909 { 2910 used_prefixes |= PREFIX_SS; 2911 oappend ("%ss:" + intel_syntax); 2912 } 2913 if (prefixes & PREFIX_ES) 2914 { 2915 used_prefixes |= PREFIX_ES; 2916 oappend ("%es:" + intel_syntax); 2917 } 2918 if (prefixes & PREFIX_FS) 2919 { 2920 used_prefixes |= PREFIX_FS; 2921 oappend ("%fs:" + intel_syntax); 2922 } 2923 if (prefixes & PREFIX_GS) 2924 { 2925 used_prefixes |= PREFIX_GS; 2926 oappend ("%gs:" + intel_syntax); 2927 } 2928 } 2929 2930 static void 2931 OP_indirE (int bytemode, int sizeflag) 2932 { 2933 if (!intel_syntax) 2934 oappend ("*"); 2935 OP_E (bytemode, sizeflag); 2936 } 2937 2938 static void 2939 print_operand_value (char *buf, int hex, bfd_vma disp) 2940 { 2941 if (mode_64bit) 2942 { 2943 if (hex) 2944 { 2945 char tmp[30]; 2946 int i; 2947 buf[0] = '0'; 2948 buf[1] = 'x'; 2949 sprintf_vma (tmp, disp); 2950 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++); 2951 strcpy (buf + 2, tmp + i); 2952 } 2953 else 2954 { 2955 bfd_signed_vma v = disp; 2956 char tmp[30]; 2957 int i; 2958 if (v < 0) 2959 { 2960 *(buf++) = '-'; 2961 v = -disp; 2962 /* Check for possible overflow on 0x8000000000000000. */ 2963 if (v < 0) 2964 { 2965 strcpy (buf, "9223372036854775808"); 2966 return; 2967 } 2968 } 2969 if (!v) 2970 { 2971 strcpy (buf, "0"); 2972 return; 2973 } 2974 2975 i = 0; 2976 tmp[29] = 0; 2977 while (v) 2978 { 2979 tmp[28 - i] = (v % 10) + '0'; 2980 v /= 10; 2981 i++; 2982 } 2983 strcpy (buf, tmp + 29 - i); 2984 } 2985 } 2986 else 2987 { 2988 if (hex) 2989 sprintf (buf, "0x%x", (unsigned int) disp); 2990 else 2991 sprintf (buf, "%d", (int) disp); 2992 } 2993 } 2994 2995 static void 2996 OP_E (int bytemode, int sizeflag) 2997 { 2998 bfd_vma disp; 2999 int add = 0; 3000 int riprel = 0; 3001 USED_REX (REX_EXTZ); 3002 if (rex & REX_EXTZ) 3003 add += 8; 3004 3005 /* Skip mod/rm byte. */ 3006 MODRM_CHECK; 3007 codep++; 3008 3009 if (mod == 3) 3010 { 3011 switch (bytemode) 3012 { 3013 case b_mode: 3014 USED_REX (0); 3015 if (rex) 3016 oappend (names8rex[rm + add]); 3017 else 3018 oappend (names8[rm + add]); 3019 break; 3020 case w_mode: 3021 oappend (names16[rm + add]); 3022 break; 3023 case d_mode: 3024 oappend (names32[rm + add]); 3025 break; 3026 case q_mode: 3027 oappend (names64[rm + add]); 3028 break; 3029 case m_mode: 3030 if (mode_64bit) 3031 oappend (names64[rm + add]); 3032 else 3033 oappend (names32[rm + add]); 3034 break; 3035 case v_mode: 3036 case dq_mode: 3037 USED_REX (REX_MODE64); 3038 if (rex & REX_MODE64) 3039 oappend (names64[rm + add]); 3040 else if ((sizeflag & DFLAG) || bytemode == dq_mode) 3041 oappend (names32[rm + add]); 3042 else 3043 oappend (names16[rm + add]); 3044 used_prefixes |= (prefixes & PREFIX_DATA); 3045 break; 3046 case 0: 3047 break; 3048 default: 3049 oappend (INTERNAL_DISASSEMBLER_ERROR); 3050 break; 3051 } 3052 return; 3053 } 3054 3055 disp = 0; 3056 append_seg (); 3057 3058 if ((sizeflag & AFLAG) || mode_64bit) /* 32 bit address mode */ 3059 { 3060 int havesib; 3061 int havebase; 3062 int base; 3063 int index = 0; 3064 int scale = 0; 3065 3066 havesib = 0; 3067 havebase = 1; 3068 base = rm; 3069 3070 if (base == 4) 3071 { 3072 havesib = 1; 3073 FETCH_DATA (the_info, codep + 1); 3074 scale = (*codep >> 6) & 3; 3075 index = (*codep >> 3) & 7; 3076 base = *codep & 7; 3077 USED_REX (REX_EXTY); 3078 USED_REX (REX_EXTZ); 3079 if (rex & REX_EXTY) 3080 index += 8; 3081 if (rex & REX_EXTZ) 3082 base += 8; 3083 codep++; 3084 } 3085 3086 switch (mod) 3087 { 3088 case 0: 3089 if ((base & 7) == 5) 3090 { 3091 havebase = 0; 3092 if (mode_64bit && !havesib && (sizeflag & AFLAG)) 3093 riprel = 1; 3094 disp = get32s (); 3095 } 3096 break; 3097 case 1: 3098 FETCH_DATA (the_info, codep + 1); 3099 disp = *codep++; 3100 if ((disp & 0x80) != 0) 3101 disp -= 0x100; 3102 break; 3103 case 2: 3104 disp = get32s (); 3105 break; 3106 } 3107 3108 if (!intel_syntax) 3109 if (mod != 0 || (base & 7) == 5) 3110 { 3111 print_operand_value (scratchbuf, !riprel, disp); 3112 oappend (scratchbuf); 3113 if (riprel) 3114 { 3115 set_op (disp, 1); 3116 oappend ("(%rip)"); 3117 } 3118 } 3119 3120 if (havebase || (havesib && (index != 4 || scale != 0))) 3121 { 3122 if (intel_syntax) 3123 { 3124 switch (bytemode) 3125 { 3126 case b_mode: 3127 oappend ("BYTE PTR "); 3128 break; 3129 case w_mode: 3130 oappend ("WORD PTR "); 3131 break; 3132 case v_mode: 3133 oappend ("DWORD PTR "); 3134 break; 3135 case d_mode: 3136 oappend ("QWORD PTR "); 3137 break; 3138 case m_mode: 3139 if (mode_64bit) 3140 oappend ("DWORD PTR "); 3141 else 3142 oappend ("QWORD PTR "); 3143 break; 3144 case x_mode: 3145 oappend ("XWORD PTR "); 3146 break; 3147 default: 3148 break; 3149 } 3150 } 3151 *obufp++ = open_char; 3152 if (intel_syntax && riprel) 3153 oappend ("rip + "); 3154 *obufp = '\0'; 3155 USED_REX (REX_EXTZ); 3156 if (!havesib && (rex & REX_EXTZ)) 3157 base += 8; 3158 if (havebase) 3159 oappend (mode_64bit && (sizeflag & AFLAG) 3160 ? names64[base] : names32[base]); 3161 if (havesib) 3162 { 3163 if (index != 4) 3164 { 3165 if (intel_syntax) 3166 { 3167 if (havebase) 3168 { 3169 *obufp++ = separator_char; 3170 *obufp = '\0'; 3171 } 3172 sprintf (scratchbuf, "%s", 3173 mode_64bit && (sizeflag & AFLAG) 3174 ? names64[index] : names32[index]); 3175 } 3176 else 3177 sprintf (scratchbuf, ",%s", 3178 mode_64bit && (sizeflag & AFLAG) 3179 ? names64[index] : names32[index]); 3180 oappend (scratchbuf); 3181 } 3182 if (scale != 0 || (!intel_syntax && index != 4)) 3183 { 3184 *obufp++ = scale_char; 3185 *obufp = '\0'; 3186 sprintf (scratchbuf, "%d", 1 << scale); 3187 oappend (scratchbuf); 3188 } 3189 } 3190 if (intel_syntax) 3191 if (mod != 0 || (base & 7) == 5) 3192 { 3193 /* Don't print zero displacements. */ 3194 if (disp != 0) 3195 { 3196 if ((bfd_signed_vma) disp > 0) 3197 { 3198 *obufp++ = '+'; 3199 *obufp = '\0'; 3200 } 3201 3202 print_operand_value (scratchbuf, 0, disp); 3203 oappend (scratchbuf); 3204 } 3205 } 3206 3207 *obufp++ = close_char; 3208 *obufp = '\0'; 3209 } 3210 else if (intel_syntax) 3211 { 3212 if (mod != 0 || (base & 7) == 5) 3213 { 3214 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS 3215 | PREFIX_ES | PREFIX_FS | PREFIX_GS)) 3216 ; 3217 else 3218 { 3219 oappend (names_seg[ds_reg - es_reg]); 3220 oappend (":"); 3221 } 3222 print_operand_value (scratchbuf, 1, disp); 3223 oappend (scratchbuf); 3224 } 3225 } 3226 } 3227 else 3228 { /* 16 bit address mode */ 3229 switch (mod) 3230 { 3231 case 0: 3232 if ((rm & 7) == 6) 3233 { 3234 disp = get16 (); 3235 if ((disp & 0x8000) != 0) 3236 disp -= 0x10000; 3237 } 3238 break; 3239 case 1: 3240 FETCH_DATA (the_info, codep + 1); 3241 disp = *codep++; 3242 if ((disp & 0x80) != 0) 3243 disp -= 0x100; 3244 break; 3245 case 2: 3246 disp = get16 (); 3247 if ((disp & 0x8000) != 0) 3248 disp -= 0x10000; 3249 break; 3250 } 3251 3252 if (!intel_syntax) 3253 if (mod != 0 || (rm & 7) == 6) 3254 { 3255 print_operand_value (scratchbuf, 0, disp); 3256 oappend (scratchbuf); 3257 } 3258 3259 if (mod != 0 || (rm & 7) != 6) 3260 { 3261 *obufp++ = open_char; 3262 *obufp = '\0'; 3263 oappend (index16[rm + add]); 3264 *obufp++ = close_char; 3265 *obufp = '\0'; 3266 } 3267 } 3268 } 3269 3270 static void 3271 OP_G (int bytemode, int sizeflag) 3272 { 3273 int add = 0; 3274 USED_REX (REX_EXTX); 3275 if (rex & REX_EXTX) 3276 add += 8; 3277 switch (bytemode) 3278 { 3279 case b_mode: 3280 USED_REX (0); 3281 if (rex) 3282 oappend (names8rex[reg + add]); 3283 else 3284 oappend (names8[reg + add]); 3285 break; 3286 case w_mode: 3287 oappend (names16[reg + add]); 3288 break; 3289 case d_mode: 3290 oappend (names32[reg + add]); 3291 break; 3292 case q_mode: 3293 oappend (names64[reg + add]); 3294 break; 3295 case v_mode: 3296 USED_REX (REX_MODE64); 3297 if (rex & REX_MODE64) 3298 oappend (names64[reg + add]); 3299 else if (sizeflag & DFLAG) 3300 oappend (names32[reg + add]); 3301 else 3302 oappend (names16[reg + add]); 3303 used_prefixes |= (prefixes & PREFIX_DATA); 3304 break; 3305 default: 3306 oappend (INTERNAL_DISASSEMBLER_ERROR); 3307 break; 3308 } 3309 } 3310 3311 static bfd_vma 3312 get64 (void) 3313 { 3314 bfd_vma x; 3315 #ifdef BFD64 3316 unsigned int a; 3317 unsigned int b; 3318 3319 FETCH_DATA (the_info, codep + 8); 3320 a = *codep++ & 0xff; 3321 a |= (*codep++ & 0xff) << 8; 3322 a |= (*codep++ & 0xff) << 16; 3323 a |= (*codep++ & 0xff) << 24; 3324 b = *codep++ & 0xff; 3325 b |= (*codep++ & 0xff) << 8; 3326 b |= (*codep++ & 0xff) << 16; 3327 b |= (*codep++ & 0xff) << 24; 3328 x = a + ((bfd_vma) b << 32); 3329 #else 3330 abort (); 3331 x = 0; 3332 #endif 3333 return x; 3334 } 3335 3336 static bfd_signed_vma 3337 get32 (void) 3338 { 3339 bfd_signed_vma x = 0; 3340 3341 FETCH_DATA (the_info, codep + 4); 3342 x = *codep++ & (bfd_signed_vma) 0xff; 3343 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8; 3344 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16; 3345 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24; 3346 return x; 3347 } 3348 3349 static bfd_signed_vma 3350 get32s (void) 3351 { 3352 bfd_signed_vma x = 0; 3353 3354 FETCH_DATA (the_info, codep + 4); 3355 x = *codep++ & (bfd_signed_vma) 0xff; 3356 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8; 3357 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16; 3358 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24; 3359 3360 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31); 3361 3362 return x; 3363 } 3364 3365 static int 3366 get16 (void) 3367 { 3368 int x = 0; 3369 3370 FETCH_DATA (the_info, codep + 2); 3371 x = *codep++ & 0xff; 3372 x |= (*codep++ & 0xff) << 8; 3373 return x; 3374 } 3375 3376 static void 3377 set_op (bfd_vma op, int riprel) 3378 { 3379 op_index[op_ad] = op_ad; 3380 if (mode_64bit) 3381 { 3382 op_address[op_ad] = op; 3383 op_riprel[op_ad] = riprel; 3384 } 3385 else 3386 { 3387 /* Mask to get a 32-bit address. */ 3388 op_address[op_ad] = op & 0xffffffff; 3389 op_riprel[op_ad] = riprel & 0xffffffff; 3390 } 3391 } 3392 3393 static void 3394 OP_REG (int code, int sizeflag) 3395 { 3396 const char *s; 3397 int add = 0; 3398 USED_REX (REX_EXTZ); 3399 if (rex & REX_EXTZ) 3400 add = 8; 3401 3402 switch (code) 3403 { 3404 case indir_dx_reg: 3405 if (intel_syntax) 3406 s = "[dx]"; 3407 else 3408 s = "(%dx)"; 3409 break; 3410 case ax_reg: case cx_reg: case dx_reg: case bx_reg: 3411 case sp_reg: case bp_reg: case si_reg: case di_reg: 3412 s = names16[code - ax_reg + add]; 3413 break; 3414 case es_reg: case ss_reg: case cs_reg: 3415 case ds_reg: case fs_reg: case gs_reg: 3416 s = names_seg[code - es_reg + add]; 3417 break; 3418 case al_reg: case ah_reg: case cl_reg: case ch_reg: 3419 case dl_reg: case dh_reg: case bl_reg: case bh_reg: 3420 USED_REX (0); 3421 if (rex) 3422 s = names8rex[code - al_reg + add]; 3423 else 3424 s = names8[code - al_reg]; 3425 break; 3426 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg: 3427 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg: 3428 if (mode_64bit) 3429 { 3430 s = names64[code - rAX_reg + add]; 3431 break; 3432 } 3433 code += eAX_reg - rAX_reg; 3434 /* Fall through. */ 3435 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg: 3436 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg: 3437 USED_REX (REX_MODE64); 3438 if (rex & REX_MODE64) 3439 s = names64[code - eAX_reg + add]; 3440 else if (sizeflag & DFLAG) 3441 s = names32[code - eAX_reg + add]; 3442 else 3443 s = names16[code - eAX_reg + add]; 3444 used_prefixes |= (prefixes & PREFIX_DATA); 3445 break; 3446 default: 3447 s = INTERNAL_DISASSEMBLER_ERROR; 3448 break; 3449 } 3450 oappend (s); 3451 } 3452 3453 static void 3454 OP_IMREG (int code, int sizeflag) 3455 { 3456 const char *s; 3457 3458 switch (code) 3459 { 3460 case indir_dx_reg: 3461 if (intel_syntax) 3462 s = "[dx]"; 3463 else 3464 s = "(%dx)"; 3465 break; 3466 case ax_reg: case cx_reg: case dx_reg: case bx_reg: 3467 case sp_reg: case bp_reg: case si_reg: case di_reg: 3468 s = names16[code - ax_reg]; 3469 break; 3470 case es_reg: case ss_reg: case cs_reg: 3471 case ds_reg: case fs_reg: case gs_reg: 3472 s = names_seg[code - es_reg]; 3473 break; 3474 case al_reg: case ah_reg: case cl_reg: case ch_reg: 3475 case dl_reg: case dh_reg: case bl_reg: case bh_reg: 3476 USED_REX (0); 3477 if (rex) 3478 s = names8rex[code - al_reg]; 3479 else 3480 s = names8[code - al_reg]; 3481 break; 3482 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg: 3483 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg: 3484 USED_REX (REX_MODE64); 3485 if (rex & REX_MODE64) 3486 s = names64[code - eAX_reg]; 3487 else if (sizeflag & DFLAG) 3488 s = names32[code - eAX_reg]; 3489 else 3490 s = names16[code - eAX_reg]; 3491 used_prefixes |= (prefixes & PREFIX_DATA); 3492 break; 3493 default: 3494 s = INTERNAL_DISASSEMBLER_ERROR; 3495 break; 3496 } 3497 oappend (s); 3498 } 3499 3500 static void 3501 OP_I (int bytemode, int sizeflag) 3502 { 3503 bfd_signed_vma op; 3504 bfd_signed_vma mask = -1; 3505 3506 switch (bytemode) 3507 { 3508 case b_mode: 3509 FETCH_DATA (the_info, codep + 1); 3510 op = *codep++; 3511 mask = 0xff; 3512 break; 3513 case q_mode: 3514 if (mode_64bit) 3515 { 3516 op = get32s (); 3517 break; 3518 } 3519 /* Fall through. */ 3520 case v_mode: 3521 USED_REX (REX_MODE64); 3522 if (rex & REX_MODE64) 3523 op = get32s (); 3524 else if (sizeflag & DFLAG) 3525 { 3526 op = get32 (); 3527 mask = 0xffffffff; 3528 } 3529 else 3530 { 3531 op = get16 (); 3532 mask = 0xfffff; 3533 } 3534 used_prefixes |= (prefixes & PREFIX_DATA); 3535 break; 3536 case w_mode: 3537 mask = 0xfffff; 3538 op = get16 (); 3539 break; 3540 default: 3541 oappend (INTERNAL_DISASSEMBLER_ERROR); 3542 return; 3543 } 3544 3545 op &= mask; 3546 scratchbuf[0] = '$'; 3547 print_operand_value (scratchbuf + 1, 1, op); 3548 oappend (scratchbuf + intel_syntax); 3549 scratchbuf[0] = '\0'; 3550 } 3551 3552 static void 3553 OP_I64 (int bytemode, int sizeflag) 3554 { 3555 bfd_signed_vma op; 3556 bfd_signed_vma mask = -1; 3557 3558 if (!mode_64bit) 3559 { 3560 OP_I (bytemode, sizeflag); 3561 return; 3562 } 3563 3564 switch (bytemode) 3565 { 3566 case b_mode: 3567 FETCH_DATA (the_info, codep + 1); 3568 op = *codep++; 3569 mask = 0xff; 3570 break; 3571 case v_mode: 3572 USED_REX (REX_MODE64); 3573 if (rex & REX_MODE64) 3574 op = get64 (); 3575 else if (sizeflag & DFLAG) 3576 { 3577 op = get32 (); 3578 mask = 0xffffffff; 3579 } 3580 else 3581 { 3582 op = get16 (); 3583 mask = 0xfffff; 3584 } 3585 used_prefixes |= (prefixes & PREFIX_DATA); 3586 break; 3587 case w_mode: 3588 mask = 0xfffff; 3589 op = get16 (); 3590 break; 3591 default: 3592 oappend (INTERNAL_DISASSEMBLER_ERROR); 3593 return; 3594 } 3595 3596 op &= mask; 3597 scratchbuf[0] = '$'; 3598 print_operand_value (scratchbuf + 1, 1, op); 3599 oappend (scratchbuf + intel_syntax); 3600 scratchbuf[0] = '\0'; 3601 } 3602 3603 static void 3604 OP_sI (int bytemode, int sizeflag) 3605 { 3606 bfd_signed_vma op; 3607 bfd_signed_vma mask = -1; 3608 3609 switch (bytemode) 3610 { 3611 case b_mode: 3612 FETCH_DATA (the_info, codep + 1); 3613 op = *codep++; 3614 if ((op & 0x80) != 0) 3615 op -= 0x100; 3616 mask = 0xffffffff; 3617 break; 3618 case v_mode: 3619 USED_REX (REX_MODE64); 3620 if (rex & REX_MODE64) 3621 op = get32s (); 3622 else if (sizeflag & DFLAG) 3623 { 3624 op = get32s (); 3625 mask = 0xffffffff; 3626 } 3627 else 3628 { 3629 mask = 0xffffffff; 3630 op = get16 (); 3631 if ((op & 0x8000) != 0) 3632 op -= 0x10000; 3633 } 3634 used_prefixes |= (prefixes & PREFIX_DATA); 3635 break; 3636 case w_mode: 3637 op = get16 (); 3638 mask = 0xffffffff; 3639 if ((op & 0x8000) != 0) 3640 op -= 0x10000; 3641 break; 3642 default: 3643 oappend (INTERNAL_DISASSEMBLER_ERROR); 3644 return; 3645 } 3646 3647 scratchbuf[0] = '$'; 3648 print_operand_value (scratchbuf + 1, 1, op); 3649 oappend (scratchbuf + intel_syntax); 3650 } 3651 3652 static void 3653 OP_J (int bytemode, int sizeflag) 3654 { 3655 bfd_vma disp; 3656 bfd_vma mask = -1; 3657 3658 switch (bytemode) 3659 { 3660 case b_mode: 3661 FETCH_DATA (the_info, codep + 1); 3662 disp = *codep++; 3663 if ((disp & 0x80) != 0) 3664 disp -= 0x100; 3665 break; 3666 case v_mode: 3667 if (sizeflag & DFLAG) 3668 disp = get32s (); 3669 else 3670 { 3671 disp = get16 (); 3672 /* For some reason, a data16 prefix on a jump instruction 3673 means that the pc is masked to 16 bits after the 3674 displacement is added! */ 3675 mask = 0xffff; 3676 } 3677 break; 3678 default: 3679 oappend (INTERNAL_DISASSEMBLER_ERROR); 3680 return; 3681 } 3682 disp = (start_pc + codep - start_codep + disp) & mask; 3683 set_op (disp, 0); 3684 print_operand_value (scratchbuf, 1, disp); 3685 oappend (scratchbuf); 3686 } 3687 3688 static void 3689 OP_SEG (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 3690 { 3691 oappend (names_seg[reg]); 3692 } 3693 3694 static void 3695 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag) 3696 { 3697 int seg, offset; 3698 3699 if (sizeflag & DFLAG) 3700 { 3701 offset = get32 (); 3702 seg = get16 (); 3703 } 3704 else 3705 { 3706 offset = get16 (); 3707 seg = get16 (); 3708 } 3709 used_prefixes |= (prefixes & PREFIX_DATA); 3710 if (intel_syntax) 3711 sprintf (scratchbuf, "0x%x,0x%x", seg, offset); 3712 else 3713 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset); 3714 oappend (scratchbuf); 3715 } 3716 3717 static void 3718 OP_OFF (int bytemode ATTRIBUTE_UNUSED, int sizeflag) 3719 { 3720 bfd_vma off; 3721 3722 append_seg (); 3723 3724 if ((sizeflag & AFLAG) || mode_64bit) 3725 off = get32 (); 3726 else 3727 off = get16 (); 3728 3729 if (intel_syntax) 3730 { 3731 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS 3732 | PREFIX_ES | PREFIX_FS | PREFIX_GS))) 3733 { 3734 oappend (names_seg[ds_reg - es_reg]); 3735 oappend (":"); 3736 } 3737 } 3738 print_operand_value (scratchbuf, 1, off); 3739 oappend (scratchbuf); 3740 } 3741 3742 static void 3743 OP_OFF64 (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 3744 { 3745 bfd_vma off; 3746 3747 if (!mode_64bit) 3748 { 3749 OP_OFF (bytemode, sizeflag); 3750 return; 3751 } 3752 3753 append_seg (); 3754 3755 off = get64 (); 3756 3757 if (intel_syntax) 3758 { 3759 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS 3760 | PREFIX_ES | PREFIX_FS | PREFIX_GS))) 3761 { 3762 oappend (names_seg[ds_reg - es_reg]); 3763 oappend (":"); 3764 } 3765 } 3766 print_operand_value (scratchbuf, 1, off); 3767 oappend (scratchbuf); 3768 } 3769 3770 static void 3771 ptr_reg (int code, int sizeflag) 3772 { 3773 const char *s; 3774 if (intel_syntax) 3775 oappend ("["); 3776 else 3777 oappend ("("); 3778 3779 USED_REX (REX_MODE64); 3780 if (rex & REX_MODE64) 3781 { 3782 if (!(sizeflag & AFLAG)) 3783 s = names32[code - eAX_reg]; 3784 else 3785 s = names64[code - eAX_reg]; 3786 } 3787 else if (sizeflag & AFLAG) 3788 s = names32[code - eAX_reg]; 3789 else 3790 s = names16[code - eAX_reg]; 3791 oappend (s); 3792 if (intel_syntax) 3793 oappend ("]"); 3794 else 3795 oappend (")"); 3796 } 3797 3798 static void 3799 OP_ESreg (int code, int sizeflag) 3800 { 3801 oappend ("%es:" + intel_syntax); 3802 ptr_reg (code, sizeflag); 3803 } 3804 3805 static void 3806 OP_DSreg (int code, int sizeflag) 3807 { 3808 if ((prefixes 3809 & (PREFIX_CS 3810 | PREFIX_DS 3811 | PREFIX_SS 3812 | PREFIX_ES 3813 | PREFIX_FS 3814 | PREFIX_GS)) == 0) 3815 prefixes |= PREFIX_DS; 3816 append_seg (); 3817 ptr_reg (code, sizeflag); 3818 } 3819 3820 static void 3821 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 3822 { 3823 int add = 0; 3824 USED_REX (REX_EXTX); 3825 if (rex & REX_EXTX) 3826 add = 8; 3827 sprintf (scratchbuf, "%%cr%d", reg + add); 3828 oappend (scratchbuf + intel_syntax); 3829 } 3830 3831 static void 3832 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 3833 { 3834 int add = 0; 3835 USED_REX (REX_EXTX); 3836 if (rex & REX_EXTX) 3837 add = 8; 3838 if (intel_syntax) 3839 sprintf (scratchbuf, "db%d", reg + add); 3840 else 3841 sprintf (scratchbuf, "%%db%d", reg + add); 3842 oappend (scratchbuf); 3843 } 3844 3845 static void 3846 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 3847 { 3848 sprintf (scratchbuf, "%%tr%d", reg); 3849 oappend (scratchbuf + intel_syntax); 3850 } 3851 3852 static void 3853 OP_Rd (int bytemode, int sizeflag) 3854 { 3855 if (mod == 3) 3856 OP_E (bytemode, sizeflag); 3857 else 3858 BadOp (); 3859 } 3860 3861 static void 3862 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 3863 { 3864 int add = 0; 3865 USED_REX (REX_EXTX); 3866 if (rex & REX_EXTX) 3867 add = 8; 3868 used_prefixes |= (prefixes & PREFIX_DATA); 3869 if (prefixes & PREFIX_DATA) 3870 sprintf (scratchbuf, "%%xmm%d", reg + add); 3871 else 3872 sprintf (scratchbuf, "%%mm%d", reg + add); 3873 oappend (scratchbuf + intel_syntax); 3874 } 3875 3876 static void 3877 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 3878 { 3879 int add = 0; 3880 USED_REX (REX_EXTX); 3881 if (rex & REX_EXTX) 3882 add = 8; 3883 sprintf (scratchbuf, "%%xmm%d", reg + add); 3884 oappend (scratchbuf + intel_syntax); 3885 } 3886 3887 static void 3888 OP_EM (int bytemode, int sizeflag) 3889 { 3890 int add = 0; 3891 if (mod != 3) 3892 { 3893 OP_E (bytemode, sizeflag); 3894 return; 3895 } 3896 USED_REX (REX_EXTZ); 3897 if (rex & REX_EXTZ) 3898 add = 8; 3899 3900 /* Skip mod/rm byte. */ 3901 MODRM_CHECK; 3902 codep++; 3903 used_prefixes |= (prefixes & PREFIX_DATA); 3904 if (prefixes & PREFIX_DATA) 3905 sprintf (scratchbuf, "%%xmm%d", rm + add); 3906 else 3907 sprintf (scratchbuf, "%%mm%d", rm + add); 3908 oappend (scratchbuf + intel_syntax); 3909 } 3910 3911 static void 3912 OP_EX (int bytemode, int sizeflag) 3913 { 3914 int add = 0; 3915 if (mod != 3) 3916 { 3917 OP_E (bytemode, sizeflag); 3918 return; 3919 } 3920 USED_REX (REX_EXTZ); 3921 if (rex & REX_EXTZ) 3922 add = 8; 3923 3924 /* Skip mod/rm byte. */ 3925 MODRM_CHECK; 3926 codep++; 3927 sprintf (scratchbuf, "%%xmm%d", rm + add); 3928 oappend (scratchbuf + intel_syntax); 3929 } 3930 3931 static void 3932 OP_MS (int bytemode, int sizeflag) 3933 { 3934 if (mod == 3) 3935 OP_EM (bytemode, sizeflag); 3936 else 3937 BadOp (); 3938 } 3939 3940 static void 3941 OP_XS (int bytemode, int sizeflag) 3942 { 3943 if (mod == 3) 3944 OP_EX (bytemode, sizeflag); 3945 else 3946 BadOp (); 3947 } 3948 3949 static void 3950 OP_M (int bytemode, int sizeflag) 3951 { 3952 if (mod == 3) 3953 BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */ 3954 else 3955 OP_E (bytemode, sizeflag); 3956 } 3957 3958 static void 3959 OP_0fae (int bytemode, int sizeflag) 3960 { 3961 if (mod == 3) 3962 { 3963 if (reg == 7) 3964 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence"); 3965 3966 if (reg < 5 || rm != 0) 3967 { 3968 BadOp (); /* bad sfence, mfence, or lfence */ 3969 return; 3970 } 3971 } 3972 else if (reg != 7) 3973 { 3974 BadOp (); /* bad clflush */ 3975 return; 3976 } 3977 3978 OP_E (bytemode, sizeflag); 3979 } 3980 3981 static void 3982 NOP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 3983 { 3984 /* NOP with REPZ prefix is called PAUSE. */ 3985 if (prefixes == PREFIX_REPZ) 3986 strcpy (obuf, "pause"); 3987 } 3988 3989 static const char *const Suffix3DNow[] = { 3990 /* 00 */ NULL, NULL, NULL, NULL, 3991 /* 04 */ NULL, NULL, NULL, NULL, 3992 /* 08 */ NULL, NULL, NULL, NULL, 3993 /* 0C */ "pi2fw", "pi2fd", NULL, NULL, 3994 /* 10 */ NULL, NULL, NULL, NULL, 3995 /* 14 */ NULL, NULL, NULL, NULL, 3996 /* 18 */ NULL, NULL, NULL, NULL, 3997 /* 1C */ "pf2iw", "pf2id", NULL, NULL, 3998 /* 20 */ NULL, NULL, NULL, NULL, 3999 /* 24 */ NULL, NULL, NULL, NULL, 4000 /* 28 */ NULL, NULL, NULL, NULL, 4001 /* 2C */ NULL, NULL, NULL, NULL, 4002 /* 30 */ NULL, NULL, NULL, NULL, 4003 /* 34 */ NULL, NULL, NULL, NULL, 4004 /* 38 */ NULL, NULL, NULL, NULL, 4005 /* 3C */ NULL, NULL, NULL, NULL, 4006 /* 40 */ NULL, NULL, NULL, NULL, 4007 /* 44 */ NULL, NULL, NULL, NULL, 4008 /* 48 */ NULL, NULL, NULL, NULL, 4009 /* 4C */ NULL, NULL, NULL, NULL, 4010 /* 50 */ NULL, NULL, NULL, NULL, 4011 /* 54 */ NULL, NULL, NULL, NULL, 4012 /* 58 */ NULL, NULL, NULL, NULL, 4013 /* 5C */ NULL, NULL, NULL, NULL, 4014 /* 60 */ NULL, NULL, NULL, NULL, 4015 /* 64 */ NULL, NULL, NULL, NULL, 4016 /* 68 */ NULL, NULL, NULL, NULL, 4017 /* 6C */ NULL, NULL, NULL, NULL, 4018 /* 70 */ NULL, NULL, NULL, NULL, 4019 /* 74 */ NULL, NULL, NULL, NULL, 4020 /* 78 */ NULL, NULL, NULL, NULL, 4021 /* 7C */ NULL, NULL, NULL, NULL, 4022 /* 80 */ NULL, NULL, NULL, NULL, 4023 /* 84 */ NULL, NULL, NULL, NULL, 4024 /* 88 */ NULL, NULL, "pfnacc", NULL, 4025 /* 8C */ NULL, NULL, "pfpnacc", NULL, 4026 /* 90 */ "pfcmpge", NULL, NULL, NULL, 4027 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt", 4028 /* 98 */ NULL, NULL, "pfsub", NULL, 4029 /* 9C */ NULL, NULL, "pfadd", NULL, 4030 /* A0 */ "pfcmpgt", NULL, NULL, NULL, 4031 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1", 4032 /* A8 */ NULL, NULL, "pfsubr", NULL, 4033 /* AC */ NULL, NULL, "pfacc", NULL, 4034 /* B0 */ "pfcmpeq", NULL, NULL, NULL, 4035 /* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw", 4036 /* B8 */ NULL, NULL, NULL, "pswapd", 4037 /* BC */ NULL, NULL, NULL, "pavgusb", 4038 /* C0 */ NULL, NULL, NULL, NULL, 4039 /* C4 */ NULL, NULL, NULL, NULL, 4040 /* C8 */ NULL, NULL, NULL, NULL, 4041 /* CC */ NULL, NULL, NULL, NULL, 4042 /* D0 */ NULL, NULL, NULL, NULL, 4043 /* D4 */ NULL, NULL, NULL, NULL, 4044 /* D8 */ NULL, NULL, NULL, NULL, 4045 /* DC */ NULL, NULL, NULL, NULL, 4046 /* E0 */ NULL, NULL, NULL, NULL, 4047 /* E4 */ NULL, NULL, NULL, NULL, 4048 /* E8 */ NULL, NULL, NULL, NULL, 4049 /* EC */ NULL, NULL, NULL, NULL, 4050 /* F0 */ NULL, NULL, NULL, NULL, 4051 /* F4 */ NULL, NULL, NULL, NULL, 4052 /* F8 */ NULL, NULL, NULL, NULL, 4053 /* FC */ NULL, NULL, NULL, NULL, 4054 }; 4055 4056 static void 4057 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 4058 { 4059 const char *mnemonic; 4060 4061 FETCH_DATA (the_info, codep + 1); 4062 /* AMD 3DNow! instructions are specified by an opcode suffix in the 4063 place where an 8-bit immediate would normally go. ie. the last 4064 byte of the instruction. */ 4065 obufp = obuf + strlen (obuf); 4066 mnemonic = Suffix3DNow[*codep++ & 0xff]; 4067 if (mnemonic) 4068 oappend (mnemonic); 4069 else 4070 { 4071 /* Since a variable sized modrm/sib chunk is between the start 4072 of the opcode (0x0f0f) and the opcode suffix, we need to do 4073 all the modrm processing first, and don't know until now that 4074 we have a bad opcode. This necessitates some cleaning up. */ 4075 op1out[0] = '\0'; 4076 op2out[0] = '\0'; 4077 BadOp (); 4078 } 4079 } 4080 4081 static const char *simd_cmp_op[] = { 4082 "eq", 4083 "lt", 4084 "le", 4085 "unord", 4086 "neq", 4087 "nlt", 4088 "nle", 4089 "ord" 4090 }; 4091 4092 static void 4093 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 4094 { 4095 unsigned int cmp_type; 4096 4097 FETCH_DATA (the_info, codep + 1); 4098 obufp = obuf + strlen (obuf); 4099 cmp_type = *codep++ & 0xff; 4100 if (cmp_type < 8) 4101 { 4102 char suffix1 = 'p', suffix2 = 's'; 4103 used_prefixes |= (prefixes & PREFIX_REPZ); 4104 if (prefixes & PREFIX_REPZ) 4105 suffix1 = 's'; 4106 else 4107 { 4108 used_prefixes |= (prefixes & PREFIX_DATA); 4109 if (prefixes & PREFIX_DATA) 4110 suffix2 = 'd'; 4111 else 4112 { 4113 used_prefixes |= (prefixes & PREFIX_REPNZ); 4114 if (prefixes & PREFIX_REPNZ) 4115 suffix1 = 's', suffix2 = 'd'; 4116 } 4117 } 4118 sprintf (scratchbuf, "cmp%s%c%c", 4119 simd_cmp_op[cmp_type], suffix1, suffix2); 4120 used_prefixes |= (prefixes & PREFIX_REPZ); 4121 oappend (scratchbuf); 4122 } 4123 else 4124 { 4125 /* We have a bad extension byte. Clean up. */ 4126 op1out[0] = '\0'; 4127 op2out[0] = '\0'; 4128 BadOp (); 4129 } 4130 } 4131 4132 static void 4133 SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED) 4134 { 4135 /* Change movlps/movhps to movhlps/movlhps for 2 register operand 4136 forms of these instructions. */ 4137 if (mod == 3) 4138 { 4139 char *p = obuf + strlen (obuf); 4140 *(p + 1) = '\0'; 4141 *p = *(p - 1); 4142 *(p - 1) = *(p - 2); 4143 *(p - 2) = *(p - 3); 4144 *(p - 3) = extrachar; 4145 } 4146 } 4147 4148 static void 4149 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag) 4150 { 4151 if (mod == 3 && reg == 1) 4152 { 4153 char *p = obuf + strlen (obuf); 4154 4155 /* Override "sidt". */ 4156 if (rm) 4157 { 4158 /* mwait %eax,%ecx */ 4159 strcpy (p - 4, "mwait %eax,%ecx"); 4160 } 4161 else 4162 { 4163 /* monitor %eax,%ecx,%edx" */ 4164 strcpy (p - 4, "monitor %eax,%ecx,%edx"); 4165 } 4166 4167 codep++; 4168 } 4169 else 4170 OP_E (0, sizeflag); 4171 } 4172 4173 static void 4174 INVLPG_Fixup (int bytemode, int sizeflag) 4175 { 4176 if (*codep == 0xf8) 4177 { 4178 char *p = obuf + strlen (obuf); 4179 4180 /* Override "invlpg". */ 4181 strcpy (p - 6, "swapgs"); 4182 codep++; 4183 } 4184 else 4185 OP_E (bytemode, sizeflag); 4186 } 4187 4188 static struct { 4189 unsigned char opc; 4190 char *name; 4191 } xcrypt[] = { 4192 { 0xc0, "xstore-rng" }, 4193 { 0xc8, "xcrypt-ecb" }, 4194 { 0xd0, "xcrypt-cbc" }, 4195 { 0xd8, "xcrypt-ctr" }, 4196 { 0xe0, "xcrypt-cfb" }, 4197 { 0xe8, "xcrypt-ofb" }, 4198 }; 4199 4200 static struct { 4201 unsigned char opc; 4202 char *name; 4203 } xcrypt2[] = { 4204 { 0xc0, "montmul" }, 4205 { 0xc8, "xsha1" }, 4206 { 0xd0, "xsha256" }, 4207 }; 4208 4209 static void 4210 OP_xcrypt (bytemode, sizeflag) 4211 int bytemode ATTRIBUTE_UNUSED; 4212 int sizeflag ATTRIBUTE_UNUSED; 4213 { 4214 const char *mnemonic = NULL; 4215 unsigned int i; 4216 4217 FETCH_DATA (the_info, codep + 1); 4218 /* VIA C3 xcrypt-* & xmove-* instructions are specified by an opcode 4219 suffix in the place where an 8-bit immediate would normally go. 4220 ie. the last byte of the instruction. */ 4221 obufp = obuf + strlen(obuf); 4222 4223 for (i = 0; i < sizeof(xcrypt) / sizeof(xcrypt[0]); i++) 4224 if (xcrypt[i].opc == (*codep & 0xff)) 4225 mnemonic = xcrypt[i].name; 4226 codep++; 4227 if (mnemonic) 4228 oappend (mnemonic); 4229 else 4230 BadOp(); 4231 } 4232 4233 static void 4234 OP_xcrypt2 (bytemode, sizeflag) 4235 int bytemode ATTRIBUTE_UNUSED; 4236 int sizeflag ATTRIBUTE_UNUSED; 4237 { 4238 const char *mnemonic = NULL; 4239 unsigned int i; 4240 4241 FETCH_DATA (the_info, codep + 1); 4242 /* VIA C3 xcrypt2 instructions are specified by an opcode 4243 suffix in the place where an 8-bit immediate would normally go. 4244 ie. the last byte of the instruction. */ 4245 obufp = obuf + strlen(obuf); 4246 4247 for (i = 0; i < sizeof(xcrypt2) / sizeof(xcrypt2[0]); i++) 4248 if (xcrypt2[i].opc == (*codep & 0xff)) 4249 mnemonic = xcrypt2[i].name; 4250 codep++; 4251 if (mnemonic) 4252 oappend (mnemonic); 4253 else 4254 BadOp(); 4255 } 4256 4257 static struct { 4258 unsigned char opc; 4259 char *name; 4260 } aes[] = { 4261 { 0x00, "pshufb" }, 4262 { 0xdb, "aesimc" }, 4263 { 0xdc, "aesenc" }, 4264 { 0xde, "aesdec" }, 4265 { 0xdd, "aesenclast" }, 4266 { 0xdf, "aesdeclast" } 4267 }; 4268 4269 #define XMM_DST(rex, modrm) \ 4270 (((((rex) & ~0x40) & 0x4) ? 8 : 0) | (((modrm) & ~0xc0) >> 3)) 4271 #define XMM_SRC(rex, modrm) \ 4272 (((((rex) & ~0x40) & 0x1) ? 8 : 0) | (((modrm) & ~0xc0) & 7)) 4273 4274 static void 4275 OP_0f38 (bytemode, sizeflag) 4276 int bytemode ATTRIBUTE_UNUSED; 4277 int sizeflag ATTRIBUTE_UNUSED; 4278 { 4279 const char *mnemonic = NULL; 4280 unsigned int i; 4281 4282 FETCH_DATA (the_info, codep + 1); 4283 obufp = obuf + strlen (obuf); 4284 4285 for (i = 0; i < sizeof(aes) / sizeof(aes[0]); i++) 4286 if (aes[i].opc == (*codep & 0xff)) 4287 mnemonic = aes[i].name; 4288 4289 codep++; 4290 if (mnemonic) 4291 { 4292 oappend (mnemonic); 4293 4294 FETCH_DATA (the_info, codep + 1); 4295 sprintf (scratchbuf, " %%xmm%d", XMM_SRC (rex, *codep)); 4296 oappend (scratchbuf); 4297 sprintf (scratchbuf, ",%%xmm%d", XMM_DST (rex, *codep)); 4298 oappend (scratchbuf); 4299 4300 codep++; 4301 used_prefixes |= (prefixes & PREFIX_DATA); 4302 USED_REX(rex); 4303 } 4304 else 4305 BadOp(); 4306 } 4307 4308 static struct { 4309 unsigned char opc; 4310 char *name; 4311 } pclmul[] = { 4312 { 0x00, "pclmullqlqdq" }, 4313 { 0x01, "pclmulhqlqdq" }, 4314 { 0x10, "pclmullqhqdq" }, 4315 { 0x11, "pclmulhqhqdq" }, 4316 }; 4317 4318 static void 4319 OP_0f3a (bytemode, sizeflag) 4320 int bytemode ATTRIBUTE_UNUSED; 4321 int sizeflag ATTRIBUTE_UNUSED; 4322 { 4323 const char *mnemonic = NULL; 4324 unsigned int i, xmms; 4325 unsigned char op, imm; 4326 4327 FETCH_DATA (the_info, codep + 1); 4328 obufp = obuf + strlen (obuf); 4329 4330 op = *codep; 4331 codep++; 4332 4333 FETCH_DATA (the_info, codep + 1); 4334 4335 /* save xmm pair */ 4336 xmms = XMM_DST (rex, *codep) << 8; 4337 xmms |= XMM_SRC (rex, *codep); 4338 codep++; 4339 4340 /* save immediate field */ 4341 FETCH_DATA (the_info, codep + 2); 4342 imm = *codep; 4343 codep++; 4344 4345 if (op != 0x44 && op != 0xdf) 4346 { 4347 BadOp(); 4348 return; 4349 } 4350 4351 switch (op) 4352 { 4353 case 0x44: 4354 for (i = 0; i < sizeof(pclmul) / sizeof(pclmul[0]); i++) 4355 if (pclmul[i].opc == imm) 4356 mnemonic = pclmul[i].name; 4357 4358 if (!mnemonic) 4359 { 4360 oappend ("pclmulqdq"); 4361 sprintf (scratchbuf, " $%#x,", imm); 4362 oappend (scratchbuf); 4363 } 4364 else 4365 { 4366 oappend (mnemonic); 4367 oappend (" "); 4368 } 4369 break; 4370 case 0xdf: 4371 oappend ("aeskeygenassist "); 4372 sprintf (scratchbuf, " $%#x,", imm); 4373 oappend (scratchbuf); 4374 break; 4375 } 4376 4377 sprintf (scratchbuf, "%%xmm%d,", xmms & 0xff); 4378 oappend (scratchbuf); 4379 sprintf (scratchbuf, "%%xmm%d", xmms >> 8); 4380 oappend (scratchbuf); 4381 4382 used_prefixes |= (prefixes & PREFIX_DATA); 4383 USED_REX(rex); 4384 } 4385 4386 static void 4387 BadOp (void) 4388 { 4389 /* Throw away prefixes and 1st. opcode byte. */ 4390 codep = insn_codep + 1; 4391 oappend ("(bad)"); 4392 } 4393