1*d2201f2fSdrahn /* Interface definition for configurable Xtensa ISA support. 2*d2201f2fSdrahn Copyright 2003 Free Software Foundation, Inc. 3*d2201f2fSdrahn 4*d2201f2fSdrahn This file is part of BFD, the Binary File Descriptor library. 5*d2201f2fSdrahn 6*d2201f2fSdrahn This program is free software; you can redistribute it and/or modify 7*d2201f2fSdrahn it under the terms of the GNU General Public License as published by 8*d2201f2fSdrahn the Free Software Foundation; either version 2 of the License, or 9*d2201f2fSdrahn (at your option) any later version. 10*d2201f2fSdrahn 11*d2201f2fSdrahn This program is distributed in the hope that it will be useful, 12*d2201f2fSdrahn but WITHOUT ANY WARRANTY; without even the implied warranty of 13*d2201f2fSdrahn MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14*d2201f2fSdrahn GNU General Public License for more details. 15*d2201f2fSdrahn 16*d2201f2fSdrahn You should have received a copy of the GNU General Public License 17*d2201f2fSdrahn along with this program; if not, write to the Free Software 18*d2201f2fSdrahn Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 19*d2201f2fSdrahn 20*d2201f2fSdrahn #ifndef XTENSA_LIBISA_H 21*d2201f2fSdrahn #define XTENSA_LIBISA_H 22*d2201f2fSdrahn 23*d2201f2fSdrahn /* Use the statically-linked version for the GNU tools. */ 24*d2201f2fSdrahn #define STATIC_LIBISA 1 25*d2201f2fSdrahn 26*d2201f2fSdrahn #ifdef __cplusplus 27*d2201f2fSdrahn extern "C" { 28*d2201f2fSdrahn #endif 29*d2201f2fSdrahn 30*d2201f2fSdrahn #ifndef uint32 31*d2201f2fSdrahn #define uint32 unsigned int 32*d2201f2fSdrahn #endif 33*d2201f2fSdrahn 34*d2201f2fSdrahn /* This file defines the interface to the Xtensa ISA library. This library 35*d2201f2fSdrahn contains most of the ISA-specific information for a particular Xtensa 36*d2201f2fSdrahn processor. For example, the set of valid instructions, their opcode 37*d2201f2fSdrahn encodings and operand fields are all included here. To support Xtensa's 38*d2201f2fSdrahn configurability and user-defined instruction extensions (i.e., TIE), the 39*d2201f2fSdrahn library is initialized by loading one or more dynamic libraries; only a 40*d2201f2fSdrahn small set of interface code is present in the statically-linked portion 41*d2201f2fSdrahn of the library. 42*d2201f2fSdrahn 43*d2201f2fSdrahn This interface basically defines four abstract data types. 44*d2201f2fSdrahn 45*d2201f2fSdrahn . an instruction buffer - for holding the raw instruction bits 46*d2201f2fSdrahn . ISA info - information about the ISA as a whole 47*d2201f2fSdrahn . opcode info - information about individual instructions 48*d2201f2fSdrahn . operand info - information about specific instruction operands 49*d2201f2fSdrahn 50*d2201f2fSdrahn It would be nice to implement these as classes in C++, but the library is 51*d2201f2fSdrahn implemented in C to match the expectations of the GNU tools. 52*d2201f2fSdrahn Instead, the interface defines a set of functions to access each data 53*d2201f2fSdrahn type. With the exception of the instruction buffer, the internal 54*d2201f2fSdrahn representations of the data structures are hidden. All accesses must be 55*d2201f2fSdrahn made through the functions defined here. */ 56*d2201f2fSdrahn 57*d2201f2fSdrahn typedef void* xtensa_isa; 58*d2201f2fSdrahn typedef void* xtensa_operand; 59*d2201f2fSdrahn 60*d2201f2fSdrahn 61*d2201f2fSdrahn /* Opcodes are represented here using sequential integers beginning with 0. 62*d2201f2fSdrahn The specific value used for a particular opcode is only fixed for a 63*d2201f2fSdrahn particular instantiation of an xtensa_isa structure, so these values 64*d2201f2fSdrahn should only be used internally. */ 65*d2201f2fSdrahn typedef int xtensa_opcode; 66*d2201f2fSdrahn 67*d2201f2fSdrahn /* Define a unique value for undefined opcodes ("static const int" doesn't 68*d2201f2fSdrahn seem to work for this because EGCS 1.0.3 on i686-Linux without -O won't 69*d2201f2fSdrahn allow it to be used as an initializer). */ 70*d2201f2fSdrahn #define XTENSA_UNDEFINED -1 71*d2201f2fSdrahn 72*d2201f2fSdrahn 73*d2201f2fSdrahn typedef int libisa_module_specifier; 74*d2201f2fSdrahn 75*d2201f2fSdrahn extern xtensa_isa xtensa_isa_init (void); 76*d2201f2fSdrahn 77*d2201f2fSdrahn 78*d2201f2fSdrahn /* Instruction buffers. */ 79*d2201f2fSdrahn 80*d2201f2fSdrahn typedef uint32 xtensa_insnbuf_word; 81*d2201f2fSdrahn typedef xtensa_insnbuf_word *xtensa_insnbuf; 82*d2201f2fSdrahn 83*d2201f2fSdrahn /* Get the size in words of the xtensa_insnbuf array. */ 84*d2201f2fSdrahn extern int xtensa_insnbuf_size (xtensa_isa); 85*d2201f2fSdrahn 86*d2201f2fSdrahn /* Allocate (with malloc) an xtensa_insnbuf of the right size. */ 87*d2201f2fSdrahn extern xtensa_insnbuf xtensa_insnbuf_alloc (xtensa_isa); 88*d2201f2fSdrahn 89*d2201f2fSdrahn /* Release (with free) an xtensa_insnbuf of the right size. */ 90*d2201f2fSdrahn extern void xtensa_insnbuf_free (xtensa_insnbuf); 91*d2201f2fSdrahn 92*d2201f2fSdrahn /* Inward and outward conversion from memory images (byte streams) to our 93*d2201f2fSdrahn internal instruction representation. */ 94*d2201f2fSdrahn extern void xtensa_insnbuf_to_chars (xtensa_isa, const xtensa_insnbuf, 95*d2201f2fSdrahn char *); 96*d2201f2fSdrahn 97*d2201f2fSdrahn extern void xtensa_insnbuf_from_chars (xtensa_isa, xtensa_insnbuf, 98*d2201f2fSdrahn const char *); 99*d2201f2fSdrahn 100*d2201f2fSdrahn 101*d2201f2fSdrahn /* ISA information. */ 102*d2201f2fSdrahn 103*d2201f2fSdrahn /* Load the ISA information from a shared library. If successful, this returns 104*d2201f2fSdrahn a value which identifies the ISA for use in subsequent calls to the ISA 105*d2201f2fSdrahn library; otherwise, it returns NULL. Multiple ISAs can be loaded to support 106*d2201f2fSdrahn heterogeneous multiprocessor systems. */ 107*d2201f2fSdrahn extern xtensa_isa xtensa_load_isa (libisa_module_specifier); 108*d2201f2fSdrahn 109*d2201f2fSdrahn /* Extend an existing set of ISA information by loading an additional shared 110*d2201f2fSdrahn library of ISA information. This is primarily intended for loading TIE 111*d2201f2fSdrahn extensions. If successful, the return value is non-zero. */ 112*d2201f2fSdrahn extern int xtensa_extend_isa (xtensa_isa, libisa_module_specifier); 113*d2201f2fSdrahn 114*d2201f2fSdrahn /* The default ISA. This variable is set automatically to the ISA most 115*d2201f2fSdrahn recently loaded and is provided as a convenience. An exception is the GNU 116*d2201f2fSdrahn opcodes library, where there is a fixed interface that does not allow 117*d2201f2fSdrahn passing the ISA as a parameter and the ISA must be taken from this global 118*d2201f2fSdrahn variable. (Note: Since this variable is just a convenience, it is not 119*d2201f2fSdrahn exported when libisa is built as a DLL, due to the hassle of dealing with 120*d2201f2fSdrahn declspecs.) */ 121*d2201f2fSdrahn extern xtensa_isa xtensa_default_isa; 122*d2201f2fSdrahn 123*d2201f2fSdrahn 124*d2201f2fSdrahn /* Deallocate an xtensa_isa structure. */ 125*d2201f2fSdrahn extern void xtensa_isa_free (xtensa_isa); 126*d2201f2fSdrahn 127*d2201f2fSdrahn /* Get the maximum instruction size in bytes. */ 128*d2201f2fSdrahn extern int xtensa_insn_maxlength (xtensa_isa); 129*d2201f2fSdrahn 130*d2201f2fSdrahn /* Get the total number of opcodes for this processor. */ 131*d2201f2fSdrahn extern int xtensa_num_opcodes (xtensa_isa); 132*d2201f2fSdrahn 133*d2201f2fSdrahn /* Translate a mnemonic name to an opcode. Returns XTENSA_UNDEFINED if 134*d2201f2fSdrahn the name is not a valid opcode mnemonic. */ 135*d2201f2fSdrahn extern xtensa_opcode xtensa_opcode_lookup (xtensa_isa, const char *); 136*d2201f2fSdrahn 137*d2201f2fSdrahn /* Decode a binary instruction buffer. Returns the opcode or 138*d2201f2fSdrahn XTENSA_UNDEFINED if the instruction is illegal. */ 139*d2201f2fSdrahn extern xtensa_opcode xtensa_decode_insn (xtensa_isa, const xtensa_insnbuf); 140*d2201f2fSdrahn 141*d2201f2fSdrahn 142*d2201f2fSdrahn /* Opcode information. */ 143*d2201f2fSdrahn 144*d2201f2fSdrahn /* Set the opcode field(s) in a binary instruction buffer. The operand 145*d2201f2fSdrahn fields are set to zero. */ 146*d2201f2fSdrahn extern void xtensa_encode_insn (xtensa_isa, xtensa_opcode, xtensa_insnbuf); 147*d2201f2fSdrahn 148*d2201f2fSdrahn /* Get the mnemonic name for an opcode. */ 149*d2201f2fSdrahn extern const char * xtensa_opcode_name (xtensa_isa, xtensa_opcode); 150*d2201f2fSdrahn 151*d2201f2fSdrahn /* Find the length (in bytes) of an instruction. */ 152*d2201f2fSdrahn extern int xtensa_insn_length (xtensa_isa, xtensa_opcode); 153*d2201f2fSdrahn 154*d2201f2fSdrahn /* Find the length of an instruction by looking only at the first byte. */ 155*d2201f2fSdrahn extern int xtensa_insn_length_from_first_byte (xtensa_isa, char); 156*d2201f2fSdrahn 157*d2201f2fSdrahn /* Find the number of operands for an instruction. */ 158*d2201f2fSdrahn extern int xtensa_num_operands (xtensa_isa, xtensa_opcode); 159*d2201f2fSdrahn 160*d2201f2fSdrahn /* Get the information about operand number "opnd" of a particular opcode. */ 161*d2201f2fSdrahn extern xtensa_operand xtensa_get_operand (xtensa_isa, xtensa_opcode, int); 162*d2201f2fSdrahn 163*d2201f2fSdrahn /* Operand information. */ 164*d2201f2fSdrahn 165*d2201f2fSdrahn /* Find the kind of operand. There are three possibilities: 166*d2201f2fSdrahn 1) PC-relative immediates (e.g., "l", "L"). These can be identified with 167*d2201f2fSdrahn the xtensa_operand_isPCRelative function. 168*d2201f2fSdrahn 2) non-PC-relative immediates ("i"). 169*d2201f2fSdrahn 3) register-file short names (e.g., "a", "b", "m" and others defined 170*d2201f2fSdrahn via TIE). */ 171*d2201f2fSdrahn extern char * xtensa_operand_kind (xtensa_operand); 172*d2201f2fSdrahn 173*d2201f2fSdrahn /* Check if an operand is an input ('<'), output ('>'), or inout ('=') 174*d2201f2fSdrahn operand. Note: The output operand of a conditional assignment 175*d2201f2fSdrahn (e.g., movnez) appears here as an inout ('=') even if it is declared 176*d2201f2fSdrahn in the TIE code as an output ('>'); this allows the compiler to 177*d2201f2fSdrahn properly handle register allocation for conditional assignments. */ 178*d2201f2fSdrahn extern char xtensa_operand_inout (xtensa_operand); 179*d2201f2fSdrahn 180*d2201f2fSdrahn /* Get and set the raw (encoded) value of the field for the specified 181*d2201f2fSdrahn operand. The "set" function does not check if the value fits in the 182*d2201f2fSdrahn field; that is done by the "encode" function below. */ 183*d2201f2fSdrahn extern uint32 xtensa_operand_get_field (xtensa_operand, const xtensa_insnbuf); 184*d2201f2fSdrahn 185*d2201f2fSdrahn extern void xtensa_operand_set_field (xtensa_operand, xtensa_insnbuf, uint32); 186*d2201f2fSdrahn 187*d2201f2fSdrahn 188*d2201f2fSdrahn /* Encode and decode operands. The raw bits in the operand field 189*d2201f2fSdrahn may be encoded in a variety of different ways. These functions hide the 190*d2201f2fSdrahn details of that encoding. The encode function has a special return type 191*d2201f2fSdrahn (xtensa_encode_result) to indicate success or the reason for failure; the 192*d2201f2fSdrahn encoded value is returned through the argument pointer. The decode function 193*d2201f2fSdrahn has no possibility of failure and returns the decoded value. */ 194*d2201f2fSdrahn 195*d2201f2fSdrahn typedef enum 196*d2201f2fSdrahn { 197*d2201f2fSdrahn xtensa_encode_result_ok, 198*d2201f2fSdrahn xtensa_encode_result_align, 199*d2201f2fSdrahn xtensa_encode_result_not_in_table, 200*d2201f2fSdrahn xtensa_encode_result_too_low, 201*d2201f2fSdrahn xtensa_encode_result_too_high, 202*d2201f2fSdrahn xtensa_encode_result_not_ok, 203*d2201f2fSdrahn xtensa_encode_result_max = xtensa_encode_result_not_ok 204*d2201f2fSdrahn } xtensa_encode_result; 205*d2201f2fSdrahn 206*d2201f2fSdrahn extern xtensa_encode_result xtensa_operand_encode (xtensa_operand, uint32 *); 207*d2201f2fSdrahn 208*d2201f2fSdrahn extern uint32 xtensa_operand_decode (xtensa_operand, uint32); 209*d2201f2fSdrahn 210*d2201f2fSdrahn 211*d2201f2fSdrahn /* For PC-relative offset operands, the interpretation of the offset may vary 212*d2201f2fSdrahn between opcodes, e.g., is it relative to the current PC or that of the next 213*d2201f2fSdrahn instruction? The following functions are defined to perform PC-relative 214*d2201f2fSdrahn relocations and to undo them (as in the disassembler). The first function 215*d2201f2fSdrahn takes the desired address and the PC of the current instruction and returns 216*d2201f2fSdrahn the unencoded value to be stored in the offset field. The second function 217*d2201f2fSdrahn takes the unencoded offset value and the current PC and returns the address. 218*d2201f2fSdrahn Note that these functions do not replace the encode/decode functions; the 219*d2201f2fSdrahn operands must be encoded/decoded separately. */ 220*d2201f2fSdrahn 221*d2201f2fSdrahn extern int xtensa_operand_isPCRelative (xtensa_operand); 222*d2201f2fSdrahn 223*d2201f2fSdrahn extern uint32 xtensa_operand_do_reloc (xtensa_operand, uint32, uint32); 224*d2201f2fSdrahn 225*d2201f2fSdrahn extern uint32 xtensa_operand_undo_reloc (xtensa_operand, uint32, uint32); 226*d2201f2fSdrahn 227*d2201f2fSdrahn #ifdef __cplusplus 228*d2201f2fSdrahn } 229*d2201f2fSdrahn #endif 230*d2201f2fSdrahn #endif /* XTENSA_LIBISA_H */ 231