xref: /openbsd-src/gnu/usr.bin/binutils/include/opcode/hppa.h (revision b2ea75c1b17e1a9a339660e7ed45cd24946b230e)
1 /* Table of opcodes for the PA-RISC.
2    Copyright (C) 1990, 1991, 1993, 1995, 1999 Free Software Foundation, Inc.
3 
4    Contributed by the Center for Software Science at the
5    University of Utah (pa-gdb-bugs@cs.utah.edu).
6 
7 This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler.
8 
9 GAS/GDB is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 1, or (at your option)
12 any later version.
13 
14 GAS/GDB is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 GNU General Public License for more details.
18 
19 You should have received a copy of the GNU General Public License
20 along with GAS or GDB; see the file COPYING.  If not, write to
21 the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
22 
23 #if !defined(__STDC__) && !defined(const)
24 #define const
25 #endif
26 
27 /*
28  * Structure of an opcode table entry.
29  */
30 
31 /* There are two kinds of delay slot nullification: normal which is
32  * controled by the nullification bit, and conditional, which depends
33  * on the direction of the branch and its success or failure.
34  *
35  * NONE is unfortunately #defined in the hiux system include files.
36  * #undef it away.
37  */
38 #undef NONE
39 struct pa_opcode
40 {
41     const char *name;
42     unsigned long int match;	/* Bits that must be set...  */
43     unsigned long int mask;	/* ... in these bits. */
44     char *args;
45     enum pa_arch arch;
46     char flags;
47 };
48 
49 /* Enable/disable strict syntax checking.  Not currently used, but will
50    be necessary for PA2.0 support in the future.  */
51 #define FLAG_STRICT 0x1
52 
53 /*
54    All hppa opcodes are 32 bits.
55 
56    The match component is a mask saying which bits must match a
57    particular opcode in order for an instruction to be an instance
58    of that opcode.
59 
60    The args component is a string containing one character for each operand of
61    the instruction.  Characters used as a prefix allow any second character to
62    be used without conflicting with the main operand characters.
63 
64    Bit positions in this description follow HP usage of lsb = 31,
65    "at" is lsb of field.
66 
67    In the args field, the following characters must match exactly:
68 
69 	'+,() '
70 
71    In the args field, the following characters are unused:
72 
73 	'  "   &     -  /   34 6789:;< > @'
74 	'  C         M             [\]  '
75 	'    e g    l            y   } '
76 
77    Here are all the characters:
78 
79 	' !"#$%&'()*+-,./0123456789:;<=>?@'
80 	'ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_'
81 	'abcdefghijklmnopqrstuvwxyz{|}~'
82 
83 Kinds of operands:
84    x    integer register field at 15.
85    b    integer register field at 10.
86    t    integer register field at 31.
87    a	integer register field at 10 and 15 (for PERMH)
88    5    5 bit immediate at 15.
89    s    2 bit space specifier at 17.
90    S    3 bit space specifier at 18.
91    V    5 bit immediate value at 31
92    i    11 bit immediate value at 31
93    j    14 bit immediate value at 31
94    k    21 bit immediate value at 31
95    n	nullification for branch instructions
96    N	nullification for spop and copr instructions
97    w    12 bit branch displacement
98    W    17 bit branch displacement (PC relative)
99    X    22 bit branch displacement (PC relative)
100    z    17 bit branch displacement (just a number, not an address)
101 
102 Also these:
103 
104    .    2 bit shift amount at 25
105    *    4 bit shift amount at 25
106    p    5 bit shift count at 26 (to support the SHD instruction) encoded as
107         31-p
108    ~    6 bit shift count at 20,22:26 encoded as 63-~.
109    P    5 bit bit position at 26
110    q    6 bit bit position at 20,22:26
111    T    5 bit field length at 31 (encoded as 32-T)
112    %	6 bit field length at 23,27:31 (variable extract/deposit)
113    |	6 bit field length at 19,27:31 (fixed extract/deposit)
114    A    13 bit immediate at 18 (to support the BREAK instruction)
115    ^	like b, but describes a control register
116    !    sar (cr11) register
117    D    26 bit immediate at 31 (to support the DIAG instruction)
118    $    9 bit immediate at 28 (to support POPBTS)
119 
120    v    3 bit Special Function Unit identifier at 25
121    O    20 bit Special Function Unit operation split between 15 bits at 20
122         and 5 bits at 31
123    o    15 bit Special Function Unit operation at 20
124    2    22 bit Special Function Unit operation split between 17 bits at 20
125         and 5 bits at 31
126    1    15 bit Special Function Unit operation split between 10 bits at 20
127         and 5 bits at 31
128    0    10 bit Special Function Unit operation split between 5 bits at 20
129         and 5 bits at 31
130    u    3 bit coprocessor unit identifier at 25
131    F    Source Floating Point Operand Format Completer encoded 2 bits at 20
132    I    Source Floating Point Operand Format Completer encoded 1 bits at 20
133 	(for 0xe format FP instructions)
134    G    Destination Floating Point Operand Format Completer encoded 2 bits at 18
135    H    Floating Point Operand Format at 26 for 'fmpyadd' and 'fmpysub'
136         (very similar to 'F')
137 
138    r	5 bit immediate value at 31 (for the break instruction)
139 	(very similar to V above, except the value is unsigned instead of
140 	low_sign_ext)
141    R	5 bit immediate value at 15 (for the ssm, rsm, probei instructions)
142 	(same as r above, except the value is in a different location)
143    U	10 bit immediate value at 15 (for SSM, RSM on pa2.0)
144    Q	5 bit immediate value at 10 (a bit position specified in
145 	the bb instruction. It's the same as r above, except the
146         value is in a different location)
147    B	5 bit immediate value at 10 (a bit position specified in
148 	the bb instruction. Similar to Q, but 64bit handling is
149 	different.
150    Z    %r1 -- implicit target of addil instruction.
151    L    ,%r2 completer for new syntax branch
152    {    Source format completer for fcnv
153    _    Destination format completer for fcnv
154    h    cbit for fcmp
155    =    gfx tests for ftest
156    d    14bit offset for single precision FP long load/store.
157    #    14bit offset for double precision FP load long/store.
158    J    Yet another 14bit offset with an unusual encoding.
159    K    Yet another 14bit offset with an unusual encoding.
160    Y    %sr0,%r31 -- implicit target of be,l instruction.
161    @	implicit immediate value of 0
162 
163 Completer operands all have 'c' as the prefix:
164 
165    cx   indexed load completer.
166    cm   short load and store completer.
167    cq   long load and store completer (like cm, but inserted into a
168 	different location in the target instruction).
169    cs   store bytes short completer.
170    ce   long load/store completer for LDW/STW with a different encoding than the
171 	others
172    cc   load cache control hint
173    cd   load and clear cache control hint
174    cC   store cache control hint
175    co	ordered access
176 
177    cp	branch link and push completer
178    cP	branch pop completer
179    cl	branch link completer
180    cg	branch gate completer
181 
182    cw	read/write completer for PROBE
183    cW	wide completer for MFCTL
184    cL	local processor completer for cache control
185    cZ   System Control Completer (to support LPA, LHA, etc.)
186 
187    ci	correction completer for DCOR
188    ca	add completer
189    cy	32 bit add carry completer
190    cY	64 bit add carry completer
191    cv	signed overflow trap completer
192    ct	trap on condition completer for ADDI, SUB
193    cT	trap on condition completer for UADDCM
194    cb	32 bit borrow completer for SUB
195    cB	64 bit borrow completer for SUB
196 
197    ch	left/right half completer
198    cH	signed/unsigned saturation completer
199    cS	signed/unsigned completer at 21
200    c*	permutation completer
201 
202 Condition operands all have '?' as the prefix:
203 
204    ?f   Floating point compare conditions (encoded as 5 bits at 31)
205 
206    ?a	add conditions
207    ?A	64 bit add conditions
208    ?@   add branch conditions followed by nullify
209    ?d	non-negated add branch conditions
210    ?D	negated add branch conditions
211    ?w	wide mode non-negated add branch conditions
212    ?W	wide mode negated add branch conditions
213 
214    ?s   compare/subtract conditions
215    ?S	64 bit compare/subtract conditions
216    ?t   non-negated compare and branch conditions
217    ?n   32 bit compare and branch conditions followed by nullify
218    ?N   64 bit compare and branch conditions followed by nullify
219    ?Q	64 bit compare and branch conditions for CMPIB instruction
220 
221    ?l   logical conditions
222    ?L	64 bit logical conditions
223 
224    ?b   branch on bit conditions
225    ?B	64 bit branch on bit conditions
226 
227    ?x   shift/extract/deposit conditions
228    ?X	64 bit shift/extract/deposit conditions
229    ?y   shift/extract/deposit conditions followed by nullify for conditional
230         branches
231 
232    ?u   unit conditions
233    ?U   64 bit unit conditions
234 
235 Floating point registers all have 'f' as a prefix:
236 
237    ft	target register at 31
238    fT	target register with L/R halves at 31
239    fa	operand 1 register at 10
240    fA   operand 1 register with L/R halves at 10
241    fX   Same as fA, except prints a space before register during disasm
242    fb	operand 2 register at 15
243    fB   operand 2 register with L/R halves at 15
244    fC   operand 3 register with L/R halves at 16:18,21:23
245    fe   Like fT, but encoding is different.
246 
247 Float registers for fmpyadd and fmpysub:
248 
249    fi	mult operand 1 register at 10
250    fj	mult operand 2 register at 15
251    fk	mult target register at 20
252    fl	add/sub operand register at 25
253    fm	add/sub target register at 31
254 
255 */
256 
257 
258 /* List of characters not to put a space after.  Note that
259    "," is included, as the "spopN" operations use literal
260    commas in their completer sections. */
261 static const char *const completer_chars = ",CcY<>?!@+&U~FfGHINnOoZMadu|/=0123%e$m}";
262 
263 /* The order of the opcodes in this table is significant:
264 
265    * The assembler requires that all instances of the same mnemonic must be
266    consecutive.  If they aren't, the assembler will bomb at runtime.
267 
268    * The disassembler should not care about the order of the opcodes.  */
269 
270 static const struct pa_opcode pa_opcodes[] =
271 {
272 
273 /* pseudo-instructions */
274 
275 { "ldi",	0x34000000, 0xffe0c000, "j,x", pa10, 0},/* ldo val(r0),r */
276 
277 { "call",	0xe800f000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT},
278 { "call",	0xe800a000, 0xffe0e000, "nW", pa10, FLAG_STRICT},
279 { "ret",	0xe840d000, 0xfffffffd, "n", pa20, FLAG_STRICT},
280 
281 { "cmpib", 	0xec000000, 0xfc000000, "?Qn5,b,w", pa20, FLAG_STRICT},
282 { "cmpib", 	0x84000000, 0xf4000000, "?nn5,b,w", pa10, FLAG_STRICT},
283 { "comib", 	0x84000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/
284 /* This entry is for the disassembler only.  It will never be used by
285    assembler.  */
286 { "comib", 	0x8c000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/
287 { "cmpb",	0x9c000000, 0xdc000000, "?Nnx,b,w", pa20, FLAG_STRICT},
288 { "cmpb",	0x80000000, 0xf4000000, "?nnx,b,w", pa10, FLAG_STRICT},
289 { "comb",	0x80000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */
290 /* This entry is for the disassembler only.  It will never be used by
291    assembler.  */
292 { "comb",	0x88000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */
293 { "addb",	0xa0000000, 0xf4000000, "?Wnx,b,w", pa20, FLAG_STRICT},
294 { "addb",	0xa0000000, 0xfc000000, "?@nx,b,w", pa10, 0}, /* addb{tf} */
295 /* This entry is for the disassembler only.  It will never be used by
296    assembler.  */
297 { "addb",	0xa8000000, 0xfc000000, "?@nx,b,w", pa10, 0},
298 { "addib",	0xa4000000, 0xf4000000, "?Wn5,b,w", pa20, FLAG_STRICT},
299 { "addib",	0xa4000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/
300 /* This entry is for the disassembler only.  It will never be used by
301    assembler.  */
302 { "addib",	0xac000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/
303 { "nop",        0x08000240, 0xffffffff, "", pa10, 0},      /* or 0,0,0 */
304 { "copy",       0x08000240, 0xffe0ffe0, "x,t", pa10, 0},   /* or r,0,t */
305 { "mtsar",      0x01601840, 0xffe0ffff, "x", pa10, 0}, /* mtctl r,cr11 */
306 
307 /* Loads and Stores for integer registers.  */
308 
309 { "ldd",	0x0c0010e0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
310 { "ldd",	0x0c0010e0, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
311 { "ldd",        0x0c0000c0, 0xfc0013c0, "cxccx(s,b),t", pa20, FLAG_STRICT},
312 { "ldd",        0x0c0000c0, 0xfc0013c0, "cxccx(b),t", pa20, FLAG_STRICT},
313 { "ldd",	0x0c0010c0, 0xfc0013c0, "cmcc5(s,b),t", pa20, FLAG_STRICT},
314 { "ldd",	0x0c0010c0, 0xfc0013c0, "cmcc5(b),t", pa20, FLAG_STRICT},
315 { "ldd",        0x50000000, 0xfc000002, "cq#(s,b),x", pa20, FLAG_STRICT},
316 { "ldd",        0x50000000, 0xfc000002, "cq#(b),x", pa20, FLAG_STRICT},
317 { "ldw",        0x0c000080, 0xfc0013c0, "cxccx(s,b),t", pa10, FLAG_STRICT},
318 { "ldw",        0x0c000080, 0xfc0013c0, "cxccx(b),t", pa10, FLAG_STRICT},
319 { "ldw",	0x0c0010a0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
320 { "ldw",	0x0c0010a0, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
321 { "ldw",	0x0c001080, 0xfc0013c0, "cmcc5(s,b),t", pa10, FLAG_STRICT},
322 { "ldw",	0x0c001080, 0xfc0013c0, "cmcc5(b),t", pa10, FLAG_STRICT},
323 { "ldw",        0x4c000000, 0xfc000000, "ceJ(s,b),x", pa10, FLAG_STRICT},
324 { "ldw",        0x4c000000, 0xfc000000, "ceJ(b),x", pa10, FLAG_STRICT},
325 { "ldw",        0x5c000004, 0xfc000006, "ceK(s,b),x", pa20, FLAG_STRICT},
326 { "ldw",        0x5c000004, 0xfc000006, "ceK(b),x", pa20, FLAG_STRICT},
327 { "ldw",        0x48000000, 0xfc000000, "j(s,b),x", pa10, 0},
328 { "ldw",        0x48000000, 0xfc000000, "j(s,b),x", pa10, 0},
329 { "ldw",        0x48000000, 0xfc000000, "j(b),x", pa10, 0},
330 { "ldh",        0x0c000040, 0xfc0013c0, "cxccx(s,b),t", pa10, FLAG_STRICT},
331 { "ldh",        0x0c000040, 0xfc0013c0, "cxccx(b),t", pa10, FLAG_STRICT},
332 { "ldh",	0x0c001060, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
333 { "ldh",	0x0c001060, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
334 { "ldh",	0x0c001040, 0xfc0013c0, "cmcc5(s,b),t", pa10, FLAG_STRICT},
335 { "ldh",	0x0c001040, 0xfc0013c0, "cmcc5(b),t", pa10, FLAG_STRICT},
336 { "ldh",        0x44000000, 0xfc000000, "j(s,b),x", pa10, 0},
337 { "ldh",        0x44000000, 0xfc000000, "j(b),x", pa10, 0},
338 { "ldb",        0x0c000000, 0xfc0013c0, "cxccx(s,b),t", pa10, FLAG_STRICT},
339 { "ldb",        0x0c000000, 0xfc0013c0, "cxccx(b),t", pa10, FLAG_STRICT},
340 { "ldb",	0x0c001020, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
341 { "ldb",	0x0c001020, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
342 { "ldb",	0x0c001000, 0xfc0013c0, "cmcc5(s,b),t", pa10, FLAG_STRICT},
343 { "ldb",	0x0c001000, 0xfc0013c0, "cmcc5(b),t", pa10, FLAG_STRICT},
344 { "ldb",        0x40000000, 0xfc000000, "j(s,b),x", pa10, 0},
345 { "ldb",        0x40000000, 0xfc000000, "j(b),x", pa10, 0},
346 { "std",	0x0c0012e0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
347 { "std",	0x0c0012e0, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
348 { "std",	0x0c0012c0, 0xfc0013c0, "cmcCx,V(s,b)", pa20, FLAG_STRICT},
349 { "std",	0x0c0012c0, 0xfc0013c0, "cmcCx,V(b)", pa20, FLAG_STRICT},
350 { "std",        0x70000000, 0xfc000002, "cqx,#(s,b)", pa20, FLAG_STRICT},
351 { "std",        0x70000000, 0xfc000002, "cqx,#(b)", pa20, FLAG_STRICT},
352 { "stw",	0x0c0012a0, 0xfc0013ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
353 { "stw",	0x0c0012a0, 0xfc0013ff, "cocCx,@(b)", pa20, FLAG_STRICT},
354 { "stw",	0x0c001280, 0xfc0013c0, "cmcCx,V(s,b)", pa10, FLAG_STRICT},
355 { "stw",	0x0c001280, 0xfc0013c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
356 { "stw",        0x6c000000, 0xfc000000, "cex,J(s,b)", pa10, FLAG_STRICT},
357 { "stw",        0x6c000000, 0xfc000000, "cex,J(b)", pa10, FLAG_STRICT},
358 { "stw",        0x7c000004, 0xfc000006, "cex,K(s,b)", pa20, FLAG_STRICT},
359 { "stw",        0x7c000004, 0xfc000006, "cex,K(b)", pa20, FLAG_STRICT},
360 { "stw",        0x68000000, 0xfc000000, "x,j(s,b)", pa10, 0},
361 { "stw",        0x68000000, 0xfc000000, "x,j(b)", pa10, 0},
362 { "sth",	0x0c001260, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
363 { "sth",	0x0c001260, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
364 { "sth",	0x0c001240, 0xfc0013c0, "cmcCx,V(s,b)", pa10, FLAG_STRICT},
365 { "sth",	0x0c001240, 0xfc0013c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
366 { "sth",        0x64000000, 0xfc000000, "x,j(s,b)", pa10, 0},
367 { "sth",        0x64000000, 0xfc000000, "x,j(b)", pa10, 0},
368 { "stb",	0x0c001220, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
369 { "stb",	0x0c001220, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
370 { "stb",	0x0c001200, 0xfc0013c0, "cmcCx,V(s,b)", pa10, FLAG_STRICT},
371 { "stb",	0x0c001200, 0xfc0013c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
372 { "stb",        0x60000000, 0xfc000000, "x,j(s,b)", pa10, 0},
373 { "stb",        0x60000000, 0xfc000000, "x,j(b)", pa10, 0},
374 { "ldwm",       0x4c000000, 0xfc000000, "j(s,b),x", pa10, 0},
375 { "ldwm",       0x4c000000, 0xfc000000, "j(b),x", pa10, 0},
376 { "stwm",       0x6c000000, 0xfc000000, "x,j(s,b)", pa10, 0},
377 { "stwm",       0x6c000000, 0xfc000000, "x,j(b)", pa10, 0},
378 { "ldwx",       0x0c000080, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
379 { "ldwx",       0x0c000080, 0xfc001fc0, "cxx(b),t", pa10, 0},
380 { "ldhx",       0x0c000040, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
381 { "ldhx",       0x0c000040, 0xfc001fc0, "cxx(b),t", pa10, 0},
382 { "ldbx",       0x0c000000, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
383 { "ldbx",       0x0c000000, 0xfc001fc0, "cxx(b),t", pa10, 0},
384 { "ldwa",       0x0c000180, 0xfc00d3c0, "cxccx(b),t", pa10, FLAG_STRICT},
385 { "ldwa",	0x0c001180, 0xfc00d3c0, "cmcc5(b),t", pa10, FLAG_STRICT},
386 { "ldcw",       0x0c0001c0, 0xfc0013c0, "cxcdx(s,b),t", pa10, FLAG_STRICT},
387 { "ldcw",       0x0c0001c0, 0xfc0013c0, "cxcdx(b),t", pa10, FLAG_STRICT},
388 { "ldcw",	0x0c0011c0, 0xfc0013c0, "cmcd5(s,b),t", pa10, FLAG_STRICT},
389 { "ldcw",	0x0c0011c0, 0xfc0013c0, "cmcd5(b),t", pa10, FLAG_STRICT},
390 { "stwa",	0x0c0013a0, 0xfc00d3ff, "cocCx,@(b)", pa20, FLAG_STRICT},
391 { "stwa",	0x0c001380, 0xfc00d3c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
392 { "stby",	0x0c001300, 0xfc0013c0, "cscCx,V(s,b)", pa10, FLAG_STRICT},
393 { "stby",	0x0c001300, 0xfc0013c0, "cscCx,V(b)", pa10, FLAG_STRICT},
394 { "ldda",       0x0c000100, 0xfc00d3c0, "cxccx(b),t", pa20, FLAG_STRICT},
395 { "ldda",	0x0c001100, 0xfc00d3c0, "cmcc5(b),t", pa20, FLAG_STRICT},
396 { "ldcd",       0x0c000140, 0xfc0013c0, "cxcdx(s,b),t", pa20, FLAG_STRICT},
397 { "ldcd",       0x0c000140, 0xfc0013c0, "cxcdx(b),t", pa20, FLAG_STRICT},
398 { "ldcd",	0x0c001140, 0xfc0013c0, "cmcd5(s,b),t", pa20, FLAG_STRICT},
399 { "ldcd",	0x0c001140, 0xfc0013c0, "cmcd5(b),t", pa20, FLAG_STRICT},
400 { "stda",	0x0c0013e0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
401 { "stda",	0x0c0013e0, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
402 { "stda",	0x0c0013c0, 0xfc0013c0, "cmcCx,V(s,b)", pa20, FLAG_STRICT},
403 { "stda",	0x0c0013c0, 0xfc0013c0, "cmcCx,V(b)", pa20, FLAG_STRICT},
404 { "ldwax",      0x0c000180, 0xfc00dfc0, "cxx(b),t", pa10, 0},
405 { "ldcwx",      0x0c0001c0, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
406 { "ldcwx",      0x0c0001c0, 0xfc001fc0, "cxx(b),t", pa10, 0},
407 { "ldws",	0x0c001080, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
408 { "ldws",	0x0c001080, 0xfc001fc0, "cm5(b),t", pa10, 0},
409 { "ldhs",	0x0c001040, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
410 { "ldhs",	0x0c001040, 0xfc001fc0, "cm5(b),t", pa10, 0},
411 { "ldbs",	0x0c001000, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
412 { "ldbs",	0x0c001000, 0xfc001fc0, "cm5(b),t", pa10, 0},
413 { "ldwas",	0x0c001180, 0xfc00dfc0, "cm5(b),t", pa10, 0},
414 { "ldcws",	0x0c0011c0, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
415 { "ldcws",	0x0c0011c0, 0xfc001fc0, "cm5(b),t", pa10, 0},
416 { "stws",	0x0c001280, 0xfc001fc0, "cmx,V(s,b)", pa10, 0},
417 { "stws",	0x0c001280, 0xfc001fc0, "cmx,V(b)", pa10, 0},
418 { "sths",	0x0c001240, 0xfc001fc0, "cmx,V(s,b)", pa10, 0},
419 { "sths",	0x0c001240, 0xfc001fc0, "cmx,V(b)", pa10, 0},
420 { "stbs",	0x0c001200, 0xfc001fc0, "cmx,V(s,b)", pa10, 0},
421 { "stbs",	0x0c001200, 0xfc001fc0, "cmx,V(b)", pa10, 0},
422 { "stwas",	0x0c001380, 0xfc00dfc0, "cmx,V(b)", pa10, 0},
423 { "stdby",	0x0c001340, 0xfc0013c0, "cscCx,V(s,b)", pa20, FLAG_STRICT},
424 { "stdby",	0x0c001340, 0xfc0013c0, "cscCx,V(b)", pa20, FLAG_STRICT},
425 { "stbys",	0x0c001300, 0xfc001fc0, "csx,V(s,b)", pa10, 0},
426 { "stbys",	0x0c001300, 0xfc001fc0, "csx,V(b)", pa10, 0},
427 
428 /* Immediate instructions.  */
429 { "ldo",	0x34000000, 0xfc00c000, "j(b),x", pa10, 0},
430 { "ldil",	0x20000000, 0xfc000000, "k,b", pa10, 0},
431 { "addil",	0x28000000, 0xfc000000, "k,b,Z", pa10, 0},
432 { "addil",	0x28000000, 0xfc000000, "k,b", pa10, 0},
433 
434 /* Branching instructions. */
435 { "b",		0xe8008000, 0xfc00e000, "cpnXL", pa20, FLAG_STRICT},
436 { "b",		0xe800a000, 0xfc00e000, "clnXL", pa20, FLAG_STRICT},
437 { "b",		0xe8000000, 0xfc00e000, "clnW,b", pa10, FLAG_STRICT},
438 { "b",		0xe8002000, 0xfc00e000, "cgnW,b", pa10, FLAG_STRICT},
439 { "b",		0xe8000000, 0xffe0e000, "nW", pa10, 0},  /* b,l foo,r0 */
440 { "bl",		0xe8000000, 0xfc00e000, "nW,b", pa10, 0},
441 { "gate",	0xe8002000, 0xfc00e000, "nW,b", pa10, 0},
442 { "blr",	0xe8004000, 0xfc00e001, "nx,b", pa10, 0},
443 { "bv",		0xe800c000, 0xfc00fffd, "nx(b)", pa10, 0},
444 { "bv",		0xe800c000, 0xfc00fffd, "n(b)", pa10, 0},
445 { "bve",	0xe800f001, 0xfc1ffffd, "cpn(b)L", pa20, FLAG_STRICT},
446 { "bve",	0xe800f000, 0xfc1ffffd, "cln(b)L", pa20, FLAG_STRICT},
447 { "bve",	0xe800d001, 0xfc1ffffd, "cPn(b)", pa20, FLAG_STRICT},
448 { "bve",	0xe800d000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT},
449 { "be",		0xe4000000, 0xfc000000, "clnz(S,b),Y", pa10, FLAG_STRICT},
450 { "be",		0xe4000000, 0xfc000000, "clnz(b),Y", pa10, FLAG_STRICT},
451 { "be",		0xe0000000, 0xfc000000, "nz(S,b)", pa10, 0},
452 { "be",		0xe0000000, 0xfc000000, "nz(b)", pa10, 0},
453 { "ble",	0xe4000000, 0xfc000000, "nz(S,b)", pa10, 0},
454 { "movb",	0xc8000000, 0xfc000000, "?ynx,b,w", pa10, 0},
455 { "movib",	0xcc000000, 0xfc000000, "?yn5,b,w", pa10, 0},
456 { "combt",	0x80000000, 0xfc000000, "?tnx,b,w", pa10, 0},
457 { "combf",	0x88000000, 0xfc000000, "?tnx,b,w", pa10, 0},
458 { "comibt",	0x84000000, 0xfc000000, "?tn5,b,w", pa10, 0},
459 { "comibf",	0x8c000000, 0xfc000000, "?tn5,b,w", pa10, 0},
460 { "addbt",	0xa0000000, 0xfc000000, "?dnx,b,w", pa10, 0},
461 { "addbf",	0xa8000000, 0xfc000000, "?dnx,b,w", pa10, 0},
462 { "addibt",	0xa4000000, 0xfc000000, "?dn5,b,w", pa10, 0},
463 { "addibf",	0xac000000, 0xfc000000, "?dn5,b,w", pa10, 0},
464 { "bb",		0xc0006000, 0xffe06000, "?Bnx,!,w", pa20, FLAG_STRICT},
465 { "bb",		0xc4004000, 0xfc004000, "?Bnx,B,w", pa20, FLAG_STRICT},
466 { "bb",		0xc0004000, 0xffe06000, "?bnx,!,w", pa10, FLAG_STRICT},
467 { "bb",		0xc4004000, 0xfc004000, "?bnx,Q,w", pa10, 0},
468 { "bvb",	0xc0004000, 0xffe04000, "?bnx,w", pa10, 0},
469 { "clrbts",	0xe8004005, 0xffffffff, "", pa20, FLAG_STRICT},
470 { "popbts",	0xe8004005, 0xfffff007, "$", pa20, FLAG_STRICT},
471 { "pushnom",	0xe8004001, 0xffffffff, "", pa20, FLAG_STRICT},
472 { "pushbts",	0xe8004001, 0xffe0ffff, "x", pa20, FLAG_STRICT},
473 
474 /* Computation Instructions */
475 
476 { "cmpclr",     0x080008a0, 0xfc000fe0, "?Sx,b,t", pa20, FLAG_STRICT},
477 { "cmpclr",     0x08000880, 0xfc000fe0, "?sx,b,t", pa10, FLAG_STRICT},
478 { "comclr",     0x08000880, 0xfc000fe0, "?sx,b,t", pa10, 0},
479 { "or",         0x08000260, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
480 { "or",         0x08000240, 0xfc000fe0, "?lx,b,t", pa10, 0},
481 { "xor",        0x080002a0, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
482 { "xor",        0x08000280, 0xfc000fe0, "?lx,b,t", pa10, 0},
483 { "and",        0x08000220, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
484 { "and",        0x08000200, 0xfc000fe0, "?lx,b,t", pa10, 0},
485 { "andcm",      0x08000020, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
486 { "andcm",      0x08000000, 0xfc000fe0, "?lx,b,t", pa10, 0},
487 { "uxor",       0x080003a0, 0xfc000fe0, "?Ux,b,t", pa20, FLAG_STRICT},
488 { "uxor",       0x08000380, 0xfc000fe0, "?ux,b,t", pa10, 0},
489 { "uaddcm",     0x080009a0, 0xfc000fa0, "cT?Ux,b,t", pa20, FLAG_STRICT},
490 { "uaddcm",     0x08000980, 0xfc000fa0, "cT?ux,b,t", pa10, FLAG_STRICT},
491 { "uaddcm",     0x08000980, 0xfc000fe0, "?ux,b,t", pa10, 0},
492 { "uaddcmt",    0x080009c0, 0xfc000fe0, "?ux,b,t", pa10, 0},
493 { "dcor",       0x08000ba0, 0xfc1f0fa0, "ci?Ub,t", pa20, FLAG_STRICT},
494 { "dcor",       0x08000b80, 0xfc1f0fa0, "ci?ub,t", pa10, FLAG_STRICT},
495 { "dcor",       0x08000b80, 0xfc1f0fe0, "?ub,t",   pa10, 0},
496 { "idcor",      0x08000bc0, 0xfc1f0fe0, "?ub,t",   pa10, 0},
497 { "addi",       0xb0000000, 0xfc000000, "ct?ai,b,x", pa10, FLAG_STRICT},
498 { "addi",       0xb4000000, 0xfc000000, "cv?ai,b,x", pa10, FLAG_STRICT},
499 { "addi",       0xb4000000, 0xfc000800, "?ai,b,x", pa10, 0},
500 { "addio",      0xb4000800, 0xfc000800, "?ai,b,x", pa10, 0},
501 { "addit",      0xb0000000, 0xfc000800, "?ai,b,x", pa10, 0},
502 { "addito",     0xb0000800, 0xfc000800, "?ai,b,x", pa10, 0},
503 { "add",        0x08000720, 0xfc0007e0, "cY?Ax,b,t", pa20, FLAG_STRICT},
504 { "add",        0x08000700, 0xfc0007e0, "cy?ax,b,t", pa10, FLAG_STRICT},
505 { "add",        0x08000220, 0xfc0003e0, "ca?Ax,b,t", pa20, FLAG_STRICT},
506 { "add",        0x08000200, 0xfc0003e0, "ca?ax,b,t", pa10, FLAG_STRICT},
507 { "add",        0x08000600, 0xfc000fe0, "?ax,b,t", pa10, 0},
508 { "addl",       0x08000a00, 0xfc000fe0, "?ax,b,t", pa10, 0},
509 { "addo",       0x08000e00, 0xfc000fe0, "?ax,b,t", pa10, 0},
510 { "addc",       0x08000700, 0xfc000fe0, "?ax,b,t", pa10, 0},
511 { "addco",      0x08000f00, 0xfc000fe0, "?ax,b,t", pa10, 0},
512 { "sub",        0x080004e0, 0xfc0007e0, "ct?Sx,b,t", pa20, FLAG_STRICT},
513 { "sub",        0x080004c0, 0xfc0007e0, "ct?sx,b,t", pa10, FLAG_STRICT},
514 { "sub",        0x08000520, 0xfc0007e0, "cB?Sx,b,t", pa20, FLAG_STRICT},
515 { "sub",        0x08000500, 0xfc0007e0, "cb?sx,b,t", pa10, FLAG_STRICT},
516 { "sub",        0x08000420, 0xfc0007e0, "cv?Sx,b,t", pa20, FLAG_STRICT},
517 { "sub",        0x08000400, 0xfc0007e0, "cv?sx,b,t", pa10, FLAG_STRICT},
518 { "sub",        0x08000400, 0xfc000fe0, "?sx,b,t", pa10, 0},
519 { "subo",       0x08000c00, 0xfc000fe0, "?sx,b,t", pa10, 0},
520 { "subb",       0x08000500, 0xfc000fe0, "?sx,b,t", pa10, 0},
521 { "subbo",      0x08000d00, 0xfc000fe0, "?sx,b,t", pa10, 0},
522 { "subt",       0x080004c0, 0xfc000fe0, "?sx,b,t", pa10, 0},
523 { "subto",      0x08000cc0, 0xfc000fe0, "?sx,b,t", pa10, 0},
524 { "ds",         0x08000440, 0xfc000fe0, "?sx,b,t", pa10, 0},
525 { "subi",       0x94000000, 0xfc000000, "cv?si,b,x", pa10, FLAG_STRICT},
526 { "subi",       0x94000000, 0xfc000800, "?si,b,x", pa10, 0},
527 { "subio",      0x94000800, 0xfc000800, "?si,b,x", pa10, 0},
528 { "cmpiclr",    0x90000800, 0xfc000800, "?Si,b,x", pa20, FLAG_STRICT},
529 { "cmpiclr",    0x90000000, 0xfc000800, "?si,b,x", pa10, FLAG_STRICT},
530 { "comiclr",    0x90000000, 0xfc000800, "?si,b,x", pa10, 0},
531 { "shladd",     0x08000220, 0xfc000320, "ca?Ax,.,b,t", pa20, FLAG_STRICT},
532 { "shladd",     0x08000200, 0xfc000320, "ca?ax,.,b,t", pa10, FLAG_STRICT},
533 { "sh1add",     0x08000640, 0xfc000fe0, "?ax,b,t", pa10, 0},
534 { "sh1addl",    0x08000a40, 0xfc000fe0, "?ax,b,t", pa10, 0},
535 { "sh1addo",    0x08000e40, 0xfc000fe0, "?ax,b,t", pa10, 0},
536 { "sh2add",     0x08000680, 0xfc000fe0, "?ax,b,t", pa10, 0},
537 { "sh2addl",    0x08000a80, 0xfc000fe0, "?ax,b,t", pa10, 0},
538 { "sh2addo",    0x08000e80, 0xfc000fe0, "?ax,b,t", pa10, 0},
539 { "sh3add",     0x080006c0, 0xfc000fe0, "?ax,b,t", pa10, 0},
540 { "sh3addl",    0x08000ac0, 0xfc000fe0, "?ax,b,t", pa10, 0},
541 { "sh3addo",    0x08000ec0, 0xfc000fe0, "?ax,b,t", pa10, 0},
542 
543 /* Subword Operation Instructions */
544 
545 { "hadd",       0x08000300, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT},
546 { "havg",       0x080002c0, 0xfc00ffe0, "x,b,t", pa20, FLAG_STRICT},
547 { "hshl",       0xf8008800, 0xffe0fc20, "x,*,t", pa20, FLAG_STRICT},
548 { "hshladd",    0x08000700, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT},
549 { "hshr",       0xf800c800, 0xfc1ff820, "cSb,*,t", pa20, FLAG_STRICT},
550 { "hshradd",    0x08000500, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT},
551 { "hsub",       0x08000100, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT},
552 { "mixh",       0xf8008400, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT},
553 { "mixw",       0xf8008000, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT},
554 { "permh",      0xf8000000, 0xfc009020, "c*a,t", pa20, FLAG_STRICT},
555 
556 
557 /* Extract and Deposit Instructions */
558 
559 { "shrpd",      0xd0000200, 0xfc001fe0, "?Xx,b,!,t", pa20, FLAG_STRICT},
560 { "shrpd",      0xd0000400, 0xfc001400, "?Xx,b,~,t", pa20, FLAG_STRICT},
561 { "shrpw",      0xd0000000, 0xfc001fe0, "?xx,b,!,t", pa10, FLAG_STRICT},
562 { "shrpw",      0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, FLAG_STRICT},
563 { "vshd",       0xd0000000, 0xfc001fe0, "?xx,b,t", pa10, 0},
564 { "shd",        0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, 0},
565 { "extrd",      0xd0001200, 0xfc001ae0, "cS?Xb,!,%,x", pa20, FLAG_STRICT},
566 { "extrd",      0xd8000000, 0xfc000000, "cS?Xb,q,|,x", pa20, FLAG_STRICT},
567 { "extrw",      0xd0001000, 0xfc001be0, "cS?xb,!,T,x", pa10, FLAG_STRICT},
568 { "extrw",      0xd0001800, 0xfc001800, "cS?xb,P,T,x", pa10, FLAG_STRICT},
569 { "vextru",     0xd0001000, 0xfc001fe0, "?xb,T,x", pa10, 0},
570 { "vextrs",     0xd0001400, 0xfc001fe0, "?xb,T,x", pa10, 0},
571 { "extru",      0xd0001800, 0xfc001c00, "?xb,P,T,x", pa10, 0},
572 { "extrs",      0xd0001c00, 0xfc001c00, "?xb,P,T,x", pa10, 0},
573 { "depd",       0xd4000200, 0xfc001ae0, "cz?Xx,!,%,b", pa20, FLAG_STRICT},
574 { "depd",       0xf0000000, 0xfc000000, "cz?Xx,~,|,b", pa20, FLAG_STRICT},
575 { "depdi",      0xd4001200, 0xfc001ae0, "cz?X5,!,%,b", pa20, FLAG_STRICT},
576 { "depdi",      0xf4000000, 0xfc000000, "cz?X5,~,|,b", pa20, FLAG_STRICT},
577 { "depw",       0xd4000000, 0xfc001be0, "cz?xx,!,T,b", pa10, FLAG_STRICT},
578 { "depw",       0xd4000800, 0xfc001800, "cz?xx,p,T,b", pa10, FLAG_STRICT},
579 { "depwi",      0xd4001000, 0xfc001be0, "cz?x5,!,T,b", pa10, FLAG_STRICT},
580 { "depwi",      0xd4001800, 0xfc001800, "cz?x5,p,T,b", pa10, FLAG_STRICT},
581 { "zvdep",      0xd4000000, 0xfc001fe0, "?xx,T,b", pa10, 0},
582 { "vdep",       0xd4000400, 0xfc001fe0, "?xx,T,b", pa10, 0},
583 { "zdep",       0xd4000800, 0xfc001c00, "?xx,p,T,b", pa10, 0},
584 { "dep",        0xd4000c00, 0xfc001c00, "?xx,p,T,b", pa10, 0},
585 { "zvdepi",     0xd4001000, 0xfc001fe0, "?x5,T,b", pa10, 0},
586 { "vdepi",      0xd4001400, 0xfc001fe0, "?x5,T,b", pa10, 0},
587 { "zdepi",      0xd4001800, 0xfc001c00, "?x5,p,T,b", pa10, 0},
588 { "depi",       0xd4001c00, 0xfc001c00, "?x5,p,T,b", pa10, 0},
589 
590 /* System Control Instructions */
591 
592 { "break",      0x00000000, 0xfc001fe0, "r,A", pa10, 0},
593 { "rfi",        0x00000c00, 0xffffff1f, "cr", pa10, FLAG_STRICT},
594 { "rfi",        0x00000c00, 0xffffffff, "", pa10, 0},
595 { "rfir",       0x00000ca0, 0xffffffff, "", pa11, 0},
596 { "ssm",        0x00000d60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT},
597 { "ssm",        0x00000d60, 0xffe0ffe0, "R,t", pa10, 0},
598 { "rsm",        0x00000e60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT},
599 { "rsm",        0x00000e60, 0xffe0ffe0, "R,t", pa10, 0},
600 { "mtsm",       0x00001860, 0xffe0ffff, "x", pa10, 0},
601 { "ldsid",      0x000010a0, 0xfc1f3fe0, "(s,b),t", pa10, 0},
602 { "ldsid",      0x000010a0, 0xfc1f3fe0, "(b),t", pa10, 0},
603 { "mtsp",       0x00001820, 0xffe01fff, "x,S", pa10, 0},
604 { "mtctl",      0x00001840, 0xfc00ffff, "x,^", pa10, 0},
605 { "mtsarcm",    0x016018C0, 0xffe0ffff, "x", pa20, FLAG_STRICT},
606 { "mfia",       0x000014A0, 0xffffffe0, "t", pa20, FLAG_STRICT},
607 { "mfsp",       0x000004a0, 0xffff1fe0, "S,t", pa10, 0},
608 { "mfctl",      0x016048a0, 0xffffffe0, "cW!,t", pa20, FLAG_STRICT},
609 { "mfctl",      0x000008a0, 0xfc1fffe0, "^,t", pa10, 0},
610 { "sync",       0x00000400, 0xffffffff, "", pa10, 0},
611 { "syncdma",    0x00100400, 0xffffffff, "", pa10, 0},
612 { "probe",      0x04001180, 0xfc003fa0, "cw(s,b),x,t", pa10, FLAG_STRICT},
613 { "probe",      0x04001180, 0xfc003fa0, "cw(b),x,t", pa10, FLAG_STRICT},
614 { "probei",     0x04003180, 0xfc003fa0, "cw(s,b),R,t", pa10, FLAG_STRICT},
615 { "probei",     0x04003180, 0xfc003fa0, "cw(b),R,t", pa10, FLAG_STRICT},
616 { "prober",     0x04001180, 0xfc003fe0, "(s,b),x,t", pa10, 0},
617 { "prober",     0x04001180, 0xfc003fe0, "(b),x,t", pa10, 0},
618 { "proberi",    0x04003180, 0xfc003fe0, "(s,b),R,t", pa10, 0},
619 { "proberi",    0x04003180, 0xfc003fe0, "(b),R,t", pa10, 0},
620 { "probew",     0x040011c0, 0xfc003fe0, "(s,b),x,t", pa10, 0},
621 { "probew",     0x040011c0, 0xfc003fe0, "(b),x,t", pa10, 0},
622 { "probewi",    0x040031c0, 0xfc003fe0, "(s,b),R,t", pa10, 0},
623 { "probewi",    0x040031c0, 0xfc003fe0, "(b),R,t", pa10, 0},
624 { "lpa",        0x04001340, 0xfc003fc0, "cZx(s,b),t", pa10, 0},
625 { "lpa",        0x04001340, 0xfc003fc0, "cZx(b),t", pa10, 0},
626 { "lha",        0x04001300, 0xfc003fc0, "cZx(s,b),t", pa10, 0},
627 { "lha",        0x04001300, 0xfc003fc0, "cZx(b),t", pa10, 0},
628 { "lci",        0x04001300, 0xfc003fe0, "x(s,b),t", pa10, 0},
629 { "lci",        0x04001300, 0xfc003fe0, "x(b),t", pa10, 0},
630 { "pdtlb",      0x04001600, 0xfc003fdf, "cLcZx(s,b)", pa20, FLAG_STRICT},
631 { "pdtlb",      0x04001600, 0xfc003fdf, "cLcZx(b)", pa20, FLAG_STRICT},
632 { "pdtlb",      0x04001200, 0xfc003fdf, "cZx(s,b)", pa10, 0},
633 { "pdtlb",      0x04001200, 0xfc003fdf, "cZx(b)", pa10, 0},
634 { "pitlb",      0x04000600, 0xfc001fdf, "cLcZx(S,b)", pa20, FLAG_STRICT},
635 { "pitlb",      0x04000600, 0xfc001fdf, "cLcZx(b)", pa20, FLAG_STRICT},
636 { "pitlb",      0x04000200, 0xfc001fdf, "cZx(S,b)", pa10, 0},
637 { "pitlb",      0x04000200, 0xfc001fdf, "cZx(b)", pa10, 0},
638 { "pdtlbe",     0x04001240, 0xfc003fdf, "cZx(s,b)", pa10, 0},
639 { "pdtlbe",     0x04001240, 0xfc003fdf, "cZx(b)", pa10, 0},
640 { "pitlbe",     0x04000240, 0xfc001fdf, "cZx(S,b)", pa10, 0},
641 { "pitlbe",     0x04000240, 0xfc001fdf, "cZx(b)", pa10, 0},
642 { "idtlba",     0x04001040, 0xfc003fff, "x,(s,b)", pa10, 0},
643 { "idtlba",     0x04001040, 0xfc003fff, "x,(b)", pa10, 0},
644 { "iitlba",     0x04000040, 0xfc001fff, "x,(S,b)", pa10, 0},
645 { "iitlba",     0x04000040, 0xfc001fff, "x,(b)", pa10, 0},
646 { "idtlbp",     0x04001000, 0xfc003fff, "x,(s,b)", pa10, 0},
647 { "idtlbp",     0x04001000, 0xfc003fff, "x,(b)", pa10, 0},
648 { "iitlbp",     0x04000000, 0xfc001fff, "x,(S,b)", pa10, 0},
649 { "iitlbp",     0x04000000, 0xfc001fff, "x,(b)", pa10, 0},
650 { "pdc",        0x04001380, 0xfc003fdf, "cZx(s,b)", pa10, 0},
651 { "pdc",        0x04001380, 0xfc003fdf, "cZx(b)", pa10, 0},
652 { "fdc",        0x04001280, 0xfc003fdf, "cZx(s,b)", pa10, 0},
653 { "fdc",        0x04001280, 0xfc003fdf, "cZx(b)", pa10, 0},
654 { "fic",        0x04000280, 0xfc001fdf, "cZx(S,b)", pa10, 0},
655 { "fic",        0x04000280, 0xfc001fdf, "cZx(b)", pa10, 0},
656 { "fdce",       0x040012c0, 0xfc003fdf, "cZx(s,b)", pa10, 0},
657 { "fdce",       0x040012c0, 0xfc003fdf, "cZx(b)", pa10, 0},
658 { "fice",       0x040002c0, 0xfc001fdf, "cZx(S,b)", pa10, 0},
659 { "fice",       0x040002c0, 0xfc001fdf, "cZx(b)", pa10, 0},
660 { "diag",       0x14000000, 0xfc000000, "D", pa10, 0},
661 { "idtlbt",     0x04001800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT},
662 { "iitlbt",     0x04000800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT},
663 
664 /* These may be specific to certain versions of the PA.  Joel claimed
665    they were 72000 (7200?) specific.  However, I'm almost certain the
666    mtcpu/mfcpu were undocumented, but available in the older 700 machines.  */
667 { "mtcpu",      0x14001600, 0xfc00ffff, "x,^", pa10, 0},
668 { "mfcpu",      0x14001A00, 0xfc00ffff, "^,x", pa10, 0},
669 { "tocen",      0x14403600, 0xffffffff, "", pa10, 0},
670 { "tocdis",     0x14401620, 0xffffffff, "", pa10, 0},
671 { "shdwgr",     0x14402600, 0xffffffff, "", pa10, 0},
672 { "grshdw",     0x14400620, 0xffffffff, "", pa10, 0},
673 
674 /* gfw and gfr are not in the HP PA 1.1 manual, but they are in either
675    the Timex FPU or the Mustang ERS (not sure which) manual.  */
676 { "gfw",	0x04001680, 0xfc003fdf, "cZx(s,b)", pa11, 0},
677 { "gfw",	0x04001680, 0xfc003fdf, "cZx(b)", pa11, 0},
678 { "gfr",	0x04001a80, 0xfc003fdf, "cZx(s,b)", pa11, 0},
679 { "gfr",	0x04001a80, 0xfc003fdf, "cZx(b)", pa11, 0},
680 
681 /* Floating Point Coprocessor Instructions */
682 
683 { "fldw",       0x24001020, 0xfc1f33a0, "cocc@(s,b),fT", pa20, FLAG_STRICT},
684 { "fldw",       0x24001020, 0xfc1f33a0, "cocc@(b),fT", pa20, FLAG_STRICT},
685 { "fldw",       0x24000000, 0xfc001380, "cxccx(s,b),fT", pa10, FLAG_STRICT},
686 { "fldw",       0x24000000, 0xfc001380, "cxccx(b),fT", pa10, FLAG_STRICT},
687 { "fldw",       0x24001000, 0xfc001380, "cmcc5(s,b),fT", pa10, FLAG_STRICT},
688 { "fldw",       0x24001000, 0xfc001380, "cmcc5(b),fT", pa10, FLAG_STRICT},
689 { "fldw",       0x5c000000, 0xfc000004, "d(s,b),fe", pa20, FLAG_STRICT},
690 { "fldw",       0x5c000000, 0xfc000004, "d(b),fe", pa20, FLAG_STRICT},
691 { "fldw",       0x58000000, 0xfc000004, "cJd(s,b),fe", pa20, FLAG_STRICT},
692 { "fldw",       0x58000000, 0xfc000004, "cJd(b),fe", pa20, FLAG_STRICT},
693 { "fldd",       0x2c001020, 0xfc1f33e0, "cocc@(s,b),ft", pa20, FLAG_STRICT},
694 { "fldd",       0x2c001020, 0xfc1f33e0, "cocc@(b),ft", pa20, FLAG_STRICT},
695 { "fldd",       0x2c000000, 0xfc0013c0, "cxccx(s,b),ft", pa10, FLAG_STRICT},
696 { "fldd",       0x2c000000, 0xfc0013c0, "cxccx(b),ft", pa10, FLAG_STRICT},
697 { "fldd",       0x2c001000, 0xfc0013c0, "cmcc5(s,b),ft", pa10, FLAG_STRICT},
698 { "fldd",       0x2c001000, 0xfc0013c0, "cmcc5(b),ft", pa10, FLAG_STRICT},
699 { "fldd",       0x50000002, 0xfc000002, "cq#(s,b),x", pa20, FLAG_STRICT},
700 { "fldd",       0x50000002, 0xfc000002, "cq#(b),x", pa20, FLAG_STRICT},
701 { "fstw",       0x24001220, 0xfc1f33a0, "cocCfT,@(s,b)", pa10, FLAG_STRICT},
702 { "fstw",       0x24001220, 0xfc1f33a0, "cocCfT,@(b)", pa10, FLAG_STRICT},
703 { "fstw",       0x24000200, 0xfc001380, "cxcCfT,x(s,b)", pa10, FLAG_STRICT},
704 { "fstw",       0x24000200, 0xfc001380, "cxcCfT,x(b)", pa10, FLAG_STRICT},
705 { "fstw",       0x24001200, 0xfc001380, "cmcCfT,5(s,b)", pa10, FLAG_STRICT},
706 { "fstw",       0x24001200, 0xfc001380, "cmcCfT,5(b)", pa10, FLAG_STRICT},
707 { "fstw",       0x7c000000, 0xfc000004, "fe,d(s,b)", pa20, FLAG_STRICT},
708 { "fstw",       0x7c000000, 0xfc000004, "fe,d(b)", pa20, FLAG_STRICT},
709 { "fstw",       0x78000000, 0xfc000004, "cJfe,d(s,b)", pa20, FLAG_STRICT},
710 { "fstw",       0x78000000, 0xfc000004, "cJfe,d(b)", pa20, FLAG_STRICT},
711 { "fstd",       0x2c001220, 0xfc1f33e0, "cocCft,@(s,b)", pa10, FLAG_STRICT},
712 { "fstd",       0x2c001220, 0xfc1f33e0, "cocCft,@(b)", pa10, FLAG_STRICT},
713 { "fstd",       0x2c000200, 0xfc0013c0, "cxcCft,x(s,b)", pa10, FLAG_STRICT},
714 { "fstd",       0x2c000200, 0xfc0013c0, "cxcCft,x(b)", pa10, FLAG_STRICT},
715 { "fstd",       0x2c001200, 0xfc0013c0, "cmcCft,5(s,b)", pa10, FLAG_STRICT},
716 { "fstd",       0x2c001200, 0xfc0013c0, "cmcCft,5(b)", pa10, FLAG_STRICT},
717 { "fstd",       0x70000002, 0xfc000002, "cqx,#(s,b)", pa20, FLAG_STRICT},
718 { "fstd",       0x70000002, 0xfc000002, "cqx,#(b)", pa20, FLAG_STRICT},
719 { "fldwx",      0x24000000, 0xfc001f80, "cxx(s,b),fT", pa10, 0},
720 { "fldwx",      0x24000000, 0xfc001f80, "cxx(b),fT", pa10, 0},
721 { "flddx",      0x2c000000, 0xfc001fc0, "cxx(s,b),ft", pa10, 0},
722 { "flddx",      0x2c000000, 0xfc001fc0, "cxx(b),ft", pa10, 0},
723 { "fstwx",      0x24000200, 0xfc001f80, "cxfT,x(s,b)", pa10, 0},
724 { "fstwx",      0x24000200, 0xfc001f80, "cxfT,x(b)", pa10, 0},
725 { "fstdx",      0x2c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0},
726 { "fstdx",      0x2c000200, 0xfc001fc0, "cxft,x(b)", pa10, 0},
727 { "fstqx",      0x3c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0},
728 { "fstqx",      0x3c000200, 0xfc001fc0, "cxft,x(b)", pa10, 0},
729 { "fldws",      0x24001000, 0xfc001f80, "cm5(s,b),fT", pa10, 0},
730 { "fldws",      0x24001000, 0xfc001f80, "cm5(b),fT", pa10, 0},
731 { "fldds",      0x2c001000, 0xfc001fc0, "cm5(s,b),ft", pa10, 0},
732 { "fldds",      0x2c001000, 0xfc001fc0, "cm5(b),ft", pa10, 0},
733 { "fstws",      0x24001200, 0xfc001f80, "cmfT,5(s,b)", pa10, 0},
734 { "fstws",      0x24001200, 0xfc001f80, "cmfT,5(b)", pa10, 0},
735 { "fstds",      0x2c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0},
736 { "fstds",      0x2c001200, 0xfc001fc0, "cmft,5(b)", pa10, 0},
737 { "fstqs",      0x3c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0},
738 { "fstqs",      0x3c001200, 0xfc001fc0, "cmft,5(b)", pa10, 0},
739 { "fadd",       0x30000600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
740 { "fadd",       0x38000600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
741 { "fsub",       0x30002600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
742 { "fsub",       0x38002600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
743 { "fmpy",       0x30004600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
744 { "fmpy",       0x38004600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
745 { "fdiv",       0x30006600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
746 { "fdiv",       0x38006600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
747 { "fsqrt",      0x30008000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
748 { "fsqrt",      0x38008000, 0xfc1fe720, "FfA,fT", pa10, 0},
749 { "fabs",       0x30006000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
750 { "fabs",       0x38006000, 0xfc1fe720, "FfA,fT", pa10, 0},
751 { "frem",       0x30008600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
752 { "frem",       0x38008600, 0xfc00e720, "FfA,fB,fT", pa10, 0},
753 { "frnd",       0x3000a000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
754 { "frnd",       0x3800a000, 0xfc1fe720, "FfA,fT", pa10, 0},
755 { "fcpy",       0x30004000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
756 { "fcpy",       0x38004000, 0xfc1fe720, "FfA,fT", pa10, 0},
757 { "fcnvff",     0x30000200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
758 { "fcnvff",     0x38000200, 0xfc1f8720, "FGfA,fT", pa10, 0},
759 { "fcnvxf",     0x30008200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
760 { "fcnvxf",     0x38008200, 0xfc1f8720, "FGfA,fT", pa10, 0},
761 { "fcnvfx",     0x30010200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
762 { "fcnvfx",     0x38010200, 0xfc1f8720, "FGfA,fT", pa10, 0},
763 { "fcnvfxt",    0x30018200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
764 { "fcnvfxt",    0x38018200, 0xfc1f8720, "FGfA,fT", pa10, 0},
765 { "fmpyfadd",   0xb8000000, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT},
766 { "fmpynfadd",  0xb8000020, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT},
767 { "fneg",       0x3000c000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT},
768 { "fneg",       0x3800c000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT},
769 { "fnegabs",    0x3000e000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT},
770 { "fnegabs",    0x3800e000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT},
771 { "fcnv",       0x30000200, 0xfc1c0720, "{_fa,fT", pa20, FLAG_STRICT},
772 { "fcnv",       0x38000200, 0xfc1c0720, "FGfA,fT", pa20, FLAG_STRICT},
773 { "fcmp",       0x30000400, 0xfc0007e0, "F?ffa,fb,h", pa20, FLAG_STRICT},
774 { "fcmp",       0x38000400, 0xfc000720, "I?ffA,fB,h", pa20, FLAG_STRICT},
775 { "fcmp",       0x30000400, 0xfc00e7e0, "F?ffa,fb", pa10, 0},
776 { "fcmp",       0x38000400, 0xfc00e720, "I?ffA,fB", pa10, 0},
777 { "xmpyu",	0x38004700, 0xfc00e720, "fX,fB,fT", pa11, 0},
778 { "fmpyadd",	0x18000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0},
779 { "fmpysub",	0x98000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0},
780 { "ftest",      0x30002420, 0xffffffe0, ",=", pa20, FLAG_STRICT},
781 { "ftest",      0x30000420, 0xffff1fff, "m", pa20, FLAG_STRICT},
782 { "ftest",      0x30002420, 0xffffffff, "", pa10, 0},
783 { "fid",        0x30000000, 0xffffffff, "", pa11, 0},
784 
785 /* Performance Monitor Instructions */
786 
787 { "pmdis",	0x30000280, 0xffffffdf, "N", pa20, FLAG_STRICT},
788 { "pmenb",	0x30000680, 0xffffffff, "", pa20, FLAG_STRICT},
789 
790 /* Assist Instructions */
791 
792 { "spop0",      0x10000000, 0xfc000600, "v,ON", pa10, 0},
793 { "spop1",      0x10000200, 0xfc000600, "v,oNt", pa10, 0},
794 { "spop2",      0x10000400, 0xfc000600, "v,1Nb", pa10, 0},
795 { "spop3",      0x10000600, 0xfc000600, "v,0Nx,b", pa10, 0},
796 { "copr",       0x30000000, 0xfc000000, "u,2N", pa10, 0},
797 { "cldwx",      0x24000000, 0xfc001e00, "ucxx(s,b),t", pa10, 0},
798 { "cldwx",      0x24000000, 0xfc001e00, "ucxx(b),t", pa10, 0},
799 { "clddx",      0x2c000000, 0xfc001e00, "ucxx(s,b),t", pa10, 0},
800 { "clddx",      0x2c000000, 0xfc001e00, "ucxx(b),t", pa10, 0},
801 { "cstwx",      0x24000200, 0xfc001e00, "ucxt,x(s,b)", pa10, 0},
802 { "cstwx",      0x24000200, 0xfc001e00, "ucxt,x(b)", pa10, 0},
803 { "cstdx",      0x2c000200, 0xfc001e00, "ucxt,x(s,b)", pa10, 0},
804 { "cstdx",      0x2c000200, 0xfc001e00, "ucxt,x(b)", pa10, 0},
805 { "cldws",      0x24001000, 0xfc001e00, "ucm5(s,b),t", pa10, 0},
806 { "cldws",      0x24001000, 0xfc001e00, "ucm5(b),t", pa10, 0},
807 { "cldds",      0x2c001000, 0xfc001e00, "ucm5(s,b),t", pa10, 0},
808 { "cldds",      0x2c001000, 0xfc001e00, "ucm5(b),t", pa10, 0},
809 { "cstws",      0x24001200, 0xfc001e00, "ucmt,5(s,b)", pa10, 0},
810 { "cstws",      0x24001200, 0xfc001e00, "ucmt,5(b)", pa10, 0},
811 { "cstds",      0x2c001200, 0xfc001e00, "ucmt,5(s,b)", pa10, 0},
812 { "cstds",      0x2c001200, 0xfc001e00, "ucmt,5(b)", pa10, 0},
813 { "cldw",       0x24000000, 0xfc001e00, "ucxx(s,b),t", pa10, FLAG_STRICT},
814 { "cldw",       0x24000000, 0xfc001e00, "ucxx(b),t", pa10, FLAG_STRICT},
815 { "cldw",       0x24001000, 0xfc001e00, "ucm5(s,b),t", pa10, FLAG_STRICT},
816 { "cldw",       0x24001000, 0xfc001e00, "ucm5(b),t", pa10, FLAG_STRICT},
817 { "cldd",       0x2c000000, 0xfc001e00, "ucxx(s,b),t", pa10, FLAG_STRICT},
818 { "cldd",       0x2c000000, 0xfc001e00, "ucxx(b),t", pa10, FLAG_STRICT},
819 { "cldd",       0x2c001000, 0xfc001e00, "ucm5(s,b),t", pa10, FLAG_STRICT},
820 { "cldd",       0x2c001000, 0xfc001e00, "ucm5(b),t", pa20, FLAG_STRICT},
821 { "cstw",       0x24000200, 0xfc001e00, "ucxt,x(s,b)", pa10, FLAG_STRICT},
822 { "cstw",       0x24000200, 0xfc001e00, "ucxt,x(b)", pa10, FLAG_STRICT},
823 { "cstw",       0x24001200, 0xfc001e00, "ucmt,5(s,b)", pa10, FLAG_STRICT},
824 { "cstw",       0x24001200, 0xfc001e00, "ucmt,5(b)", pa10, FLAG_STRICT},
825 { "cstd",       0x2c000200, 0xfc001e00, "ucxt,x(s,b)", pa10, FLAG_STRICT},
826 { "cstd",       0x2c000200, 0xfc001e00, "ucxt,x(b)", pa10, FLAG_STRICT},
827 { "cstd",       0x2c001200, 0xfc001e00, "ucmt,5(s,b)", pa10, FLAG_STRICT},
828 { "cstd",       0x2c001200, 0xfc001e00, "ucmt,5(b)", pa10, FLAG_STRICT},
829 };
830 
831 #define NUMOPCODES ((sizeof pa_opcodes)/(sizeof pa_opcodes[0]))
832 
833 /* SKV 12/18/92. Added some denotations for various operands. */
834 
835 #define PA_IMM11_AT_31 'i'
836 #define PA_IMM14_AT_31 'j'
837 #define PA_IMM21_AT_31 'k'
838 #define PA_DISP12 'w'
839 #define PA_DISP17 'W'
840 
841 #define N_HPPA_OPERAND_FORMATS 5
842