xref: /openbsd-src/gnu/usr.bin/binutils/include/elf/m32r.h (revision db3296cf5c1dd9058ceecc3a29fe4aaa0bd26000)
1 /* M32R ELF support for BFD.
2    Copyright 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
3 
4 This file is part of BFD, the Binary File Descriptor library.
5 
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10 
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 GNU General Public License for more details.
15 
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
19 
20 #ifndef _ELF_M32R_H
21 #define _ELF_M32R_H
22 
23 #include "elf/reloc-macros.h"
24 
25 /* Relocations.  */
26 START_RELOC_NUMBERS (elf_m32r_reloc_type)
27   RELOC_NUMBER (R_M32R_NONE, 0)
28   RELOC_NUMBER (R_M32R_16, 1)
29   RELOC_NUMBER (R_M32R_32, 2)
30   RELOC_NUMBER (R_M32R_24, 3)
31   RELOC_NUMBER (R_M32R_10_PCREL, 4)
32   RELOC_NUMBER (R_M32R_18_PCREL, 5)
33   RELOC_NUMBER (R_M32R_26_PCREL, 6)
34   RELOC_NUMBER (R_M32R_HI16_ULO, 7)
35   RELOC_NUMBER (R_M32R_HI16_SLO, 8)
36   RELOC_NUMBER (R_M32R_LO16, 9)
37   RELOC_NUMBER (R_M32R_SDA16, 10)
38   RELOC_NUMBER (R_M32R_GNU_VTINHERIT, 11)
39   RELOC_NUMBER (R_M32R_GNU_VTENTRY, 12)
40 END_RELOC_NUMBERS (R_M32R_max)
41 
42 /* Processor specific section indices.  These sections do not actually
43    exist.  Symbols with a st_shndx field corresponding to one of these
44    values have a special meaning.  */
45 
46 /* Small common symbol.  */
47 #define SHN_M32R_SCOMMON	0xff00
48 
49 /* Processor specific section flags.  */
50 
51 /* This section contains sufficient relocs to be relaxed.
52    When relaxing, even relocs of branch instructions the assembler could
53    complete must be present because relaxing may cause the branch target to
54    move.  */
55 #define SHF_M32R_CAN_RELAX	0x10000000
56 
57 /* Processor specific flags for the ELF header e_flags field.  */
58 
59 /* Two bit m32r architecture field.  */
60 #define EF_M32R_ARCH		0x30000000
61 
62 /* m32r code.  */
63 #define E_M32R_ARCH		0x00000000
64 /* m32rx code.  */
65 #define E_M32RX_ARCH		0x10000000
66 
67 #endif
68