1 /* Target-dependent code for Hitachi Super-H, for GDB. 2 Copyright (C) 1993, 1994, 1995, 1996 Free Software Foundation, Inc. 3 4 This file is part of GDB. 5 6 This program is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 2 of the License, or 9 (at your option) any later version. 10 11 This program is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with this program; if not, write to the Free Software 18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 19 20 /* 21 Contributed by Steve Chamberlain 22 sac@cygnus.com 23 */ 24 25 #include "defs.h" 26 #include "frame.h" 27 #include "obstack.h" 28 #include "symtab.h" 29 #include "gdbtypes.h" 30 #include "gdbcmd.h" 31 #include "gdbcore.h" 32 #include "value.h" 33 #include "dis-asm.h" 34 35 extern int remote_write_size; /* in remote.c */ 36 37 /* Default to the original SH. */ 38 39 #define DEFAULT_SH_TYPE "sh" 40 41 /* This value is the model of SH in use. */ 42 43 char *sh_processor_type; 44 45 char *tmp_sh_processor_type; 46 47 /* A set of original names, to be used when restoring back to generic 48 registers from a specific set. */ 49 50 char *sh_generic_reg_names[] = REGISTER_NAMES; 51 52 char *sh_reg_names[] = { 53 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 54 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 55 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", 56 "", "", 57 "", "", "", "", "", "", "", "", 58 "", "", "", "", "", "", "", "", 59 "", "", 60 "", "", "", "", "", "", "", "", 61 "", "", "", "", "", "", "", "", 62 }; 63 64 char *sh3_reg_names[] = { 65 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 66 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 67 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", 68 "", "", 69 "", "", "", "", "", "", "", "", 70 "", "", "", "", "", "", "", "", 71 "ssr", "spc", 72 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", 73 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1" 74 }; 75 76 char *sh3e_reg_names[] = { 77 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 78 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 79 "pc", "pr", "gbr", "vbr", "mach", "macl", "sr", 80 "fpul", "fpscr", 81 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", 82 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", 83 "ssr", "spc", 84 "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", 85 "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1", 86 }; 87 88 struct { 89 char *name; 90 char **regnames; 91 } sh_processor_type_table[] = { 92 { "sh", sh_reg_names }, 93 { "sh3", sh3_reg_names }, 94 { "sh3e", sh3e_reg_names }, 95 { NULL, NULL } 96 }; 97 98 /* Prologue looks like 99 [mov.l <regs>,@-r15]... 100 [sts.l pr,@-r15] 101 [mov.l r14,@-r15] 102 [mov r15,r14] 103 */ 104 105 #define IS_STS(x) ((x) == 0x4f22) 106 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06) 107 #define GET_PUSHED_REG(x) (((x) >> 4) & 0xf) 108 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3) 109 #define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00) 110 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00) 111 #define IS_SHLL_R3(x) ((x) == 0x4300) 112 #define IS_ADD_R3SP(x) ((x) == 0x3f3c) 113 114 /* Skip any prologue before the guts of a function */ 115 116 CORE_ADDR 117 sh_skip_prologue (start_pc) 118 CORE_ADDR start_pc; 119 { 120 int w; 121 122 w = read_memory_integer (start_pc, 2); 123 while (IS_STS (w) 124 || IS_PUSH (w) 125 || IS_MOV_SP_FP (w) 126 || IS_MOV_R3 (w) 127 || IS_ADD_R3SP (w) 128 || IS_ADD_SP (w) 129 || IS_SHLL_R3 (w)) 130 { 131 start_pc += 2; 132 w = read_memory_integer (start_pc, 2); 133 } 134 135 return start_pc; 136 } 137 138 /* Disassemble an instruction. */ 139 140 int 141 gdb_print_insn_sh (memaddr, info) 142 bfd_vma memaddr; 143 disassemble_info *info; 144 { 145 if (TARGET_BYTE_ORDER == BIG_ENDIAN) 146 return print_insn_sh (memaddr, info); 147 else 148 return print_insn_shl (memaddr, info); 149 } 150 151 /* Given a GDB frame, determine the address of the calling function's frame. 152 This will be used to create a new GDB frame struct, and then 153 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. 154 155 For us, the frame address is its stack pointer value, so we look up 156 the function prologue to determine the caller's sp value, and return it. */ 157 158 CORE_ADDR 159 sh_frame_chain (frame) 160 struct frame_info *frame; 161 { 162 if (!inside_entry_file (frame->pc)) 163 return read_memory_integer (FRAME_FP (frame) + frame->f_offset, 4); 164 else 165 return 0; 166 } 167 168 /* Put here the code to store, into a struct frame_saved_regs, the 169 addresses of the saved registers of frame described by FRAME_INFO. 170 This includes special registers such as pc and fp saved in special 171 ways in the stack frame. sp is even more special: the address we 172 return for it IS the sp for the next frame. */ 173 174 void 175 frame_find_saved_regs (fi, fsr) 176 struct frame_info *fi; 177 struct frame_saved_regs *fsr; 178 { 179 int where[NUM_REGS]; 180 int rn; 181 int have_fp = 0; 182 int depth; 183 int pc; 184 int opc; 185 int insn; 186 int r3_val = 0; 187 188 opc = pc = get_pc_function_start (fi->pc); 189 190 insn = read_memory_integer (pc, 2); 191 192 fi->leaf_function = 1; 193 fi->f_offset = 0; 194 195 for (rn = 0; rn < NUM_REGS; rn++) 196 where[rn] = -1; 197 198 depth = 0; 199 200 /* Loop around examining the prologue insns, but give up 201 after 15 of them, since we're getting silly then */ 202 while (pc < opc + 15 * 2) 203 { 204 /* See where the registers will be saved to */ 205 if (IS_PUSH (insn)) 206 { 207 pc += 2; 208 rn = GET_PUSHED_REG (insn); 209 where[rn] = depth; 210 insn = read_memory_integer (pc, 2); 211 depth += 4; 212 } 213 else if (IS_STS (insn)) 214 { 215 pc += 2; 216 where[PR_REGNUM] = depth; 217 insn = read_memory_integer (pc, 2); 218 /* If we're storing the pr then this isn't a leaf */ 219 fi->leaf_function = 0; 220 depth += 4; 221 } 222 else if (IS_MOV_R3 (insn)) 223 { 224 r3_val = (char) (insn & 0xff); 225 pc += 2; 226 insn = read_memory_integer (pc, 2); 227 } 228 else if (IS_SHLL_R3 (insn)) 229 { 230 r3_val <<= 1; 231 pc += 2; 232 insn = read_memory_integer (pc, 2); 233 } 234 else if (IS_ADD_R3SP (insn)) 235 { 236 depth += -r3_val; 237 pc += 2; 238 insn = read_memory_integer (pc, 2); 239 } 240 else if (IS_ADD_SP (insn)) 241 { 242 pc += 2; 243 depth += -((char) (insn & 0xff)); 244 insn = read_memory_integer (pc, 2); 245 } 246 else 247 break; 248 } 249 250 /* Now we know how deep things are, we can work out their addresses */ 251 252 for (rn = 0; rn < NUM_REGS; rn++) 253 { 254 if (where[rn] >= 0) 255 { 256 if (rn == FP_REGNUM) 257 have_fp = 1; 258 259 fsr->regs[rn] = fi->frame - where[rn] + depth - 4; 260 } 261 else 262 { 263 fsr->regs[rn] = 0; 264 } 265 } 266 267 if (have_fp) 268 { 269 fsr->regs[SP_REGNUM] = read_memory_integer (fsr->regs[FP_REGNUM], 4); 270 } 271 else 272 { 273 fsr->regs[SP_REGNUM] = fi->frame - 4; 274 } 275 276 fi->f_offset = depth - where[FP_REGNUM] - 4; 277 /* Work out the return pc - either from the saved pr or the pr 278 value */ 279 280 if (fsr->regs[PR_REGNUM]) 281 fi->return_pc = read_memory_integer (fsr->regs[PR_REGNUM], 4); 282 else 283 fi->return_pc = read_register (PR_REGNUM); 284 } 285 286 /* initialize the extra info saved in a FRAME */ 287 288 void 289 init_extra_frame_info (fromleaf, fi) 290 int fromleaf; 291 struct frame_info *fi; 292 { 293 struct frame_saved_regs dummy; 294 295 if (fi->next) 296 fi->pc = fi->next->return_pc; 297 298 frame_find_saved_regs (fi, &dummy); 299 } 300 301 302 /* Discard from the stack the innermost frame, 303 restoring all saved registers. */ 304 305 void 306 pop_frame () 307 { 308 register struct frame_info *frame = get_current_frame (); 309 register CORE_ADDR fp; 310 register int regnum; 311 struct frame_saved_regs fsr; 312 313 fp = FRAME_FP (frame); 314 get_frame_saved_regs (frame, &fsr); 315 316 /* Copy regs from where they were saved in the frame */ 317 for (regnum = 0; regnum < NUM_REGS; regnum++) 318 { 319 if (fsr.regs[regnum]) 320 { 321 write_register (regnum, read_memory_integer (fsr.regs[regnum], 4)); 322 } 323 } 324 325 write_register (PC_REGNUM, frame->return_pc); 326 write_register (SP_REGNUM, fp + 4); 327 flush_cached_frames (); 328 } 329 330 /* Command to set the processor type. */ 331 332 void 333 sh_set_processor_type_command (args, from_tty) 334 char *args; 335 int from_tty; 336 { 337 int i; 338 char *temp; 339 340 /* The `set' commands work by setting the value, then calling the hook, 341 so we let the general command modify a scratch location, then decide 342 here if we really want to modify the processor type. */ 343 if (tmp_sh_processor_type == NULL || *tmp_sh_processor_type == '\0') 344 { 345 printf_unfiltered ("The known SH processor types are as follows:\n\n"); 346 for (i = 0; sh_processor_type_table[i].name != NULL; ++i) 347 printf_unfiltered ("%s\n", sh_processor_type_table[i].name); 348 349 /* Restore the value. */ 350 tmp_sh_processor_type = strsave (sh_processor_type); 351 352 return; 353 } 354 355 if (!sh_set_processor_type (tmp_sh_processor_type)) 356 { 357 /* Restore to a valid value before erroring out. */ 358 temp = tmp_sh_processor_type; 359 tmp_sh_processor_type = strsave (sh_processor_type); 360 error ("Unknown processor type `%s'.", temp); 361 } 362 } 363 364 /* This is a dummy not actually run. */ 365 366 static void 367 sh_show_processor_type_command (args, from_tty) 368 char *args; 369 int from_tty; 370 { 371 } 372 373 /* Modify the actual processor type. */ 374 375 int 376 sh_set_processor_type (str) 377 char *str; 378 { 379 int i, j; 380 381 if (str == NULL) 382 return 0; 383 384 for (i = 0; sh_processor_type_table[i].name != NULL; ++i) 385 { 386 if (strcasecmp (str, sh_processor_type_table[i].name) == 0) 387 { 388 sh_processor_type = str; 389 390 for (j = 0; j < NUM_REGS; ++j) 391 reg_names[j] = sh_processor_type_table[i].regnames[j]; 392 393 return 1; 394 } 395 } 396 397 return 0; 398 } 399 400 /* Print the registers in a form similar to the E7000 */ 401 402 static void 403 show_regs (args, from_tty) 404 char *args; 405 int from_tty; 406 { 407 printf_filtered ("PC=%08x SR=%08x PR=%08x MACH=%08x MACHL=%08x\n", 408 read_register (PC_REGNUM), 409 read_register (SR_REGNUM), 410 read_register (PR_REGNUM), 411 read_register (MACH_REGNUM), 412 read_register (MACL_REGNUM)); 413 414 printf_filtered ("R0-R7 %08x %08x %08x %08x %08x %08x %08x %08x\n", 415 read_register (0), 416 read_register (1), 417 read_register (2), 418 read_register (3), 419 read_register (4), 420 read_register (5), 421 read_register (6), 422 read_register (7)); 423 printf_filtered ("R8-R15 %08x %08x %08x %08x %08x %08x %08x %08x\n", 424 read_register (8), 425 read_register (9), 426 read_register (10), 427 read_register (11), 428 read_register (12), 429 read_register (13), 430 read_register (14), 431 read_register (15)); 432 } 433 434 void 435 _initialize_sh_tdep () 436 { 437 struct cmd_list_element *c; 438 439 tm_print_insn = gdb_print_insn_sh; 440 441 c = add_set_cmd ("processor", class_support, var_string_noescape, 442 (char *) &tmp_sh_processor_type, 443 "Set the type of SH processor in use.\n\ 444 Set this to be able to access processor-type-specific registers.\n\ 445 ", 446 &setlist); 447 c->function.cfunc = sh_set_processor_type_command; 448 c = add_show_from_set (c, &showlist); 449 c->function.cfunc = sh_show_processor_type_command; 450 451 tmp_sh_processor_type = strsave (DEFAULT_SH_TYPE); 452 sh_set_processor_type_command (strsave (DEFAULT_SH_TYPE), 0); 453 454 add_com ("regs", class_vars, show_regs, "Print all registers"); 455 456 /* Reduce the remote write size because some CMONs can't take 457 more than 400 bytes in a packet. 300 seems like a safe bet. */ 458 remote_write_size = 300; 459 } 460