1 /* Target-machine dependent code for Motorola 88000 series, for GDB. 2 Copyright 1988, 1990, 1991, 1994, 1995 Free Software Foundation, Inc. 3 4 This file is part of GDB. 5 6 This program is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 2 of the License, or 9 (at your option) any later version. 10 11 This program is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with this program; if not, write to the Free Software 18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 19 20 #include "defs.h" 21 #include "frame.h" 22 #include "inferior.h" 23 #include "value.h" 24 #include "gdbcore.h" 25 #include "symtab.h" 26 #include "setjmp.h" 27 #include "value.h" 28 29 /* Size of an instruction */ 30 #define BYTES_PER_88K_INSN 4 31 32 void frame_find_saved_regs (); 33 34 /* Is this target an m88110? Otherwise assume m88100. This has 35 relevance for the ways in which we screw with instruction pointers. */ 36 37 int target_is_m88110 = 0; 38 39 /* Given a GDB frame, determine the address of the calling function's frame. 40 This will be used to create a new GDB frame struct, and then 41 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. 42 43 For us, the frame address is its stack pointer value, so we look up 44 the function prologue to determine the caller's sp value, and return it. */ 45 46 CORE_ADDR 47 frame_chain (thisframe) 48 struct frame_info *thisframe; 49 { 50 51 frame_find_saved_regs (thisframe, (struct frame_saved_regs *) 0); 52 /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not 53 the ADDRESS, of SP_REGNUM. It also depends on the cache of 54 frame_find_saved_regs results. */ 55 if (thisframe->fsr->regs[SP_REGNUM]) 56 return thisframe->fsr->regs[SP_REGNUM]; 57 else 58 return thisframe->frame; /* Leaf fn -- next frame up has same SP. */ 59 } 60 61 int 62 frameless_function_invocation (frame) 63 struct frame_info *frame; 64 { 65 66 frame_find_saved_regs (frame, (struct frame_saved_regs *) 0); 67 /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not 68 the ADDRESS, of SP_REGNUM. It also depends on the cache of 69 frame_find_saved_regs results. */ 70 if (frame->fsr->regs[SP_REGNUM]) 71 return 0; /* Frameful -- return addr saved somewhere */ 72 else 73 return 1; /* Frameless -- no saved return address */ 74 } 75 76 void 77 init_extra_frame_info (fromleaf, frame) 78 int fromleaf; 79 struct frame_info *frame; 80 { 81 frame->fsr = 0; /* Not yet allocated */ 82 frame->args_pointer = 0; /* Unknown */ 83 frame->locals_pointer = 0; /* Unknown */ 84 } 85 86 /* Examine an m88k function prologue, recording the addresses at which 87 registers are saved explicitly by the prologue code, and returning 88 the address of the first instruction after the prologue (but not 89 after the instruction at address LIMIT, as explained below). 90 91 LIMIT places an upper bound on addresses of the instructions to be 92 examined. If the prologue code scan reaches LIMIT, the scan is 93 aborted and LIMIT is returned. This is used, when examining the 94 prologue for the current frame, to keep examine_prologue () from 95 claiming that a given register has been saved when in fact the 96 instruction that saves it has not yet been executed. LIMIT is used 97 at other times to stop the scan when we hit code after the true 98 function prologue (e.g. for the first source line) which might 99 otherwise be mistaken for function prologue. 100 101 The format of the function prologue matched by this routine is 102 derived from examination of the source to gcc 1.95, particularly 103 the routine output_prologue () in config/out-m88k.c. 104 105 subu r31,r31,n # stack pointer update 106 107 (st rn,r31,offset)? # save incoming regs 108 (st.d rn,r31,offset)? 109 110 (addu r30,r31,n)? # frame pointer update 111 112 (pic sequence)? # PIC code prologue 113 114 (or rn,rm,0)? # Move parameters to other regs 115 */ 116 117 /* Macros for extracting fields from instructions. */ 118 119 #define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos)) 120 #define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width)) 121 #define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF)) 122 #define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF)) 123 #define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5) 124 #define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF)) 125 126 /* 127 * prologue_insn_tbl is a table of instructions which may comprise a 128 * function prologue. Associated with each table entry (corresponding 129 * to a single instruction or group of instructions), is an action. 130 * This action is used by examine_prologue (below) to determine 131 * the state of certain machine registers and where the stack frame lives. 132 */ 133 134 enum prologue_insn_action { 135 PIA_SKIP, /* don't care what the instruction does */ 136 PIA_NOTE_ST, /* note register stored and where */ 137 PIA_NOTE_STD, /* note pair of registers stored and where */ 138 PIA_NOTE_SP_ADJUSTMENT, /* note stack pointer adjustment */ 139 PIA_NOTE_FP_ASSIGNMENT, /* note frame pointer assignment */ 140 PIA_NOTE_PROLOGUE_END, /* no more prologue */ 141 }; 142 143 struct prologue_insns { 144 unsigned long insn; 145 unsigned long mask; 146 enum prologue_insn_action action; 147 }; 148 149 struct prologue_insns prologue_insn_tbl[] = { 150 /* Various register move instructions */ 151 { 0x58000000, 0xf800ffff, PIA_SKIP }, /* or/or.u with immed of 0 */ 152 { 0xf4005800, 0xfc1fffe0, PIA_SKIP }, /* or rd, r0, rs */ 153 { 0xf4005800, 0xfc00ffff, PIA_SKIP }, /* or rd, rs, r0 */ 154 155 /* Stack pointer setup: "subu sp, sp, n" where n is a multiple of 8 */ 156 { 0x67ff0000, 0xffff0007, PIA_NOTE_SP_ADJUSTMENT }, 157 158 /* Frame pointer assignment: "addu r30, r31, n" */ 159 { 0x63df0000, 0xffff0000, PIA_NOTE_FP_ASSIGNMENT }, 160 161 /* Store to stack instructions; either "st rx, sp, n" or "st.d rx, sp, n" */ 162 { 0x241f0000, 0xfc1f0000, PIA_NOTE_ST }, /* st rx, sp, n */ 163 { 0x201f0000, 0xfc1f0000, PIA_NOTE_STD }, /* st.d rs, sp, n */ 164 165 /* Instructions needed for setting up r25 for pic code. */ 166 { 0x5f200000, 0xffff0000, PIA_SKIP }, /* or.u r25, r0, offset_high */ 167 { 0xcc000002, 0xffffffff, PIA_SKIP }, /* bsr.n Lab */ 168 { 0x5b390000, 0xffff0000, PIA_SKIP }, /* or r25, r25, offset_low */ 169 { 0xf7396001, 0xffffffff, PIA_SKIP }, /* Lab: addu r25, r25, r1 */ 170 171 /* Various branch or jump instructions which have a delay slot -- these 172 do not form part of the prologue, but the instruction in the delay 173 slot might be a store instruction which should be noted. */ 174 { 0xc4000000, 0xe4000000, PIA_NOTE_PROLOGUE_END }, 175 /* br.n, bsr.n, bb0.n, or bb1.n */ 176 { 0xec000000, 0xfc000000, PIA_NOTE_PROLOGUE_END }, /* bcnd.n */ 177 { 0xf400c400, 0xfffff7e0, PIA_NOTE_PROLOGUE_END } /* jmp.n or jsr.n */ 178 179 }; 180 181 182 /* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or 183 is not the address of a valid instruction, the address of the next 184 instruction beyond ADDR otherwise. *PWORD1 receives the first word 185 of the instruction. */ 186 187 #define NEXT_PROLOGUE_INSN(addr, lim, pword1) \ 188 (((addr) < (lim)) ? next_insn (addr, pword1) : 0) 189 190 /* Read the m88k instruction at 'memaddr' and return the address of 191 the next instruction after that, or 0 if 'memaddr' is not the 192 address of a valid instruction. The instruction 193 is stored at 'pword1'. */ 194 195 CORE_ADDR 196 next_insn (memaddr, pword1) 197 unsigned long *pword1; 198 CORE_ADDR memaddr; 199 { 200 *pword1 = read_memory_integer (memaddr, BYTES_PER_88K_INSN); 201 return memaddr + BYTES_PER_88K_INSN; 202 } 203 204 /* Read a register from frames called by us (or from the hardware regs). */ 205 206 static int 207 read_next_frame_reg(frame, regno) 208 struct frame_info *frame; 209 int regno; 210 { 211 for (; frame; frame = frame->next) { 212 if (regno == SP_REGNUM) 213 return FRAME_FP (frame); 214 else if (frame->fsr->regs[regno]) 215 return read_memory_integer(frame->fsr->regs[regno], 4); 216 } 217 return read_register(regno); 218 } 219 220 /* Examine the prologue of a function. `ip' points to the first instruction. 221 `limit' is the limit of the prologue (e.g. the addr of the first 222 linenumber, or perhaps the program counter if we're stepping through). 223 `frame_sp' is the stack pointer value in use in this frame. 224 `fsr' is a pointer to a frame_saved_regs structure into which we put 225 info about the registers saved by this frame. 226 `fi' is a struct frame_info pointer; we fill in various fields in it 227 to reflect the offsets of the arg pointer and the locals pointer. */ 228 229 static CORE_ADDR 230 examine_prologue (ip, limit, frame_sp, fsr, fi) 231 register CORE_ADDR ip; 232 register CORE_ADDR limit; 233 CORE_ADDR frame_sp; 234 struct frame_saved_regs *fsr; 235 struct frame_info *fi; 236 { 237 register CORE_ADDR next_ip; 238 register int src; 239 unsigned int insn; 240 int size, offset; 241 char must_adjust[32]; /* If set, must adjust offsets in fsr */ 242 int sp_offset = -1; /* -1 means not set (valid must be mult of 8) */ 243 int fp_offset = -1; /* -1 means not set */ 244 CORE_ADDR frame_fp; 245 CORE_ADDR prologue_end = 0; 246 247 memset (must_adjust, '\0', sizeof (must_adjust)); 248 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn); 249 250 while (next_ip) 251 { 252 struct prologue_insns *pip; 253 254 for (pip=prologue_insn_tbl; (insn & pip->mask) != pip->insn; ) 255 if (++pip >= prologue_insn_tbl + sizeof prologue_insn_tbl) 256 goto end_of_prologue_found; /* not a prologue insn */ 257 258 switch (pip->action) 259 { 260 case PIA_NOTE_ST: 261 case PIA_NOTE_STD: 262 if (sp_offset != -1) { 263 src = ST_SRC (insn); 264 offset = ST_OFFSET (insn); 265 must_adjust[src] = 1; 266 fsr->regs[src++] = offset; /* Will be adjusted later */ 267 if (pip->action == PIA_NOTE_STD && src < 32) 268 { 269 offset += 4; 270 must_adjust[src] = 1; 271 fsr->regs[src++] = offset; 272 } 273 } 274 else 275 goto end_of_prologue_found; 276 break; 277 case PIA_NOTE_SP_ADJUSTMENT: 278 if (sp_offset == -1) 279 sp_offset = -SUBU_OFFSET (insn); 280 else 281 goto end_of_prologue_found; 282 break; 283 case PIA_NOTE_FP_ASSIGNMENT: 284 if (fp_offset == -1) 285 fp_offset = ADDU_OFFSET (insn); 286 else 287 goto end_of_prologue_found; 288 break; 289 case PIA_NOTE_PROLOGUE_END: 290 if (!prologue_end) 291 prologue_end = ip; 292 break; 293 case PIA_SKIP: 294 default : 295 /* Do nothing */ 296 break; 297 } 298 299 ip = next_ip; 300 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn); 301 } 302 303 end_of_prologue_found: 304 305 if (prologue_end) 306 ip = prologue_end; 307 308 /* We're done with the prologue. If we don't care about the stack 309 frame itself, just return. (Note that fsr->regs has been trashed, 310 but the one caller who calls with fi==0 passes a dummy there.) */ 311 312 if (fi == 0) 313 return ip; 314 315 /* 316 OK, now we have: 317 318 sp_offset original (before any alloca calls) displacement of SP 319 (will be negative). 320 321 fp_offset displacement from original SP to the FP for this frame 322 or -1. 323 324 fsr->regs[0..31] displacement from original SP to the stack 325 location where reg[0..31] is stored. 326 327 must_adjust[0..31] set if corresponding offset was set. 328 329 If alloca has been called between the function prologue and the current 330 IP, then the current SP (frame_sp) will not be the original SP as set by 331 the function prologue. If the current SP is not the original SP, then the 332 compiler will have allocated an FP for this frame, fp_offset will be set, 333 and we can use it to calculate the original SP. 334 335 Then, we figure out where the arguments and locals are, and relocate the 336 offsets in fsr->regs to absolute addresses. */ 337 338 if (fp_offset != -1) { 339 /* We have a frame pointer, so get it, and base our calc's on it. */ 340 frame_fp = (CORE_ADDR) read_next_frame_reg (fi->next, ACTUAL_FP_REGNUM); 341 frame_sp = frame_fp - fp_offset; 342 } else { 343 /* We have no frame pointer, therefore frame_sp is still the same value 344 as set by prologue. But where is the frame itself? */ 345 if (must_adjust[SRP_REGNUM]) { 346 /* Function header saved SRP (r1), the return address. Frame starts 347 4 bytes down from where it was saved. */ 348 frame_fp = frame_sp + fsr->regs[SRP_REGNUM] - 4; 349 fi->locals_pointer = frame_fp; 350 } else { 351 /* Function header didn't save SRP (r1), so we are in a leaf fn or 352 are otherwise confused. */ 353 frame_fp = -1; 354 } 355 } 356 357 /* The locals are relative to the FP (whether it exists as an allocated 358 register, or just as an assumed offset from the SP) */ 359 fi->locals_pointer = frame_fp; 360 361 /* The arguments are just above the SP as it was before we adjusted it 362 on entry. */ 363 fi->args_pointer = frame_sp - sp_offset; 364 365 /* Now that we know the SP value used by the prologue, we know where 366 it saved all the registers. */ 367 for (src = 0; src < 32; src++) 368 if (must_adjust[src]) 369 fsr->regs[src] += frame_sp; 370 371 /* The saved value of the SP is always known. */ 372 /* (we hope...) */ 373 if (fsr->regs[SP_REGNUM] != 0 374 && fsr->regs[SP_REGNUM] != frame_sp - sp_offset) 375 fprintf_unfiltered(gdb_stderr, "Bad saved SP value %x != %x, offset %x!\n", 376 fsr->regs[SP_REGNUM], 377 frame_sp - sp_offset, sp_offset); 378 379 fsr->regs[SP_REGNUM] = frame_sp - sp_offset; 380 381 return (ip); 382 } 383 384 /* Given an ip value corresponding to the start of a function, 385 return the ip of the first instruction after the function 386 prologue. */ 387 388 CORE_ADDR 389 skip_prologue (ip) 390 CORE_ADDR (ip); 391 { 392 struct frame_saved_regs saved_regs_dummy; 393 struct symtab_and_line sal; 394 CORE_ADDR limit; 395 396 sal = find_pc_line (ip, 0); 397 limit = (sal.end) ? sal.end : 0xffffffff; 398 399 return (examine_prologue (ip, limit, (CORE_ADDR) 0, &saved_regs_dummy, 400 (struct frame_info *)0 )); 401 } 402 403 /* Put here the code to store, into a struct frame_saved_regs, 404 the addresses of the saved registers of frame described by FRAME_INFO. 405 This includes special registers such as pc and fp saved in special 406 ways in the stack frame. sp is even more special: 407 the address we return for it IS the sp for the next frame. 408 409 We cache the result of doing this in the frame_cache_obstack, since 410 it is fairly expensive. */ 411 412 void 413 frame_find_saved_regs (fi, fsr) 414 struct frame_info *fi; 415 struct frame_saved_regs *fsr; 416 { 417 register struct frame_saved_regs *cache_fsr; 418 extern struct obstack frame_cache_obstack; 419 CORE_ADDR ip; 420 struct symtab_and_line sal; 421 CORE_ADDR limit; 422 423 if (!fi->fsr) 424 { 425 cache_fsr = (struct frame_saved_regs *) 426 obstack_alloc (&frame_cache_obstack, 427 sizeof (struct frame_saved_regs)); 428 memset (cache_fsr, '\0', sizeof (struct frame_saved_regs)); 429 fi->fsr = cache_fsr; 430 431 /* Find the start and end of the function prologue. If the PC 432 is in the function prologue, we only consider the part that 433 has executed already. In the case where the PC is not in 434 the function prologue, we set limit to two instructions beyond 435 where the prologue ends in case if any of the prologue instructions 436 were moved into a delay slot of a branch instruction. */ 437 438 ip = get_pc_function_start (fi->pc); 439 sal = find_pc_line (ip, 0); 440 limit = (sal.end && sal.end < fi->pc) ? sal.end + 2 * BYTES_PER_88K_INSN 441 : fi->pc; 442 443 /* This will fill in fields in *fi as well as in cache_fsr. */ 444 #ifdef SIGTRAMP_FRAME_FIXUP 445 if (fi->signal_handler_caller) 446 SIGTRAMP_FRAME_FIXUP(fi->frame); 447 #endif 448 examine_prologue (ip, limit, fi->frame, cache_fsr, fi); 449 #ifdef SIGTRAMP_SP_FIXUP 450 if (fi->signal_handler_caller && fi->fsr->regs[SP_REGNUM]) 451 SIGTRAMP_SP_FIXUP(fi->fsr->regs[SP_REGNUM]); 452 #endif 453 } 454 455 if (fsr) 456 *fsr = *fi->fsr; 457 } 458 459 /* Return the address of the locals block for the frame 460 described by FI. Returns 0 if the address is unknown. 461 NOTE! Frame locals are referred to by negative offsets from the 462 argument pointer, so this is the same as frame_args_address(). */ 463 464 CORE_ADDR 465 frame_locals_address (fi) 466 struct frame_info *fi; 467 { 468 struct frame_saved_regs fsr; 469 470 if (fi->args_pointer) /* Cached value is likely there. */ 471 return fi->args_pointer; 472 473 /* Nope, generate it. */ 474 475 get_frame_saved_regs (fi, &fsr); 476 477 return fi->args_pointer; 478 } 479 480 /* Return the address of the argument block for the frame 481 described by FI. Returns 0 if the address is unknown. */ 482 483 CORE_ADDR 484 frame_args_address (fi) 485 struct frame_info *fi; 486 { 487 struct frame_saved_regs fsr; 488 489 if (fi->args_pointer) /* Cached value is likely there. */ 490 return fi->args_pointer; 491 492 /* Nope, generate it. */ 493 494 get_frame_saved_regs (fi, &fsr); 495 496 return fi->args_pointer; 497 } 498 499 /* Return the saved PC from this frame. 500 501 If the frame has a memory copy of SRP_REGNUM, use that. If not, 502 just use the register SRP_REGNUM itself. */ 503 504 CORE_ADDR 505 frame_saved_pc (frame) 506 struct frame_info *frame; 507 { 508 return read_next_frame_reg(frame, SRP_REGNUM); 509 } 510 511 512 #define DUMMY_FRAME_SIZE 192 513 514 static void 515 write_word (sp, word) 516 CORE_ADDR sp; 517 unsigned LONGEST word; 518 { 519 register int len = REGISTER_SIZE; 520 char buffer[MAX_REGISTER_RAW_SIZE]; 521 522 store_unsigned_integer (buffer, len, word); 523 write_memory (sp, buffer, len); 524 } 525 526 void 527 m88k_push_dummy_frame() 528 { 529 register CORE_ADDR sp = read_register (SP_REGNUM); 530 register int rn; 531 int offset; 532 533 sp -= DUMMY_FRAME_SIZE; /* allocate a bunch of space */ 534 535 for (rn = 0, offset = 0; rn <= SP_REGNUM; rn++, offset+=4) 536 write_word (sp+offset, read_register(rn)); 537 538 write_word (sp+offset, read_register (SXIP_REGNUM)); 539 offset += 4; 540 541 write_word (sp+offset, read_register (SNIP_REGNUM)); 542 offset += 4; 543 544 write_word (sp+offset, read_register (SFIP_REGNUM)); 545 offset += 4; 546 547 write_word (sp+offset, read_register (PSR_REGNUM)); 548 offset += 4; 549 550 write_word (sp+offset, read_register (FPSR_REGNUM)); 551 offset += 4; 552 553 write_word (sp+offset, read_register (FPCR_REGNUM)); 554 offset += 4; 555 556 write_register (SP_REGNUM, sp); 557 write_register (ACTUAL_FP_REGNUM, sp); 558 } 559 560 void 561 pop_frame () 562 { 563 register struct frame_info *frame = get_current_frame (); 564 register CORE_ADDR fp; 565 register int regnum; 566 struct frame_saved_regs fsr; 567 568 fp = FRAME_FP (frame); 569 get_frame_saved_regs (frame, &fsr); 570 571 if (PC_IN_CALL_DUMMY (read_pc (), read_register (SP_REGNUM), FRAME_FP (fi))) 572 { 573 /* FIXME: I think get_frame_saved_regs should be handling this so 574 that we can deal with the saved registers properly (e.g. frame 575 1 is a call dummy, the user types "frame 2" and then "print $ps"). */ 576 register CORE_ADDR sp = read_register (ACTUAL_FP_REGNUM); 577 int offset; 578 579 for (regnum = 0, offset = 0; regnum <= SP_REGNUM; regnum++, offset+=4) 580 (void) write_register (regnum, read_memory_integer (sp+offset, 4)); 581 582 write_register (SXIP_REGNUM, read_memory_integer (sp+offset, 4)); 583 offset += 4; 584 585 write_register (SNIP_REGNUM, read_memory_integer (sp+offset, 4)); 586 offset += 4; 587 588 write_register (SFIP_REGNUM, read_memory_integer (sp+offset, 4)); 589 offset += 4; 590 591 write_register (PSR_REGNUM, read_memory_integer (sp+offset, 4)); 592 offset += 4; 593 594 write_register (FPSR_REGNUM, read_memory_integer (sp+offset, 4)); 595 offset += 4; 596 597 write_register (FPCR_REGNUM, read_memory_integer (sp+offset, 4)); 598 offset += 4; 599 600 } 601 else 602 { 603 for (regnum = FP_REGNUM ; regnum > 0 ; regnum--) 604 if (fsr.regs[regnum]) 605 write_register (regnum, 606 read_memory_integer (fsr.regs[regnum], 4)); 607 write_pc (frame_saved_pc (frame)); 608 } 609 reinit_frame_cache (); 610 } 611 612 void 613 _initialize_m88k_tdep () 614 { 615 tm_print_insn = print_insn_m88k; 616 } 617