xref: /openbsd-src/gnu/usr.bin/binutils/gas/doc/c-arc.texi (revision 5f210c2af8ad7a823d98e333e3a6e3d7999783f5)
1*5f210c2aSfgsch@c Copyright 2000, 2001 Free Software Foundation, Inc.
2*5f210c2aSfgsch@c This is part of the GAS manual.
3*5f210c2aSfgsch@c For copying conditions, see the file as.texinfo.
4*5f210c2aSfgsch
5*5f210c2aSfgsch@ifset GENERIC
6*5f210c2aSfgsch@page
7*5f210c2aSfgsch@node ARC-Dependent
8*5f210c2aSfgsch@chapter ARC Dependent Features
9*5f210c2aSfgsch@end ifset
10*5f210c2aSfgsch
11*5f210c2aSfgsch@ifclear GENERIC
12*5f210c2aSfgsch@node Machine Dependencies
13*5f210c2aSfgsch@chapter ARC Dependent Features
14*5f210c2aSfgsch@end ifclear
15*5f210c2aSfgsch
16*5f210c2aSfgsch@set ARC_CORE_DEFAULT 6
17*5f210c2aSfgsch
18*5f210c2aSfgsch@cindex ARC support
19*5f210c2aSfgsch@menu
20*5f210c2aSfgsch* ARC Options::              Options
21*5f210c2aSfgsch* ARC Syntax::               Syntax
22*5f210c2aSfgsch* ARC Floating Point::       Floating Point
23*5f210c2aSfgsch* ARC Directives::           ARC Machine Directives
24*5f210c2aSfgsch* ARC Opcodes::              Opcodes
25*5f210c2aSfgsch@end menu
26*5f210c2aSfgsch
27*5f210c2aSfgsch
28*5f210c2aSfgsch@node ARC Options
29*5f210c2aSfgsch@section Options
30*5f210c2aSfgsch@cindex ARC options (none)
31*5f210c2aSfgsch@cindex options for ARC (none)
32*5f210c2aSfgsch
33*5f210c2aSfgsch@table @code
34*5f210c2aSfgsch
35*5f210c2aSfgsch@cindex @code{-marc[5|6|7|8]} command line option, ARC
36*5f210c2aSfgsch@item -marc[5|6|7|8]
37*5f210c2aSfgschThis option selects the core processor variant. Using
38*5f210c2aSfgsch@code{-marc} is the same as @code{-marc@value{ARC_CORE_DEFAULT}}, which
39*5f210c2aSfgschis also the default.
40*5f210c2aSfgsch
41*5f210c2aSfgsch@table @code
42*5f210c2aSfgsch
43*5f210c2aSfgsch@cindex @code{arc5} arc5, ARC
44*5f210c2aSfgsch@item arc5
45*5f210c2aSfgschBase instruction set.
46*5f210c2aSfgsch
47*5f210c2aSfgsch@cindex @code{arc6} arc6, ARC
48*5f210c2aSfgsch@item arc6
49*5f210c2aSfgschJump-and-link (jl) instruction. No requirement of an instruction between
50*5f210c2aSfgschsetting flags and conditional jump. For example:
51*5f210c2aSfgsch
52*5f210c2aSfgsch@smallexample
53*5f210c2aSfgsch  mov.f r0,r1
54*5f210c2aSfgsch  beq   foo
55*5f210c2aSfgsch@end smallexample
56*5f210c2aSfgsch
57*5f210c2aSfgsch@cindex @code{arc7} arc7, ARC
58*5f210c2aSfgsch@item arc7
59*5f210c2aSfgschBreak (brk) and sleep (sleep) instructions.
60*5f210c2aSfgsch
61*5f210c2aSfgsch@cindex @code{arc8} arc8, ARC
62*5f210c2aSfgsch@item arc8
63*5f210c2aSfgschSoftware interrupt (swi) instruction.
64*5f210c2aSfgsch
65*5f210c2aSfgsch@end table
66*5f210c2aSfgsch
67*5f210c2aSfgschNote: the @code{.option} directive can to be used to select a core
68*5f210c2aSfgschvariant from within assembly code.
69*5f210c2aSfgsch
70*5f210c2aSfgsch@cindex @code{-EB} command line option, ARC
71*5f210c2aSfgsch@item -EB
72*5f210c2aSfgschThis option specifies that the output generated by the assembler should
73*5f210c2aSfgschbe marked as being encoded for a big-endian processor.
74*5f210c2aSfgsch
75*5f210c2aSfgsch@cindex @code{-EL} command line option, ARC
76*5f210c2aSfgsch@item -EL
77*5f210c2aSfgschThis option specifies that the output generated by the assembler should
78*5f210c2aSfgschbe marked as being encoded for a little-endian processor - this is the
79*5f210c2aSfgschdefault.
80*5f210c2aSfgsch
81*5f210c2aSfgsch@end table
82*5f210c2aSfgsch
83*5f210c2aSfgsch
84*5f210c2aSfgsch@node ARC Syntax
85*5f210c2aSfgsch@section Syntax
86*5f210c2aSfgsch@menu
87*5f210c2aSfgsch* ARC-Chars::                Special Characters
88*5f210c2aSfgsch* ARC-Regs::                 Register Names
89*5f210c2aSfgsch@end menu
90*5f210c2aSfgsch
91*5f210c2aSfgsch@node ARC-Chars
92*5f210c2aSfgsch@subsection Special Characters
93*5f210c2aSfgsch
94*5f210c2aSfgsch@cindex ARC special characters
95*5f210c2aSfgsch@cindex special characters, ARC
96*5f210c2aSfgsch*TODO*
97*5f210c2aSfgsch
98*5f210c2aSfgsch@node ARC-Regs
99*5f210c2aSfgsch@subsection Register Names
100*5f210c2aSfgsch
101*5f210c2aSfgsch@cindex ARC register names
102*5f210c2aSfgsch@cindex register names, ARC
103*5f210c2aSfgsch*TODO*
104*5f210c2aSfgsch
105*5f210c2aSfgsch
106*5f210c2aSfgsch@node ARC Floating Point
107*5f210c2aSfgsch@section Floating Point
108*5f210c2aSfgsch
109*5f210c2aSfgsch@cindex floating point, ARC (@sc{ieee})
110*5f210c2aSfgsch@cindex ARC floating point (@sc{ieee})
111*5f210c2aSfgschThe ARC core does not currently have hardware floating point
112*5f210c2aSfgschsupport. Software floating point support is provided by @code{GCC}
113*5f210c2aSfgschand uses @sc{ieee} floating-point numbers.
114*5f210c2aSfgsch
115*5f210c2aSfgsch
116*5f210c2aSfgsch@node ARC Directives
117*5f210c2aSfgsch@section ARC Machine Directives
118*5f210c2aSfgsch
119*5f210c2aSfgsch@cindex machine directives, ARC
120*5f210c2aSfgsch@cindex ARC machine directives
121*5f210c2aSfgschThe ARC version of @code{@value{AS}} supports the following additional
122*5f210c2aSfgschmachine directives:
123*5f210c2aSfgsch
124*5f210c2aSfgsch@table @code
125*5f210c2aSfgsch
126*5f210c2aSfgsch@cindex @code{2byte} directive, ARC
127*5f210c2aSfgsch@item .2byte @var{expressions}
128*5f210c2aSfgsch*TODO*
129*5f210c2aSfgsch
130*5f210c2aSfgsch@cindex @code{3byte} directive, ARC
131*5f210c2aSfgsch@item .3byte @var{expressions}
132*5f210c2aSfgsch*TODO*
133*5f210c2aSfgsch
134*5f210c2aSfgsch@cindex @code{4byte} directive, ARC
135*5f210c2aSfgsch@item .4byte @var{expressions}
136*5f210c2aSfgsch*TODO*
137*5f210c2aSfgsch
138*5f210c2aSfgsch@cindex @code{extAuxRegister} directive, ARC
139*5f210c2aSfgsch@item .extAuxRegister @var{name},@var{address},@var{mode}
140*5f210c2aSfgsch*TODO*
141*5f210c2aSfgsch
142*5f210c2aSfgsch@smallexample
143*5f210c2aSfgsch  .extAuxRegister mulhi,0x12,w
144*5f210c2aSfgsch@end smallexample
145*5f210c2aSfgsch
146*5f210c2aSfgsch@cindex @code{extCondCode} directive, ARC
147*5f210c2aSfgsch@item .extCondCode @var{suffix},@var{value}
148*5f210c2aSfgsch*TODO*
149*5f210c2aSfgsch
150*5f210c2aSfgsch@smallexample
151*5f210c2aSfgsch  .extCondCode is_busy,0x14
152*5f210c2aSfgsch@end smallexample
153*5f210c2aSfgsch
154*5f210c2aSfgsch@cindex @code{extCoreRegister} directive, ARC
155*5f210c2aSfgsch@item .extCoreRegister @var{name},@var{regnum},@var{mode},@var{shortcut}
156*5f210c2aSfgsch*TODO*
157*5f210c2aSfgsch
158*5f210c2aSfgsch@smallexample
159*5f210c2aSfgsch  .extCoreRegister mlo,57,r,can_shortcut
160*5f210c2aSfgsch@end smallexample
161*5f210c2aSfgsch
162*5f210c2aSfgsch@cindex @code{extInstruction} directive, ARC
163*5f210c2aSfgsch@item .extInstruction @var{name},@var{opcode},@var{subopcode},@var{suffixclass},@var{syntaxclass}
164*5f210c2aSfgsch*TODO*
165*5f210c2aSfgsch
166*5f210c2aSfgsch@smallexample
167*5f210c2aSfgsch  .extInstruction mul64,0x14,0x0,SUFFIX_COND,SYNTAX_3OP|OP1_MUST_BE_IMM
168*5f210c2aSfgsch@end smallexample
169*5f210c2aSfgsch
170*5f210c2aSfgsch@cindex @code{half} directive, ARC
171*5f210c2aSfgsch@item .half @var{expressions}
172*5f210c2aSfgsch*TODO*
173*5f210c2aSfgsch
174*5f210c2aSfgsch@cindex @code{long} directive, ARC
175*5f210c2aSfgsch@item .long @var{expressions}
176*5f210c2aSfgsch*TODO*
177*5f210c2aSfgsch
178*5f210c2aSfgsch@cindex @code{option} directive, ARC
179*5f210c2aSfgsch@item .option @var{arc|arc5|arc6|arc7|arc8}
180*5f210c2aSfgschThe @code{.option} directive must be followed by the desired core
181*5f210c2aSfgschversion. Again @code{arc} is an alias for
182*5f210c2aSfgsch@code{arc@value{ARC_CORE_DEFAULT}}.
183*5f210c2aSfgsch
184*5f210c2aSfgschNote: the @code{.option} directive overrides the command line option
185*5f210c2aSfgsch@code{-marc}; a warning is emitted when the version is not consistent
186*5f210c2aSfgschbetween the two - even for the implicit default core version
187*5f210c2aSfgsch(arc@value{ARC_CORE_DEFAULT}).
188*5f210c2aSfgsch
189*5f210c2aSfgsch@cindex @code{short} directive, ARC
190*5f210c2aSfgsch@item .short @var{expressions}
191*5f210c2aSfgsch*TODO*
192*5f210c2aSfgsch
193*5f210c2aSfgsch@cindex @code{word} directive, ARC
194*5f210c2aSfgsch@item .word @var{expressions}
195*5f210c2aSfgsch*TODO*
196*5f210c2aSfgsch
197*5f210c2aSfgsch@end table
198*5f210c2aSfgsch
199*5f210c2aSfgsch
200*5f210c2aSfgsch@node ARC Opcodes
201*5f210c2aSfgsch@section Opcodes
202*5f210c2aSfgsch
203*5f210c2aSfgsch@cindex ARC opcodes
204*5f210c2aSfgsch@cindex opcodes for ARC
205*5f210c2aSfgsch
206*5f210c2aSfgschFor information on the ARC instruction set, see @cite{ARC Programmers
207*5f210c2aSfgschReference Manual}, ARC Cores Ltd.
208