1 /* M32R-specific support for 32-bit ELF. 2 Copyright (C) 1996, 1997 Free Software Foundation, Inc. 3 4 This file is part of BFD, the Binary File Descriptor library. 5 6 This program is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 2 of the License, or 9 (at your option) any later version. 10 11 This program is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with this program; if not, write to the Free Software 18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 19 20 #include "bfd.h" 21 #include "sysdep.h" 22 #include "libbfd.h" 23 #include "elf-bfd.h" 24 #include "elf/m32r.h" 25 26 static bfd_reloc_status_type m32r_elf_10_pcrel_reloc 27 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **)); 28 static bfd_reloc_status_type m32r_elf_do_10_pcrel_reloc 29 PARAMS ((bfd *, reloc_howto_type *, asection *, 30 bfd_byte *, bfd_vma, asection *, bfd_vma, bfd_vma)); 31 static bfd_reloc_status_type m32r_elf_hi16_reloc 32 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **)); 33 static void m32r_elf_relocate_hi16 34 PARAMS ((bfd *, int, Elf_Internal_Rela *, Elf_Internal_Rela *, 35 bfd_byte *, bfd_vma)); 36 bfd_reloc_status_type m32r_elf_lo16_reloc 37 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **)); 38 static bfd_reloc_status_type m32r_elf_sda16_reloc 39 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **)); 40 static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup 41 PARAMS ((bfd *abfd, bfd_reloc_code_real_type code)); 42 static void m32r_info_to_howto_rel 43 PARAMS ((bfd *, arelent *, Elf32_Internal_Rel *)); 44 boolean _bfd_m32r_elf_section_from_bfd_section 45 PARAMS ((bfd *, Elf32_Internal_Shdr *, asection *, int *)); 46 void _bfd_m32r_elf_symbol_processing 47 PARAMS ((bfd *, asymbol *)); 48 static boolean m32r_elf_add_symbol_hook 49 PARAMS ((bfd *, struct bfd_link_info *, const Elf_Internal_Sym *, 50 const char **, flagword *, asection **, bfd_vma *)); 51 static boolean m32r_elf_relocate_section 52 PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *, 53 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **)); 54 #if 0 /* not yet */ 55 static boolean m32r_elf_relax_delete_bytes 56 PARAMS ((bfd *, asection *, bfd_vma, int)); 57 #endif 58 59 /* Use REL instead of RELA to save space. 60 This only saves space in libraries and object files, but perhaps 61 relocs will be put in ROM? All in all though, REL relocs are a pain 62 to work with. */ 63 #define USE_REL 64 65 static reloc_howto_type m32r_elf_howto_table[] = 66 { 67 /* This reloc does nothing. */ 68 HOWTO (R_M32R_NONE, /* type */ 69 0, /* rightshift */ 70 2, /* size (0 = byte, 1 = short, 2 = long) */ 71 32, /* bitsize */ 72 false, /* pc_relative */ 73 0, /* bitpos */ 74 complain_overflow_bitfield, /* complain_on_overflow */ 75 bfd_elf_generic_reloc, /* special_function */ 76 "R_M32R_NONE", /* name */ 77 false, /* partial_inplace */ 78 0, /* src_mask */ 79 0, /* dst_mask */ 80 false), /* pcrel_offset */ 81 82 /* A 16 bit absolute relocation. */ 83 HOWTO (R_M32R_16, /* type */ 84 0, /* rightshift */ 85 1, /* size (0 = byte, 1 = short, 2 = long) */ 86 16, /* bitsize */ 87 false, /* pc_relative */ 88 0, /* bitpos */ 89 complain_overflow_bitfield, /* complain_on_overflow */ 90 bfd_elf_generic_reloc, /* special_function */ 91 "R_M32R_16", /* name */ 92 true, /* partial_inplace */ 93 0xffff, /* src_mask */ 94 0xffff, /* dst_mask */ 95 false), /* pcrel_offset */ 96 97 /* A 32 bit absolute relocation. */ 98 HOWTO (R_M32R_32, /* type */ 99 0, /* rightshift */ 100 2, /* size (0 = byte, 1 = short, 2 = long) */ 101 32, /* bitsize */ 102 false, /* pc_relative */ 103 0, /* bitpos */ 104 complain_overflow_bitfield, /* complain_on_overflow */ 105 bfd_elf_generic_reloc, /* special_function */ 106 "R_M32R_32", /* name */ 107 true, /* partial_inplace */ 108 0xffffffff, /* src_mask */ 109 0xffffffff, /* dst_mask */ 110 false), /* pcrel_offset */ 111 112 /* A 24 bit address. */ 113 HOWTO (R_M32R_24, /* type */ 114 0, /* rightshift */ 115 2, /* size (0 = byte, 1 = short, 2 = long) */ 116 24, /* bitsize */ 117 false, /* pc_relative */ 118 0, /* bitpos */ 119 complain_overflow_unsigned, /* complain_on_overflow */ 120 bfd_elf_generic_reloc, /* special_function */ 121 "R_M32R_24", /* name */ 122 true, /* partial_inplace */ 123 0xffffff, /* src_mask */ 124 0xffffff, /* dst_mask */ 125 false), /* pcrel_offset */ 126 127 /* An PC Relative 10-bit relocation, shifted by 2. 128 This reloc is complicated because relocations are relative to pc & -4. 129 i.e. branches in the right insn slot use the address of the left insn 130 slot for pc. */ 131 /* ??? It's not clear whether this should have partial_inplace set or not. 132 Branch relaxing in the assembler can store the addend in the insn, 133 and if bfd_install_relocation gets called the addend may get added 134 again. */ 135 HOWTO (R_M32R_10_PCREL, /* type */ 136 2, /* rightshift */ 137 1, /* size (0 = byte, 1 = short, 2 = long) */ 138 10, /* bitsize */ 139 true, /* pc_relative */ 140 0, /* bitpos */ 141 complain_overflow_signed, /* complain_on_overflow */ 142 m32r_elf_10_pcrel_reloc, /* special_function */ 143 "R_M32R_10_PCREL", /* name */ 144 false, /* partial_inplace */ 145 0xff, /* src_mask */ 146 0xff, /* dst_mask */ 147 true), /* pcrel_offset */ 148 149 /* A relative 18 bit relocation, right shifted by 2. */ 150 HOWTO (R_M32R_18_PCREL, /* type */ 151 2, /* rightshift */ 152 2, /* size (0 = byte, 1 = short, 2 = long) */ 153 18, /* bitsize */ 154 true, /* pc_relative */ 155 0, /* bitpos */ 156 complain_overflow_signed, /* complain_on_overflow */ 157 bfd_elf_generic_reloc, /* special_function */ 158 "R_M32R_18_PCREL", /* name */ 159 false, /* partial_inplace */ 160 0xffff, /* src_mask */ 161 0xffff, /* dst_mask */ 162 true), /* pcrel_offset */ 163 164 /* A relative 26 bit relocation, right shifted by 2. */ 165 /* ??? It's not clear whether this should have partial_inplace set or not. 166 Branch relaxing in the assembler can store the addend in the insn, 167 and if bfd_install_relocation gets called the addend may get added 168 again. */ 169 HOWTO (R_M32R_26_PCREL, /* type */ 170 2, /* rightshift */ 171 2, /* size (0 = byte, 1 = short, 2 = long) */ 172 26, /* bitsize */ 173 true, /* pc_relative */ 174 0, /* bitpos */ 175 complain_overflow_signed, /* complain_on_overflow */ 176 bfd_elf_generic_reloc, /* special_function */ 177 "R_M32R_26_PCREL", /* name */ 178 false, /* partial_inplace */ 179 0xffffff, /* src_mask */ 180 0xffffff, /* dst_mask */ 181 true), /* pcrel_offset */ 182 183 /* High 16 bits of address when lower 16 is or'd in. */ 184 HOWTO (R_M32R_HI16_ULO, /* type */ 185 16, /* rightshift */ 186 2, /* size (0 = byte, 1 = short, 2 = long) */ 187 16, /* bitsize */ 188 false, /* pc_relative */ 189 0, /* bitpos */ 190 complain_overflow_dont, /* complain_on_overflow */ 191 m32r_elf_hi16_reloc, /* special_function */ 192 "R_M32R_HI16_ULO", /* name */ 193 true, /* partial_inplace */ 194 0x0000ffff, /* src_mask */ 195 0x0000ffff, /* dst_mask */ 196 false), /* pcrel_offset */ 197 198 /* High 16 bits of address when lower 16 is added in. */ 199 HOWTO (R_M32R_HI16_SLO, /* type */ 200 16, /* rightshift */ 201 2, /* size (0 = byte, 1 = short, 2 = long) */ 202 16, /* bitsize */ 203 false, /* pc_relative */ 204 0, /* bitpos */ 205 complain_overflow_dont, /* complain_on_overflow */ 206 m32r_elf_hi16_reloc, /* special_function */ 207 "R_M32R_HI16_SLO", /* name */ 208 true, /* partial_inplace */ 209 0x0000ffff, /* src_mask */ 210 0x0000ffff, /* dst_mask */ 211 false), /* pcrel_offset */ 212 213 /* Lower 16 bits of address. */ 214 HOWTO (R_M32R_LO16, /* type */ 215 0, /* rightshift */ 216 2, /* size (0 = byte, 1 = short, 2 = long) */ 217 16, /* bitsize */ 218 false, /* pc_relative */ 219 0, /* bitpos */ 220 complain_overflow_dont, /* complain_on_overflow */ 221 m32r_elf_lo16_reloc, /* special_function */ 222 "R_M32R_LO16", /* name */ 223 true, /* partial_inplace */ 224 0x0000ffff, /* src_mask */ 225 0x0000ffff, /* dst_mask */ 226 false), /* pcrel_offset */ 227 228 /* Small data area 16 bits offset. */ 229 HOWTO (R_M32R_SDA16, /* type */ 230 0, /* rightshift */ 231 2, /* size (0 = byte, 1 = short, 2 = long) */ 232 16, /* bitsize */ 233 false, /* pc_relative */ 234 0, /* bitpos */ 235 complain_overflow_signed, /* complain_on_overflow */ 236 m32r_elf_sda16_reloc, /* special_function */ 237 "R_M32R_SDA16", /* name */ 238 true, /* partial_inplace */ /* FIXME: correct? */ 239 0x0000ffff, /* src_mask */ 240 0x0000ffff, /* dst_mask */ 241 false), /* pcrel_offset */ 242 }; 243 244 /* Handle the R_M32R_10_PCREL reloc. */ 245 246 static bfd_reloc_status_type 247 m32r_elf_10_pcrel_reloc (abfd, reloc_entry, symbol, data, 248 input_section, output_bfd, error_message) 249 bfd *abfd; 250 arelent *reloc_entry; 251 asymbol *symbol; 252 PTR data; 253 asection *input_section; 254 bfd *output_bfd; 255 char **error_message; 256 { 257 /* This part is from bfd_elf_generic_reloc. */ 258 if (output_bfd != (bfd *) NULL 259 && (symbol->flags & BSF_SECTION_SYM) == 0 260 && (! reloc_entry->howto->partial_inplace 261 || reloc_entry->addend == 0)) 262 { 263 reloc_entry->address += input_section->output_offset; 264 return bfd_reloc_ok; 265 } 266 267 if (output_bfd != NULL) 268 { 269 /* FIXME: See bfd_perform_relocation. Is this right? */ 270 return bfd_reloc_continue; 271 } 272 273 return m32r_elf_do_10_pcrel_reloc (abfd, reloc_entry->howto, 274 input_section, 275 data, reloc_entry->address, 276 symbol->section, 277 (symbol->value 278 + symbol->section->output_section->vma 279 + symbol->section->output_offset), 280 reloc_entry->addend); 281 } 282 283 /* Utility to actually perform an R_M32R_10_PCREL reloc. */ 284 285 static bfd_reloc_status_type 286 m32r_elf_do_10_pcrel_reloc (abfd, howto, input_section, data, offset, 287 symbol_section, symbol_value, addend) 288 bfd *abfd; 289 reloc_howto_type *howto; 290 asection *input_section; 291 bfd_byte *data; 292 bfd_vma offset; 293 asection *symbol_section; 294 bfd_vma symbol_value; 295 bfd_vma addend; 296 { 297 bfd_signed_vma relocation; 298 unsigned long x; 299 bfd_reloc_status_type status; 300 301 /* Sanity check the address (offset in section). */ 302 if (offset > input_section->_cooked_size) 303 return bfd_reloc_outofrange; 304 305 relocation = symbol_value + addend; 306 /* Make it pc relative. */ 307 relocation -= (input_section->output_section->vma 308 + input_section->output_offset); 309 /* These jumps mask off the lower two bits of the current address 310 before doing pcrel calculations. */ 311 relocation -= (offset & -4L); 312 313 if (relocation < -0x200 || relocation > 0x1ff) 314 status = bfd_reloc_overflow; 315 else 316 status = bfd_reloc_ok; 317 318 x = bfd_get_16 (abfd, data + offset); 319 relocation >>= howto->rightshift; 320 relocation <<= howto->bitpos; 321 x = (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask); 322 bfd_put_16 (abfd, x, data + offset); 323 324 return status; 325 } 326 327 /* Handle the R_M32R_HI16_[SU]LO relocs. 328 HI16_SLO is for the add3 and load/store with displacement instructions. 329 HI16_ULO is for the or3 instruction. 330 For R_M32R_HI16_SLO, the lower 16 bits are sign extended when added to 331 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then 332 we must add one to the high 16 bytes (which will get subtracted off when 333 the low 16 bits are added). 334 These relocs have to be done in combination with an R_M32R_LO16 reloc 335 because there is a carry from the LO16 to the HI16. Here we just save 336 the information we need; we do the actual relocation when we see the LO16. 337 This code is copied from the elf32-mips.c. We also support an arbitrary 338 number of HI16 relocs to be associated with a single LO16 reloc. The 339 assembler sorts the relocs to ensure each HI16 immediately precedes its 340 LO16. However if there are multiple copies, the assembler may not find 341 the real LO16 so it picks the first one it finds. */ 342 343 struct m32r_hi16 344 { 345 struct m32r_hi16 *next; 346 bfd_byte *addr; 347 bfd_vma addend; 348 }; 349 350 /* FIXME: This should not be a static variable. */ 351 352 static struct m32r_hi16 *m32r_hi16_list; 353 354 static bfd_reloc_status_type 355 m32r_elf_hi16_reloc (abfd, reloc_entry, symbol, data, 356 input_section, output_bfd, error_message) 357 bfd *abfd; 358 arelent *reloc_entry; 359 asymbol *symbol; 360 PTR data; 361 asection *input_section; 362 bfd *output_bfd; 363 char **error_message; 364 { 365 bfd_reloc_status_type ret; 366 bfd_vma relocation; 367 struct m32r_hi16 *n; 368 369 /* This part is from bfd_elf_generic_reloc. 370 If we're relocating, and this an external symbol, we don't want 371 to change anything. */ 372 if (output_bfd != (bfd *) NULL 373 && (symbol->flags & BSF_SECTION_SYM) == 0 374 && reloc_entry->addend == 0) 375 { 376 reloc_entry->address += input_section->output_offset; 377 return bfd_reloc_ok; 378 } 379 380 /* Sanity check the address (offset in section). */ 381 if (reloc_entry->address > input_section->_cooked_size) 382 return bfd_reloc_outofrange; 383 384 ret = bfd_reloc_ok; 385 if (bfd_is_und_section (symbol->section) 386 && output_bfd == (bfd *) NULL) 387 ret = bfd_reloc_undefined; 388 389 if (bfd_is_com_section (symbol->section)) 390 relocation = 0; 391 else 392 relocation = symbol->value; 393 394 relocation += symbol->section->output_section->vma; 395 relocation += symbol->section->output_offset; 396 relocation += reloc_entry->addend; 397 398 /* Save the information, and let LO16 do the actual relocation. */ 399 n = (struct m32r_hi16 *) bfd_malloc (sizeof *n); 400 if (n == NULL) 401 return bfd_reloc_outofrange; 402 n->addr = (bfd_byte *) data + reloc_entry->address; 403 n->addend = relocation; 404 n->next = m32r_hi16_list; 405 m32r_hi16_list = n; 406 407 if (output_bfd != (bfd *) NULL) 408 reloc_entry->address += input_section->output_offset; 409 410 return ret; 411 } 412 413 /* Handle an M32R ELF HI16 reloc. */ 414 415 static void 416 m32r_elf_relocate_hi16 (input_bfd, type, relhi, rello, contents, addend) 417 bfd *input_bfd; 418 int type; 419 Elf_Internal_Rela *relhi; 420 Elf_Internal_Rela *rello; 421 bfd_byte *contents; 422 bfd_vma addend; 423 { 424 unsigned long insn; 425 bfd_vma addlo; 426 427 insn = bfd_get_32 (input_bfd, contents + relhi->r_offset); 428 429 addlo = bfd_get_32 (input_bfd, contents + rello->r_offset); 430 if (type == R_M32R_HI16_SLO) 431 addlo = ((addlo & 0xffff) ^ 0x8000) - 0x8000; 432 else 433 addlo &= 0xffff; 434 435 addend += ((insn & 0xffff) << 16) + addlo; 436 437 /* Reaccount for sign extension of low part. */ 438 if (type == R_M32R_HI16_SLO 439 && (addend & 0x8000) != 0) 440 addend += 0x10000; 441 442 bfd_put_32 (input_bfd, 443 (insn & 0xffff0000) | ((addend >> 16) & 0xffff), 444 contents + relhi->r_offset); 445 } 446 447 /* Do an R_M32R_LO16 relocation. This is a straightforward 16 bit 448 inplace relocation; this function exists in order to do the 449 R_M32R_HI16_[SU]LO relocation described above. */ 450 451 bfd_reloc_status_type 452 m32r_elf_lo16_reloc (abfd, reloc_entry, symbol, data, 453 input_section, output_bfd, error_message) 454 bfd *abfd; 455 arelent *reloc_entry; 456 asymbol *symbol; 457 PTR data; 458 asection *input_section; 459 bfd *output_bfd; 460 char **error_message; 461 { 462 if (m32r_hi16_list != NULL) 463 { 464 struct m32r_hi16 *l; 465 466 l = m32r_hi16_list; 467 while (l != NULL) 468 { 469 unsigned long insn; 470 unsigned long val; 471 unsigned long vallo; 472 struct m32r_hi16 *next; 473 474 /* Do the HI16 relocation. Note that we actually don't need 475 to know anything about the LO16 itself, except where to 476 find the low 16 bits of the addend needed by the LO16. */ 477 insn = bfd_get_32 (abfd, l->addr); 478 vallo = ((bfd_get_32 (abfd, (bfd_byte *) data + reloc_entry->address) 479 & 0xffff) ^ 0x8000) - 0x8000; 480 val = ((insn & 0xffff) << 16) + vallo; 481 val += l->addend; 482 483 /* Reaccount for sign extension of low part. */ 484 if ((val & 0x8000) != 0) 485 val += 0x10000; 486 487 insn = (insn &~ 0xffff) | ((val >> 16) & 0xffff); 488 bfd_put_32 (abfd, insn, l->addr); 489 490 next = l->next; 491 free (l); 492 l = next; 493 } 494 495 m32r_hi16_list = NULL; 496 } 497 498 /* Now do the LO16 reloc in the usual way. */ 499 return bfd_elf_generic_reloc (abfd, reloc_entry, symbol, data, 500 input_section, output_bfd, error_message); 501 } 502 503 /* Handle the R_M32R_SDA16 reloc. 504 This reloc is used to compute the address of objects in the small data area 505 and to perform loads and stores from that area. 506 The lower 16 bits are sign extended and added to the register specified 507 in the instruction, which is assumed to point to _SDA_BASE_. */ 508 509 static bfd_reloc_status_type 510 m32r_elf_sda16_reloc (abfd, reloc_entry, symbol, data, 511 input_section, output_bfd, error_message) 512 bfd *abfd; 513 arelent *reloc_entry; 514 asymbol *symbol; 515 PTR data; 516 asection *input_section; 517 bfd *output_bfd; 518 char **error_message; 519 { 520 bfd_vma sda_base; 521 unsigned long x; 522 reloc_howto_type *howto; 523 524 /* This part is from bfd_elf_generic_reloc. */ 525 if (output_bfd != (bfd *) NULL 526 && (symbol->flags & BSF_SECTION_SYM) == 0 527 && (! reloc_entry->howto->partial_inplace 528 || reloc_entry->addend == 0)) 529 { 530 reloc_entry->address += input_section->output_offset; 531 return bfd_reloc_ok; 532 } 533 534 if (output_bfd != NULL) 535 { 536 /* FIXME: See bfd_perform_relocation. Is this right? */ 537 return bfd_reloc_continue; 538 } 539 540 /* FIXME: not sure what to do here yet. But then again, the linker 541 may never call us. */ 542 abort (); 543 } 544 545 /* Map BFD reloc types to M32R ELF reloc types. */ 546 547 struct m32r_reloc_map 548 { 549 unsigned char bfd_reloc_val; 550 unsigned char elf_reloc_val; 551 }; 552 553 static const struct m32r_reloc_map m32r_reloc_map[] = 554 { 555 { BFD_RELOC_NONE, R_M32R_NONE }, 556 { BFD_RELOC_16, R_M32R_16 }, 557 { BFD_RELOC_32, R_M32R_32 }, 558 { BFD_RELOC_M32R_24, R_M32R_24 }, 559 { BFD_RELOC_M32R_10_PCREL, R_M32R_10_PCREL }, 560 { BFD_RELOC_M32R_18_PCREL, R_M32R_18_PCREL }, 561 { BFD_RELOC_M32R_26_PCREL, R_M32R_26_PCREL }, 562 { BFD_RELOC_M32R_HI16_ULO, R_M32R_HI16_ULO }, 563 { BFD_RELOC_M32R_HI16_SLO, R_M32R_HI16_SLO }, 564 { BFD_RELOC_M32R_LO16, R_M32R_LO16 }, 565 { BFD_RELOC_M32R_SDA16, R_M32R_SDA16 }, 566 }; 567 568 static reloc_howto_type * 569 bfd_elf32_bfd_reloc_type_lookup (abfd, code) 570 bfd *abfd; 571 bfd_reloc_code_real_type code; 572 { 573 unsigned int i; 574 575 for (i = 0; 576 i < sizeof (m32r_reloc_map) / sizeof (struct m32r_reloc_map); 577 i++) 578 { 579 if (m32r_reloc_map[i].bfd_reloc_val == code) 580 return &m32r_elf_howto_table[m32r_reloc_map[i].elf_reloc_val]; 581 } 582 583 return NULL; 584 } 585 586 /* Set the howto pointer for an M32R ELF reloc. */ 587 588 static void 589 m32r_info_to_howto_rel (abfd, cache_ptr, dst) 590 bfd *abfd; 591 arelent *cache_ptr; 592 Elf32_Internal_Rel *dst; 593 { 594 unsigned int r_type; 595 596 r_type = ELF32_R_TYPE (dst->r_info); 597 BFD_ASSERT (r_type < (unsigned int) R_M32R_max); 598 cache_ptr->howto = &m32r_elf_howto_table[r_type]; 599 } 600 601 /* Given a BFD section, try to locate the corresponding ELF section 602 index. */ 603 604 boolean 605 _bfd_m32r_elf_section_from_bfd_section (abfd, hdr, sec, retval) 606 bfd *abfd; 607 Elf32_Internal_Shdr *hdr; 608 asection *sec; 609 int *retval; 610 { 611 if (strcmp (bfd_get_section_name (abfd, sec), ".scommon") == 0) 612 { 613 *retval = SHN_M32R_SCOMMON; 614 return true; 615 } 616 return false; 617 } 618 619 /* M32R ELF uses two common sections. One is the usual one, and the other 620 is for small objects. All the small objects are kept together, and then 621 referenced via one register, which yields faster assembler code. It is 622 up to the compiler to emit an instruction to load the register with 623 _SDA_BASE. This is what we use for the small common section. This 624 approach is copied from elf32-mips.c. */ 625 static asection m32r_elf_scom_section; 626 static asymbol m32r_elf_scom_symbol; 627 static asymbol *m32r_elf_scom_symbol_ptr; 628 629 /* Handle the special M32R section numbers that a symbol may use. */ 630 631 void 632 _bfd_m32r_elf_symbol_processing (abfd, asym) 633 bfd *abfd; 634 asymbol *asym; 635 { 636 elf_symbol_type *elfsym; 637 638 elfsym = (elf_symbol_type *) asym; 639 640 switch (elfsym->internal_elf_sym.st_shndx) 641 { 642 case SHN_M32R_SCOMMON: 643 if (m32r_elf_scom_section.name == NULL) 644 { 645 /* Initialize the small common section. */ 646 m32r_elf_scom_section.name = ".scommon"; 647 m32r_elf_scom_section.flags = SEC_IS_COMMON; 648 m32r_elf_scom_section.output_section = &m32r_elf_scom_section; 649 m32r_elf_scom_section.symbol = &m32r_elf_scom_symbol; 650 m32r_elf_scom_section.symbol_ptr_ptr = &m32r_elf_scom_symbol_ptr; 651 m32r_elf_scom_symbol.name = ".scommon"; 652 m32r_elf_scom_symbol.flags = BSF_SECTION_SYM; 653 m32r_elf_scom_symbol.section = &m32r_elf_scom_section; 654 m32r_elf_scom_symbol_ptr = &m32r_elf_scom_symbol; 655 } 656 asym->section = &m32r_elf_scom_section; 657 asym->value = elfsym->internal_elf_sym.st_size; 658 break; 659 } 660 } 661 662 /* Hook called by the linker routine which adds symbols from an object 663 file. We must handle the special M32R section numbers here. 664 We also keep watching for whether we need to create the sdata special 665 linker sections. */ 666 667 static boolean 668 m32r_elf_add_symbol_hook (abfd, info, sym, namep, flagsp, secp, valp) 669 bfd *abfd; 670 struct bfd_link_info *info; 671 const Elf_Internal_Sym *sym; 672 const char **namep; 673 flagword *flagsp; 674 asection **secp; 675 bfd_vma *valp; 676 { 677 if (! info->relocateable 678 && (*namep)[0] == '_' && (*namep)[1] == 'S' 679 && strcmp (*namep, "_SDA_BASE_") == 0) 680 { 681 /* This is simpler than using _bfd_elf_create_linker_section 682 (our needs are simpler than ppc's needs). Also 683 _bfd_elf_create_linker_section currently has a bug where if a .sdata 684 section already exists a new one is created that follows it which 685 screws of _SDA_BASE_ address calcs because output_offset != 0. */ 686 struct elf_link_hash_entry *h; 687 asection *s = bfd_get_section_by_name (abfd, ".sdata"); 688 689 /* The following code was cobbled from elf32-ppc.c and elflink.c. */ 690 691 if (s == NULL) 692 { 693 int flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS 694 | SEC_IN_MEMORY | SEC_LINKER_CREATED); 695 696 s = bfd_make_section_anyway (abfd, ".sdata"); 697 if (s == NULL) 698 return false; 699 bfd_set_section_flags (abfd, s, flags); 700 bfd_set_section_alignment (abfd, s, 2); 701 } 702 703 h = (struct elf_link_hash_entry *) 704 bfd_link_hash_lookup (info->hash, "_SDA_BASE_", false, false, false); 705 706 if ((h == NULL || h->root.type == bfd_link_hash_undefined) 707 && !(_bfd_generic_link_add_one_symbol (info, 708 abfd, 709 "_SDA_BASE_", 710 BSF_GLOBAL, 711 s, 712 32768, 713 (const char *) NULL, 714 false, 715 get_elf_backend_data (abfd)->collect, 716 (struct bfd_link_hash_entry **) &h))) 717 return false; 718 h->type = STT_OBJECT; 719 } 720 721 switch (sym->st_shndx) 722 { 723 case SHN_M32R_SCOMMON: 724 *secp = bfd_make_section_old_way (abfd, ".scommon"); 725 (*secp)->flags |= SEC_IS_COMMON; 726 *valp = sym->st_size; 727 break; 728 } 729 730 return true; 731 } 732 733 /* We have to figure out the SDA_BASE value, so that we can adjust the 734 symbol value correctly. We look up the symbol _SDA_BASE_ in the output 735 BFD. If we can't find it, we're stuck. We cache it in the ELF 736 target data. We don't need to adjust the symbol value for an 737 external symbol if we are producing relocateable output. */ 738 739 static bfd_reloc_status_type 740 m32r_elf_final_sda_base (output_bfd, info, error_message, psb) 741 bfd *output_bfd; 742 struct bfd_link_info *info; 743 const char **error_message; 744 bfd_vma *psb; 745 { 746 if (elf_gp (output_bfd) == 0) 747 { 748 struct bfd_link_hash_entry *h; 749 750 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", false, false, true); 751 if (h != (struct bfd_link_hash_entry *) NULL 752 && h->type == bfd_link_hash_defined) 753 elf_gp (output_bfd) = (h->u.def.value 754 + h->u.def.section->output_section->vma 755 + h->u.def.section->output_offset); 756 else 757 { 758 /* Only get the error once. */ 759 *psb = elf_gp (output_bfd) = 4; 760 *error_message = 761 (const char *) "SDA relocation when _SDA_BASE_ not defined"; 762 return bfd_reloc_dangerous; 763 } 764 } 765 *psb = elf_gp (output_bfd); 766 return bfd_reloc_ok; 767 } 768 769 /* Relocate an M32R/D ELF section. 770 There is some attempt to make this function usable for many architectures, 771 both USE_REL and USE_RELA ['twould be nice if such a critter existed], 772 if only to serve as a learning tool. 773 774 The RELOCATE_SECTION function is called by the new ELF backend linker 775 to handle the relocations for a section. 776 777 The relocs are always passed as Rela structures; if the section 778 actually uses Rel structures, the r_addend field will always be 779 zero. 780 781 This function is responsible for adjust the section contents as 782 necessary, and (if using Rela relocs and generating a 783 relocateable output file) adjusting the reloc addend as 784 necessary. 785 786 This function does not have to worry about setting the reloc 787 address or the reloc symbol index. 788 789 LOCAL_SYMS is a pointer to the swapped in local symbols. 790 791 LOCAL_SECTIONS is an array giving the section in the input file 792 corresponding to the st_shndx field of each local symbol. 793 794 The global hash table entry for the global symbols can be found 795 via elf_sym_hashes (input_bfd). 796 797 When generating relocateable output, this function must handle 798 STB_LOCAL/STT_SECTION symbols specially. The output symbol is 799 going to be the section symbol corresponding to the output 800 section, which means that the addend must be adjusted 801 accordingly. */ 802 803 static boolean 804 m32r_elf_relocate_section (output_bfd, info, input_bfd, input_section, 805 contents, relocs, local_syms, local_sections) 806 bfd *output_bfd; 807 struct bfd_link_info *info; 808 bfd *input_bfd; 809 asection *input_section; 810 bfd_byte *contents; 811 Elf_Internal_Rela *relocs; 812 Elf_Internal_Sym *local_syms; 813 asection **local_sections; 814 { 815 Elf_Internal_Shdr *symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; 816 struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (input_bfd); 817 Elf_Internal_Rela *rel, *relend; 818 bfd *dynobj = elf_hash_table (info)->dynobj; 819 /* Assume success. */ 820 boolean ret = true; 821 822 rel = relocs; 823 relend = relocs + input_section->reloc_count; 824 for (; rel < relend; rel++) 825 { 826 int r_type; 827 reloc_howto_type *howto; 828 unsigned long r_symndx; 829 /* We can't modify r_addend here as elf_link_input_bfd has an assert to 830 ensure it's zero (we use REL relocs, not RELA). Therefore this 831 should be assigning zero to `addend', but for clarity we use 832 `r_addend'. */ 833 bfd_vma addend = rel->r_addend; 834 bfd_vma offset = rel->r_offset; 835 struct elf_link_hash_entry *h; 836 Elf_Internal_Sym *sym; 837 asection *sec; 838 const char *sym_name; 839 bfd_reloc_status_type r; 840 const char *errmsg = NULL; 841 842 r_type = ELF32_R_TYPE (rel->r_info); 843 if (r_type < 0 || r_type >= (int) R_M32R_max) 844 { 845 (*_bfd_error_handler) ("%s: unknown relocation type %d", 846 bfd_get_filename (input_bfd), 847 (int) r_type); 848 bfd_set_error (bfd_error_bad_value); 849 ret = false; 850 continue; 851 } 852 853 howto = m32r_elf_howto_table + r_type; 854 r_symndx = ELF32_R_SYM (rel->r_info); 855 856 if (info->relocateable) 857 { 858 /* This is a relocateable link. We don't have to change 859 anything, unless the reloc is against a section symbol, 860 in which case we have to adjust according to where the 861 section symbol winds up in the output section. */ 862 sec = NULL; 863 if (r_symndx >= symtab_hdr->sh_info) 864 { 865 /* External symbol. */ 866 continue; 867 } 868 869 /* Local symbol. */ 870 sym = local_syms + r_symndx; 871 sym_name = "<local symbol>"; 872 /* STT_SECTION: symbol is associated with a section. */ 873 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION) 874 { 875 /* Symbol isn't associated with a section. Nothing to do. */ 876 continue; 877 } 878 879 sec = local_sections[r_symndx]; 880 addend += sec->output_offset + sym->st_value; 881 #ifndef USE_REL 882 /* This can't be done for USE_REL because it doesn't mean anything 883 and elf_link_input_bfd asserts this stays zero. */ 884 rel->r_addend = addend; 885 #endif 886 887 #ifndef USE_REL 888 /* Addends are stored with relocs. We're done. */ 889 continue; 890 #else /* USE_REL */ 891 /* If partial_inplace, we need to store any additional addend 892 back in the section. */ 893 if (! howto->partial_inplace) 894 continue; 895 /* ??? Here is a nice place to call a special_function 896 like handler. */ 897 if (r_type != R_M32R_HI16_SLO && r_type != R_M32R_HI16_ULO) 898 r = _bfd_relocate_contents (howto, input_bfd, 899 addend, contents + offset); 900 else 901 { 902 Elf_Internal_Rela *lorel; 903 904 /* We allow an arbitrary number of HI16 relocs before the 905 LO16 reloc. This permits gcc to emit the HI and LO relocs 906 itself. */ 907 for (lorel = rel + 1; 908 (lorel < relend 909 && (ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_SLO 910 || ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_ULO)); 911 lorel++) 912 continue; 913 if (lorel < relend 914 && ELF32_R_TYPE (lorel->r_info) == R_M32R_LO16) 915 { 916 m32r_elf_relocate_hi16 (input_bfd, r_type, rel, lorel, 917 contents, addend); 918 r = bfd_reloc_ok; 919 } 920 else 921 r = _bfd_relocate_contents (howto, input_bfd, 922 addend, contents + offset); 923 } 924 #endif /* USE_REL */ 925 } 926 else 927 { 928 bfd_vma relocation; 929 930 /* This is a final link. */ 931 h = NULL; 932 sym = NULL; 933 sec = NULL; 934 935 if (r_symndx < symtab_hdr->sh_info) 936 { 937 /* Local symbol. */ 938 sym = local_syms + r_symndx; 939 sec = local_sections[r_symndx]; 940 sym_name = "<local symbol>"; 941 relocation = (sec->output_section->vma 942 + sec->output_offset 943 + sym->st_value); 944 } 945 else 946 { 947 /* External symbol. */ 948 h = sym_hashes[r_symndx - symtab_hdr->sh_info]; 949 while (h->root.type == bfd_link_hash_indirect 950 || h->root.type == bfd_link_hash_warning) 951 h = (struct elf_link_hash_entry *) h->root.u.i.link; 952 sym_name = h->root.root.string; 953 954 if (h->root.type == bfd_link_hash_defined 955 || h->root.type == bfd_link_hash_defweak) 956 { 957 sec = h->root.u.def.section; 958 if (sec->output_section == NULL) 959 relocation = 0; 960 else 961 relocation = (h->root.u.def.value 962 + sec->output_section->vma 963 + sec->output_offset); 964 } 965 else if (h->root.type == bfd_link_hash_undefweak) 966 relocation = 0; 967 else 968 { 969 if (! ((*info->callbacks->undefined_symbol) 970 (info, h->root.root.string, input_bfd, 971 input_section, offset))) 972 return false; 973 relocation = 0; 974 } 975 } 976 977 /* Sanity check the address. */ 978 if (offset > input_section->_raw_size) 979 { 980 r = bfd_reloc_outofrange; 981 goto check_reloc; 982 } 983 984 switch ((int) r_type) 985 { 986 case (int) R_M32R_10_PCREL : 987 r = m32r_elf_do_10_pcrel_reloc (input_bfd, howto, input_section, 988 contents, offset, 989 sec, relocation, addend); 990 break; 991 992 case (int) R_M32R_HI16_SLO : 993 case (int) R_M32R_HI16_ULO : 994 { 995 Elf_Internal_Rela *lorel; 996 997 /* We allow an arbitrary number of HI16 relocs before the 998 LO16 reloc. This permits gcc to emit the HI and LO relocs 999 itself. */ 1000 for (lorel = rel + 1; 1001 (lorel < relend 1002 && (ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_SLO 1003 || ELF32_R_TYPE (lorel->r_info) == R_M32R_HI16_ULO)); 1004 lorel++) 1005 continue; 1006 if (lorel < relend 1007 && ELF32_R_TYPE (lorel->r_info) == R_M32R_LO16) 1008 { 1009 m32r_elf_relocate_hi16 (input_bfd, r_type, rel, lorel, 1010 contents, relocation + addend); 1011 r = bfd_reloc_ok; 1012 } 1013 else 1014 r = _bfd_final_link_relocate (howto, input_bfd, input_section, 1015 contents, offset, 1016 relocation, addend); 1017 } 1018 break; 1019 1020 case (int) R_M32R_SDA16 : 1021 { 1022 const char *name; 1023 1024 BFD_ASSERT (sec != NULL); 1025 name = bfd_get_section_name (abfd, sec); 1026 1027 if (strcmp (name, ".sdata") == 0 1028 || strcmp (name, ".sbss") == 0 1029 || strcmp (name, ".scommon") == 0) 1030 { 1031 bfd_vma sda_base; 1032 bfd *out_bfd = sec->output_section->owner; 1033 1034 r = m32r_elf_final_sda_base (out_bfd, info, 1035 &errmsg, 1036 &sda_base); 1037 if (r != bfd_reloc_ok) 1038 { 1039 ret = false; 1040 goto check_reloc; 1041 } 1042 1043 /* At this point `relocation' contains the object's 1044 address. */ 1045 relocation -= sda_base; 1046 /* Now it contains the offset from _SDA_BASE_. */ 1047 } 1048 else 1049 { 1050 (*_bfd_error_handler) ("%s: The target (%s) of an %s relocation is in the wrong section (%s)", 1051 bfd_get_filename (input_bfd), 1052 sym_name, 1053 m32r_elf_howto_table[(int) r_type].name, 1054 bfd_get_section_name (abfd, sec)); 1055 /*bfd_set_error (bfd_error_bad_value); ??? why? */ 1056 ret = false; 1057 continue; 1058 } 1059 } 1060 /* fall through */ 1061 1062 default : 1063 r = _bfd_final_link_relocate (howto, input_bfd, input_section, 1064 contents, offset, 1065 relocation, addend); 1066 break; 1067 } 1068 } 1069 1070 check_reloc: 1071 1072 if (r != bfd_reloc_ok) 1073 { 1074 /* FIXME: This should be generic enough to go in a utility. */ 1075 const char *name; 1076 1077 if (h != NULL) 1078 name = h->root.root.string; 1079 else 1080 { 1081 name = (bfd_elf_string_from_elf_section 1082 (input_bfd, symtab_hdr->sh_link, sym->st_name)); 1083 if (name == NULL || *name == '\0') 1084 name = bfd_section_name (input_bfd, sec); 1085 } 1086 1087 if (errmsg != NULL) 1088 goto common_error; 1089 1090 switch (r) 1091 { 1092 case bfd_reloc_overflow: 1093 if (! ((*info->callbacks->reloc_overflow) 1094 (info, name, howto->name, (bfd_vma) 0, 1095 input_bfd, input_section, offset))) 1096 return false; 1097 break; 1098 1099 case bfd_reloc_undefined: 1100 if (! ((*info->callbacks->undefined_symbol) 1101 (info, name, input_bfd, input_section, 1102 offset))) 1103 return false; 1104 break; 1105 1106 case bfd_reloc_outofrange: 1107 errmsg = "internal error: out of range error"; 1108 goto common_error; 1109 1110 case bfd_reloc_notsupported: 1111 errmsg = "internal error: unsupported relocation error"; 1112 goto common_error; 1113 1114 case bfd_reloc_dangerous: 1115 errmsg = "internal error: dangerous error"; 1116 goto common_error; 1117 1118 default: 1119 errmsg = "internal error: unknown error"; 1120 /* fall through */ 1121 1122 common_error: 1123 if (!((*info->callbacks->warning) 1124 (info, errmsg, name, input_bfd, input_section, 1125 offset))) 1126 return false; 1127 break; 1128 } 1129 } 1130 } 1131 1132 return ret; 1133 } 1134 1135 #if 0 /* relaxing not supported yet */ 1136 1137 /* This function handles relaxing for the m32r. 1138 Relaxing on the m32r is tricky because of instruction alignment 1139 requirements (4 byte instructions must be aligned on 4 byte boundaries). 1140 1141 The following relaxing opportunities are handled: 1142 1143 seth/add3/jl -> bl24 or bl8 1144 seth/add3 -> ld24 1145 1146 It would be nice to handle bl24 -> bl8 but given: 1147 1148 - 4 byte insns must be on 4 byte boundaries 1149 - branch instructions only branch to insns on 4 byte boundaries 1150 1151 this isn't much of a win because the insn in the 2 "deleted" bytes 1152 must become a nop. With some complexity some real relaxation could be 1153 done but the frequency just wouldn't make it worth it; it's better to 1154 try to do all the code compaction one can elsewhere. 1155 When the chip supports parallel 16 bit insns, things may change. 1156 */ 1157 1158 static boolean 1159 m32r_elf_relax_section (abfd, sec, link_info, again) 1160 bfd *abfd; 1161 asection *sec; 1162 struct bfd_link_info *link_info; 1163 boolean *again; 1164 { 1165 Elf_Internal_Shdr *symtab_hdr; 1166 /* The Rela structures are used here because that's what 1167 _bfd_elf32_link_read_relocs uses [for convenience - it sets the addend 1168 field to 0]. */ 1169 Elf_Internal_Rela *internal_relocs; 1170 Elf_Internal_Rela *free_relocs = NULL; 1171 Elf_Internal_Rela *irel, *irelend; 1172 bfd_byte *contents = NULL; 1173 bfd_byte *free_contents = NULL; 1174 Elf32_External_Sym *extsyms = NULL; 1175 Elf32_External_Sym *free_extsyms = NULL; 1176 1177 /* Assume nothing changes. */ 1178 *again = false; 1179 1180 /* We don't have to do anything for a relocateable link, if 1181 this section does not have relocs, or if this is not a 1182 code section. */ 1183 if (link_info->relocateable 1184 || (sec->flags & SEC_RELOC) == 0 1185 || sec->reloc_count == 0 1186 || (sec->flags & SEC_CODE) == 0 1187 || 0 /* FIXME: check SHF_M32R_CAN_RELAX */) 1188 return true; 1189 1190 /* If this is the first time we have been called for this section, 1191 initialize the cooked size. */ 1192 if (sec->_cooked_size == 0) 1193 sec->_cooked_size = sec->_raw_size; 1194 1195 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 1196 1197 /* Get a copy of the native relocations. */ 1198 internal_relocs = (_bfd_elf32_link_read_relocs 1199 (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL, 1200 link_info->keep_memory)); 1201 if (internal_relocs == NULL) 1202 goto error_return; 1203 if (! link_info->keep_memory) 1204 free_relocs = internal_relocs; 1205 1206 /* Walk through them looking for relaxing opportunities. */ 1207 irelend = internal_relocs + sec->reloc_count; 1208 for (irel = internal_relocs; irel < irelend; irel++) 1209 { 1210 bfd_vma symval; 1211 1212 /* If this isn't something that can be relaxed, then ignore 1213 this reloc. */ 1214 if (ELF32_R_TYPE (irel->r_info) != (int) R_M32R_HI16_SLO) 1215 continue; 1216 1217 /* Get the section contents if we haven't done so already. */ 1218 if (contents == NULL) 1219 { 1220 /* Get cached copy if it exists. */ 1221 if (elf_section_data (sec)->this_hdr.contents != NULL) 1222 contents = elf_section_data (sec)->this_hdr.contents; 1223 else 1224 { 1225 /* Go get them off disk. */ 1226 contents = (bfd_byte *) bfd_malloc (sec->_raw_size); 1227 if (contents == NULL) 1228 goto error_return; 1229 free_contents = contents; 1230 1231 if (! bfd_get_section_contents (abfd, sec, contents, 1232 (file_ptr) 0, sec->_raw_size)) 1233 goto error_return; 1234 } 1235 } 1236 1237 /* Read the local symbols if we haven't done so already. */ 1238 if (extsyms == NULL) 1239 { 1240 /* Get cached copy if it exists. */ 1241 if (symtab_hdr->contents != NULL) 1242 extsyms = (Elf32_External_Sym *) symtab_hdr->contents; 1243 else 1244 { 1245 /* Go get them off disk. */ 1246 extsyms = ((Elf32_External_Sym *) 1247 bfd_malloc (symtab_hdr->sh_info 1248 * sizeof (Elf32_External_Sym))); 1249 if (extsyms == NULL) 1250 goto error_return; 1251 free_extsyms = extsyms; 1252 if (bfd_seek (abfd, symtab_hdr->sh_offset, SEEK_SET) != 0 1253 || (bfd_read (extsyms, sizeof (Elf32_External_Sym), 1254 symtab_hdr->sh_info, abfd) 1255 != (symtab_hdr->sh_info * sizeof (Elf32_External_Sym)))) 1256 goto error_return; 1257 } 1258 } 1259 1260 /* Get the value of the symbol referred to by the reloc. */ 1261 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) 1262 { 1263 Elf_Internal_Sym isym; 1264 asection *sym_sec; 1265 1266 /* A local symbol. */ 1267 bfd_elf32_swap_symbol_in (abfd, 1268 extsyms + ELF32_R_SYM (irel->r_info), 1269 &isym); 1270 1271 sym_sec = bfd_section_from_elf_index (abfd, isym.st_shndx); 1272 symval = (isym.st_value 1273 + sym_sec->output_section->vma 1274 + sym_sec->output_offset); 1275 } 1276 else 1277 { 1278 unsigned long indx; 1279 struct elf_link_hash_entry *h; 1280 1281 /* An external symbol. */ 1282 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; 1283 h = elf_sym_hashes (abfd)[indx]; 1284 BFD_ASSERT (h != NULL); 1285 if (h->root.type != bfd_link_hash_defined 1286 && h->root.type != bfd_link_hash_defweak) 1287 { 1288 /* This appears to be a reference to an undefined 1289 symbol. Just ignore it--it will be caught by the 1290 regular reloc processing. */ 1291 continue; 1292 } 1293 1294 symval = (h->root.u.def.value 1295 + h->root.u.def.section->output_section->vma 1296 + h->root.u.def.section->output_offset); 1297 } 1298 1299 /* For simplicity of coding, we are going to modify the section 1300 contents, the section relocs, and the BFD symbol table. We 1301 must tell the rest of the code not to free up this 1302 information. It would be possible to instead create a table 1303 of changes which have to be made, as is done in coff-mips.c; 1304 that would be more work, but would require less memory when 1305 the linker is run. */ 1306 1307 /* Try to change a seth/add3/jl subroutine call to bl24 or bl8. 1308 This sequence is generated by the compiler when compiling in 1309 32 bit mode. Also look for seth/add3 -> ld24. */ 1310 1311 if (ELF32_R_TYPE (irel->r_info) == (int) R_M32R_HI16_SLO) 1312 { 1313 Elf_Internal_Rela *nrel; 1314 bfd_vma pc = (sec->output_section->vma + sec->output_offset 1315 + irel->r_offset); 1316 bfd_signed_vma pcrel_value = symval - pc; 1317 unsigned int code,reg; 1318 int addend,nop_p,bl8_p,to_delete; 1319 1320 /* The tests are ordered so that we get out as quickly as possible 1321 if this isn't something we can relax, taking into account that 1322 we are looking for two separate possibilities (jl/ld24). */ 1323 1324 /* Do nothing if no room in the section for this to be what we're 1325 looking for. */ 1326 if (irel->r_offset > sec->_cooked_size - 8) 1327 continue; 1328 1329 /* Make sure the next relocation applies to the next 1330 instruction and that it's the add3's reloc. */ 1331 nrel = irel + 1; 1332 if (nrel == irelend 1333 || irel->r_offset + 4 != nrel->r_offset 1334 || ELF32_R_TYPE (nrel->r_info) != (int) R_M32R_LO16) 1335 continue; 1336 1337 /* See if the instructions are seth/add3. */ 1338 /* FIXME: This is where macros from cgen can come in. */ 1339 code = bfd_get_16 (abfd, contents + irel->r_offset + 0); 1340 if ((code & 0xf0ff) != 0xd0c0) 1341 continue; /* not seth rN,foo */ 1342 reg = (code & 0x0f00) >> 8; 1343 code = bfd_get_16 (abfd, contents + irel->r_offset + 4); 1344 if (code != (0x80a0 | reg | (reg << 8))) 1345 continue; /* not add3 rN,rN,foo */ 1346 1347 /* At this point we've confirmed we have seth/add3. Now check 1348 whether the next insn is a jl, in which case try to change this 1349 to bl24 or bl8. */ 1350 1351 /* Ensure the branch target is in range. 1352 The bl24 instruction has a 24 bit operand which is the target 1353 address right shifted by 2, giving a signed range of 26 bits. 1354 Note that 4 bytes are added to the high value because the target 1355 will be at least 4 bytes closer if we can relax. It'll actually 1356 be 4 or 8 bytes closer, but we don't know which just yet and 1357 the difference isn't significant enough to worry about. */ 1358 #ifndef USE_REL /* put in for learning purposes */ 1359 pcrel_value += irel->r_addend; 1360 #else 1361 addend = bfd_get_signed_16 (abfd, contents + irel->r_offset + 2); 1362 pcrel_value += addend; 1363 #endif 1364 1365 if (pcrel_value >= -(1 << 25) && pcrel_value < (1 << 25) + 4 1366 /* Do nothing if no room in the section for this to be what we're 1367 looking for. */ 1368 && (irel->r_offset <= sec->_cooked_size - 12) 1369 /* Ensure the next insn is "jl rN". */ 1370 && ((code = bfd_get_16 (abfd, contents + irel->r_offset + 8)), 1371 code != (0x1ec0 | reg))) 1372 { 1373 /* We can relax to bl24/bl8. */ 1374 1375 /* See if there's a nop following the jl. 1376 Also see if we can use a bl8 insn. */ 1377 code = bfd_get_16 (abfd, contents + irel->r_offset + 10); 1378 nop_p = (code & 0x7fff) == 7000; 1379 bl8_p = pcrel_value >= -0x200 && pcrel_value < 0x200; 1380 1381 if (bl8_p) 1382 { 1383 /* Change "seth rN,foo" to "bl8 foo || nop". 1384 We OR in CODE just in case it's not a nop (technically, 1385 CODE currently must be a nop, but for cleanness we 1386 allow it to be anything). */ 1387 #ifndef USE_REL /* put in for learning purposes */ 1388 code = 0x7e000000 | code; 1389 #else 1390 code = (0x7e000000 + (((addend >> 2) & 0xff) << 16)) | code; 1391 #endif 1392 to_delete = 8; 1393 } 1394 else 1395 { 1396 /* Change the seth rN,foo to a bl24 foo. */ 1397 #ifndef USE_REL /* put in for learning purposes */ 1398 code = 0xfe000000; 1399 #else 1400 code = 0xfe000000 + ((addend >> 2) & 0xffffff); 1401 #endif 1402 to_delete = nop_p ? 8 : 4; 1403 } 1404 1405 bfd_put_32 (abfd, code, contents + irel->r_offset); 1406 1407 /* Set the new reloc type. */ 1408 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info), 1409 bl8_p ? R_M32R_10_PCREL : R_M32R_26_PCREL); 1410 1411 /* Delete the add3 reloc by making it a null reloc. */ 1412 nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info), 1413 R_M32R_NONE); 1414 } 1415 else if (addend >= 0 1416 && symval + addend <= 0xffffff) 1417 { 1418 /* We can relax to ld24. */ 1419 1420 code = 0xe0000000 | (reg << 24) | (addend & 0xffffff); 1421 bfd_put_32 (abfd, code, contents + irel->r_offset); 1422 to_delete = 4; 1423 /* Tell the following code a nop filler isn't needed. */ 1424 nop_p = 1; 1425 } 1426 else 1427 { 1428 /* Can't do anything here. */ 1429 continue; 1430 } 1431 1432 /* Note that we've changed the relocs, section contents, etc. */ 1433 elf_section_data (sec)->relocs = internal_relocs; 1434 free_relocs = NULL; 1435 1436 elf_section_data (sec)->this_hdr.contents = contents; 1437 free_contents = NULL; 1438 1439 symtab_hdr->contents = (bfd_byte *) extsyms; 1440 free_extsyms = NULL; 1441 1442 /* Delete TO_DELETE bytes of data. */ 1443 if (!m32r_elf_relax_delete_bytes (abfd, sec, 1444 irel->r_offset + 4, to_delete)) 1445 goto error_return; 1446 1447 /* Now that the following bytes have been moved into place, see if 1448 we need to replace the jl with a nop. This happens when we had 1449 to use a bl24 insn and the insn following the jl isn't a nop. 1450 Technically, this situation can't happen (since the insn can 1451 never be executed) but to be clean we do this. When the chip 1452 supports parallel 16 bit insns things may change. 1453 We don't need to do this in the case of relaxing to ld24, 1454 and the above code sets nop_p so this isn't done. */ 1455 if (! nop_p && to_delete == 4) 1456 bfd_put_16 (abfd, 0x7000, contents + irel->r_offset + 4); 1457 1458 /* That will change things, so we should relax again. 1459 Note that this is not required, and it may be slow. */ 1460 *again = true; 1461 1462 continue; 1463 } 1464 1465 /* loop to try the next reloc */ 1466 } 1467 1468 if (free_relocs != NULL) 1469 { 1470 free (free_relocs); 1471 free_relocs = NULL; 1472 } 1473 1474 if (free_contents != NULL) 1475 { 1476 if (! link_info->keep_memory) 1477 free (free_contents); 1478 else 1479 { 1480 /* Cache the section contents for elf_link_input_bfd. */ 1481 elf_section_data (sec)->this_hdr.contents = contents; 1482 } 1483 free_contents = NULL; 1484 } 1485 1486 if (free_extsyms != NULL) 1487 { 1488 if (! link_info->keep_memory) 1489 free (free_extsyms); 1490 else 1491 { 1492 /* Cache the symbols for elf_link_input_bfd. */ 1493 symtab_hdr->contents = extsyms; 1494 } 1495 free_extsyms = NULL; 1496 } 1497 1498 return true; 1499 1500 error_return: 1501 if (free_relocs != NULL) 1502 free (free_relocs); 1503 if (free_contents != NULL) 1504 free (free_contents); 1505 if (free_extsyms != NULL) 1506 free (free_extsyms); 1507 return false; 1508 } 1509 1510 /* Delete some bytes from a section while relaxing. */ 1511 1512 static boolean 1513 m32r_elf_relax_delete_bytes (abfd, sec, addr, count) 1514 bfd *abfd; 1515 asection *sec; 1516 bfd_vma addr; 1517 int count; 1518 { 1519 Elf_Internal_Shdr *symtab_hdr; 1520 Elf32_External_Sym *extsyms; 1521 int shndx; 1522 bfd_byte *contents; 1523 Elf_Internal_Rela *irel, *irelend; 1524 Elf_Internal_Rela *irelalign; 1525 bfd_vma toaddr; 1526 Elf32_External_Sym *esym, *esymend; 1527 struct elf_link_hash_entry **sym_hash, **sym_hash_end; 1528 1529 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 1530 extsyms = (Elf32_External_Sym *) symtab_hdr->contents; 1531 1532 shndx = _bfd_elf_section_from_bfd_section (abfd, sec); 1533 1534 contents = elf_section_data (sec)->this_hdr.contents; 1535 1536 /* The deletion must stop at the next ALIGN reloc for an aligment 1537 power larger than the number of bytes we are deleting. */ 1538 1539 irelalign = NULL; 1540 toaddr = sec->_cooked_size; 1541 1542 irel = elf_section_data (sec)->relocs; 1543 irelend = irel + sec->reloc_count; 1544 1545 /* Actually delete the bytes. */ 1546 memmove (contents + addr, contents + addr + count, toaddr - addr - count); 1547 sec->_cooked_size -= count; 1548 1549 /* Adjust all the relocs. */ 1550 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++) 1551 { 1552 /* Get the new reloc address. */ 1553 if ((irel->r_offset > addr 1554 && irel->r_offset < toaddr)) 1555 irel->r_offset -= count; 1556 } 1557 1558 /* Adjust all the symbols. */ 1559 esym = extsyms; 1560 esymend = esym + symtab_hdr->sh_info; 1561 for (; esym < esymend; esym++) 1562 { 1563 Elf_Internal_Sym isym; 1564 1565 bfd_elf32_swap_symbol_in (abfd, esym, &isym); 1566 1567 if (isym.st_shndx == shndx 1568 && isym.st_value > addr 1569 && isym.st_value < toaddr) 1570 { 1571 isym.st_value -= count; 1572 bfd_elf32_swap_symbol_out (abfd, &isym, esym); 1573 } 1574 } 1575 1576 sym_hash = elf_sym_hashes (abfd); 1577 sym_hash_end = (sym_hash 1578 + (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) 1579 - symtab_hdr->sh_info)); 1580 for (; sym_hash < sym_hash_end; sym_hash++) 1581 { 1582 if (((*sym_hash)->root.type == bfd_link_hash_defined 1583 || (*sym_hash)->root.type == bfd_link_hash_defweak) 1584 && (*sym_hash)->root.u.def.section == sec 1585 && (*sym_hash)->root.u.def.value > addr 1586 && (*sym_hash)->root.u.def.value < toaddr) 1587 { 1588 (*sym_hash)->root.u.def.value -= count; 1589 } 1590 } 1591 1592 return true; 1593 } 1594 1595 /* This is a version of bfd_generic_get_relocated_section_contents 1596 which uses m32r_elf_relocate_section. */ 1597 1598 static bfd_byte * 1599 m32r_elf_get_relocated_section_contents (output_bfd, link_info, link_order, 1600 data, relocateable, symbols) 1601 bfd *output_bfd; 1602 struct bfd_link_info *link_info; 1603 struct bfd_link_order *link_order; 1604 bfd_byte *data; 1605 boolean relocateable; 1606 asymbol **symbols; 1607 { 1608 Elf_Internal_Shdr *symtab_hdr; 1609 asection *input_section = link_order->u.indirect.section; 1610 bfd *input_bfd = input_section->owner; 1611 asection **sections = NULL; 1612 Elf_Internal_Rela *internal_relocs = NULL; 1613 Elf32_External_Sym *external_syms = NULL; 1614 Elf_Internal_Sym *internal_syms = NULL; 1615 1616 /* We only need to handle the case of relaxing, or of having a 1617 particular set of section contents, specially. */ 1618 if (relocateable 1619 || elf_section_data (input_section)->this_hdr.contents == NULL) 1620 return bfd_generic_get_relocated_section_contents (output_bfd, link_info, 1621 link_order, data, 1622 relocateable, 1623 symbols); 1624 1625 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; 1626 1627 memcpy (data, elf_section_data (input_section)->this_hdr.contents, 1628 input_section->_raw_size); 1629 1630 if ((input_section->flags & SEC_RELOC) != 0 1631 && input_section->reloc_count > 0) 1632 { 1633 Elf_Internal_Sym *isymp; 1634 asection **secpp; 1635 Elf32_External_Sym *esym, *esymend; 1636 1637 if (symtab_hdr->contents != NULL) 1638 external_syms = (Elf32_External_Sym *) symtab_hdr->contents; 1639 else 1640 { 1641 external_syms = ((Elf32_External_Sym *) 1642 bfd_malloc (symtab_hdr->sh_info 1643 * sizeof (Elf32_External_Sym))); 1644 if (external_syms == NULL && symtab_hdr->sh_info > 0) 1645 goto error_return; 1646 if (bfd_seek (input_bfd, symtab_hdr->sh_offset, SEEK_SET) != 0 1647 || (bfd_read (external_syms, sizeof (Elf32_External_Sym), 1648 symtab_hdr->sh_info, input_bfd) 1649 != (symtab_hdr->sh_info * sizeof (Elf32_External_Sym)))) 1650 goto error_return; 1651 } 1652 1653 internal_relocs = (_bfd_elf32_link_read_relocs 1654 (input_bfd, input_section, (PTR) NULL, 1655 (Elf_Internal_Rela *) NULL, false)); 1656 if (internal_relocs == NULL) 1657 goto error_return; 1658 1659 internal_syms = ((Elf_Internal_Sym *) 1660 bfd_malloc (symtab_hdr->sh_info 1661 * sizeof (Elf_Internal_Sym))); 1662 if (internal_syms == NULL && symtab_hdr->sh_info > 0) 1663 goto error_return; 1664 1665 sections = (asection **) bfd_malloc (symtab_hdr->sh_info 1666 * sizeof (asection *)); 1667 if (sections == NULL && symtab_hdr->sh_info > 0) 1668 goto error_return; 1669 1670 isymp = internal_syms; 1671 secpp = sections; 1672 esym = external_syms; 1673 esymend = esym + symtab_hdr->sh_info; 1674 for (; esym < esymend; ++esym, ++isymp, ++secpp) 1675 { 1676 asection *isec; 1677 1678 bfd_elf32_swap_symbol_in (input_bfd, esym, isymp); 1679 1680 if (isymp->st_shndx == SHN_UNDEF) 1681 isec = bfd_und_section_ptr; 1682 else if (isymp->st_shndx > 0 && isymp->st_shndx < SHN_LORESERVE) 1683 isec = bfd_section_from_elf_index (input_bfd, isymp->st_shndx); 1684 else if (isymp->st_shndx == SHN_ABS) 1685 isec = bfd_abs_section_ptr; 1686 else if (isymp->st_shndx == SHN_COMMON) 1687 isec = bfd_com_section_ptr; 1688 else if (isymp->st_shndx == SHN_M32R_SCOMMON) 1689 isec = &m32r_elf_scom_section; 1690 else 1691 { 1692 /* Who knows? */ 1693 isec = NULL; 1694 } 1695 1696 *secpp = isec; 1697 } 1698 1699 if (! m32r_elf_relocate_section (output_bfd, link_info, input_bfd, 1700 input_section, data, internal_relocs, 1701 internal_syms, sections)) 1702 goto error_return; 1703 1704 if (sections != NULL) 1705 free (sections); 1706 sections = NULL; 1707 if (internal_syms != NULL) 1708 free (internal_syms); 1709 internal_syms = NULL; 1710 if (external_syms != NULL && symtab_hdr->contents == NULL) 1711 free (external_syms); 1712 external_syms = NULL; 1713 if (internal_relocs != elf_section_data (input_section)->relocs) 1714 free (internal_relocs); 1715 internal_relocs = NULL; 1716 } 1717 1718 return data; 1719 1720 error_return: 1721 if (internal_relocs != NULL 1722 && internal_relocs != elf_section_data (input_section)->relocs) 1723 free (internal_relocs); 1724 if (external_syms != NULL && symtab_hdr->contents == NULL) 1725 free (external_syms); 1726 if (internal_syms != NULL) 1727 free (internal_syms); 1728 if (sections != NULL) 1729 free (sections); 1730 return NULL; 1731 } 1732 1733 #endif /* #if 0 */ 1734 1735 #define ELF_ARCH bfd_arch_m32r 1736 #define ELF_MACHINE_CODE EM_CYGNUS_M32R 1737 #define ELF_MAXPAGESIZE 0x1000 1738 1739 #define TARGET_BIG_SYM bfd_elf32_m32r_vec 1740 #define TARGET_BIG_NAME "elf32-m32r" 1741 1742 #define elf_info_to_howto 0 1743 #define elf_info_to_howto_rel m32r_info_to_howto_rel 1744 #define elf_backend_object_p 0 1745 #define elf_backend_section_from_bfd_section _bfd_m32r_elf_section_from_bfd_section 1746 #define elf_backend_symbol_processing _bfd_m32r_elf_symbol_processing 1747 #define elf_backend_add_symbol_hook m32r_elf_add_symbol_hook 1748 #define elf_backend_relocate_section m32r_elf_relocate_section 1749 #define elf_backend_final_write_processing 0 1750 1751 #if 0 /* not yet */ 1752 /* relax support */ 1753 #define bfd_elf32_bfd_relax_section m32r_elf_relax_section 1754 #define bfd_elf32_bfd_get_relocated_section_contents \ 1755 m32r_elf_get_relocated_section_contents 1756 #endif 1757 1758 #include "elf32-target.h" 1759