1*3d8817e4Smiod /* Opcode table for the TI MSP430 microcontrollers 2*3d8817e4Smiod 3*3d8817e4Smiod Copyright 2002, 2004 Free Software Foundation, Inc. 4*3d8817e4Smiod Contributed by Dmitry Diky <diwil@mail.ru> 5*3d8817e4Smiod 6*3d8817e4Smiod This program is free software; you can redistribute it and/or modify 7*3d8817e4Smiod it under the terms of the GNU General Public License as published by 8*3d8817e4Smiod the Free Software Foundation; either version 2, or (at your option) 9*3d8817e4Smiod any later version. 10*3d8817e4Smiod 11*3d8817e4Smiod This program is distributed in the hope that it will be useful, 12*3d8817e4Smiod but WITHOUT ANY WARRANTY; without even the implied warranty of 13*3d8817e4Smiod MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14*3d8817e4Smiod GNU General Public License for more details. 15*3d8817e4Smiod 16*3d8817e4Smiod You should have received a copy of the GNU General Public License 17*3d8817e4Smiod along with this program; if not, write to the Free Software 18*3d8817e4Smiod Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 19*3d8817e4Smiod 20*3d8817e4Smiod #ifndef __MSP430_H_ 21*3d8817e4Smiod #define __MSP430_H_ 22*3d8817e4Smiod 23*3d8817e4Smiod struct msp430_operand_s 24*3d8817e4Smiod { 25*3d8817e4Smiod int ol; /* Operand length words. */ 26*3d8817e4Smiod int am; /* Addr mode. */ 27*3d8817e4Smiod int reg; /* Register. */ 28*3d8817e4Smiod int mode; /* Pperand mode. */ 29*3d8817e4Smiod #define OP_REG 0 30*3d8817e4Smiod #define OP_EXP 1 31*3d8817e4Smiod #ifndef DASM_SECTION 32*3d8817e4Smiod expressionS exp; 33*3d8817e4Smiod #endif 34*3d8817e4Smiod }; 35*3d8817e4Smiod 36*3d8817e4Smiod #define BYTE_OPERATION (1 << 6) /* Byte operation flag for all instructions. */ 37*3d8817e4Smiod 38*3d8817e4Smiod struct msp430_opcode_s 39*3d8817e4Smiod { 40*3d8817e4Smiod char *name; 41*3d8817e4Smiod int fmt; 42*3d8817e4Smiod int insn_opnumb; 43*3d8817e4Smiod int bin_opcode; 44*3d8817e4Smiod int bin_mask; 45*3d8817e4Smiod }; 46*3d8817e4Smiod 47*3d8817e4Smiod #define MSP_INSN(name, size, numb, bin, mask) { #name, size, numb, bin, mask } 48*3d8817e4Smiod 49*3d8817e4Smiod static struct msp430_opcode_s msp430_opcodes[] = 50*3d8817e4Smiod { 51*3d8817e4Smiod MSP_INSN (and, 1, 2, 0xf000, 0xf000), 52*3d8817e4Smiod MSP_INSN (inv, 0, 1, 0xe330, 0xfff0), 53*3d8817e4Smiod MSP_INSN (xor, 1, 2, 0xe000, 0xf000), 54*3d8817e4Smiod MSP_INSN (setz, 0, 0, 0xd322, 0xffff), 55*3d8817e4Smiod MSP_INSN (setc, 0, 0, 0xd312, 0xffff), 56*3d8817e4Smiod MSP_INSN (eint, 0, 0, 0xd232, 0xffff), 57*3d8817e4Smiod MSP_INSN (setn, 0, 0, 0xd222, 0xffff), 58*3d8817e4Smiod MSP_INSN (bis, 1, 2, 0xd000, 0xf000), 59*3d8817e4Smiod MSP_INSN (clrz, 0, 0, 0xc322, 0xffff), 60*3d8817e4Smiod MSP_INSN (clrc, 0, 0, 0xc312, 0xffff), 61*3d8817e4Smiod MSP_INSN (dint, 0, 0, 0xc232, 0xffff), 62*3d8817e4Smiod MSP_INSN (clrn, 0, 0, 0xc222, 0xffff), 63*3d8817e4Smiod MSP_INSN (bic, 1, 2, 0xc000, 0xf000), 64*3d8817e4Smiod MSP_INSN (bit, 1, 2, 0xb000, 0xf000), 65*3d8817e4Smiod MSP_INSN (dadc, 0, 1, 0xa300, 0xff30), 66*3d8817e4Smiod MSP_INSN (dadd, 1, 2, 0xa000, 0xf000), 67*3d8817e4Smiod MSP_INSN (tst, 0, 1, 0x9300, 0xff30), 68*3d8817e4Smiod MSP_INSN (cmp, 1, 2, 0x9000, 0xf000), 69*3d8817e4Smiod MSP_INSN (decd, 0, 1, 0x8320, 0xff30), 70*3d8817e4Smiod MSP_INSN (dec, 0, 1, 0x8310, 0xff30), 71*3d8817e4Smiod MSP_INSN (sub, 1, 2, 0x8000, 0xf000), 72*3d8817e4Smiod MSP_INSN (sbc, 0, 1, 0x7300, 0xff30), 73*3d8817e4Smiod MSP_INSN (subc, 1, 2, 0x7000, 0xf000), 74*3d8817e4Smiod MSP_INSN (adc, 0, 1, 0x6300, 0xff30), 75*3d8817e4Smiod MSP_INSN (rlc, 0, 2, 0x6000, 0xf000), 76*3d8817e4Smiod MSP_INSN (addc, 1, 2, 0x6000, 0xf000), 77*3d8817e4Smiod MSP_INSN (incd, 0, 1, 0x5320, 0xff30), 78*3d8817e4Smiod MSP_INSN (inc, 0, 1, 0x5310, 0xff30), 79*3d8817e4Smiod MSP_INSN (rla, 0, 2, 0x5000, 0xf000), 80*3d8817e4Smiod MSP_INSN (add, 1, 2, 0x5000, 0xf000), 81*3d8817e4Smiod MSP_INSN (nop, 0, 0, 0x4303, 0xffff), 82*3d8817e4Smiod MSP_INSN (clr, 0, 1, 0x4300, 0xff30), 83*3d8817e4Smiod MSP_INSN (ret, 0, 0, 0x4130, 0xff30), 84*3d8817e4Smiod MSP_INSN (pop, 0, 1, 0x4130, 0xff30), 85*3d8817e4Smiod MSP_INSN (br, 0, 3, 0x4000, 0xf000), 86*3d8817e4Smiod MSP_INSN (mov, 1, 2, 0x4000, 0xf000), 87*3d8817e4Smiod MSP_INSN (jmp, 3, 1, 0x3c00, 0xfc00), 88*3d8817e4Smiod MSP_INSN (jl, 3, 1, 0x3800, 0xfc00), 89*3d8817e4Smiod MSP_INSN (jge, 3, 1, 0x3400, 0xfc00), 90*3d8817e4Smiod MSP_INSN (jn, 3, 1, 0x3000, 0xfc00), 91*3d8817e4Smiod MSP_INSN (jc, 3, 1, 0x2c00, 0xfc00), 92*3d8817e4Smiod MSP_INSN (jhs, 3, 1, 0x2c00, 0xfc00), 93*3d8817e4Smiod MSP_INSN (jnc, 3, 1, 0x2800, 0xfc00), 94*3d8817e4Smiod MSP_INSN (jlo, 3, 1, 0x2800, 0xfc00), 95*3d8817e4Smiod MSP_INSN (jz, 3, 1, 0x2400, 0xfc00), 96*3d8817e4Smiod MSP_INSN (jeq, 3, 1, 0x2400, 0xfc00), 97*3d8817e4Smiod MSP_INSN (jnz, 3, 1, 0x2000, 0xfc00), 98*3d8817e4Smiod MSP_INSN (jne, 3, 1, 0x2000, 0xfc00), 99*3d8817e4Smiod MSP_INSN (reti, 2, 0, 0x1300, 0xffc0), 100*3d8817e4Smiod MSP_INSN (call, 2, 1, 0x1280, 0xffc0), 101*3d8817e4Smiod MSP_INSN (push, 2, 1, 0x1200, 0xff80), 102*3d8817e4Smiod MSP_INSN (sxt, 2, 1, 0x1180, 0xffc0), 103*3d8817e4Smiod MSP_INSN (rra, 2, 1, 0x1100, 0xff80), 104*3d8817e4Smiod MSP_INSN (swpb, 2, 1, 0x1080, 0xffc0), 105*3d8817e4Smiod MSP_INSN (rrc, 2, 1, 0x1000, 0xff80), 106*3d8817e4Smiod /* Simple polymorphs. */ 107*3d8817e4Smiod MSP_INSN (beq, 4, 0, 0, 0xffff), 108*3d8817e4Smiod MSP_INSN (bne, 4, 1, 0, 0xffff), 109*3d8817e4Smiod MSP_INSN (blt, 4, 2, 0, 0xffff), 110*3d8817e4Smiod MSP_INSN (bltu, 4, 3, 0, 0xffff), 111*3d8817e4Smiod MSP_INSN (bge, 4, 4, 0, 0xffff), 112*3d8817e4Smiod MSP_INSN (bgeu, 4, 5, 0, 0xffff), 113*3d8817e4Smiod MSP_INSN (bltn, 4, 6, 0, 0xffff), 114*3d8817e4Smiod MSP_INSN (jump, 4, 7, 0, 0xffff), 115*3d8817e4Smiod /* Long polymorphs. */ 116*3d8817e4Smiod MSP_INSN (bgt, 5, 0, 0, 0xffff), 117*3d8817e4Smiod MSP_INSN (bgtu, 5, 1, 0, 0xffff), 118*3d8817e4Smiod MSP_INSN (bleu, 5, 2, 0, 0xffff), 119*3d8817e4Smiod MSP_INSN (ble, 5, 3, 0, 0xffff), 120*3d8817e4Smiod 121*3d8817e4Smiod /* End of instruction set. */ 122*3d8817e4Smiod { NULL, 0, 0, 0, 0 } 123*3d8817e4Smiod }; 124*3d8817e4Smiod 125*3d8817e4Smiod #endif 126