xref: /openbsd-src/gnu/usr.bin/binutils-2.17/include/elf/m32r.h (revision 3d8817e467ea46cf4772788d6804dd293abfb01a)
1*3d8817e4Smiod /* M32R ELF support for BFD.
2*3d8817e4Smiod    Copyright 1996, 1997, 1998, 1999, 2000, 2003, 2004 Free Software Foundation, Inc.
3*3d8817e4Smiod 
4*3d8817e4Smiod    This file is part of BFD, the Binary File Descriptor library.
5*3d8817e4Smiod 
6*3d8817e4Smiod    This program is free software; you can redistribute it and/or modify
7*3d8817e4Smiod    it under the terms of the GNU General Public License as published by
8*3d8817e4Smiod    the Free Software Foundation; either version 2 of the License, or
9*3d8817e4Smiod    (at your option) any later version.
10*3d8817e4Smiod 
11*3d8817e4Smiod    This program is distributed in the hope that it will be useful,
12*3d8817e4Smiod    but WITHOUT ANY WARRANTY; without even the implied warranty of
13*3d8817e4Smiod    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14*3d8817e4Smiod    GNU General Public License for more details.
15*3d8817e4Smiod 
16*3d8817e4Smiod    You should have received a copy of the GNU General Public License
17*3d8817e4Smiod    along with this program; if not, write to the Free Software Foundation, Inc.,
18*3d8817e4Smiod    51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
19*3d8817e4Smiod 
20*3d8817e4Smiod #ifndef _ELF_M32R_H
21*3d8817e4Smiod #define _ELF_M32R_H
22*3d8817e4Smiod 
23*3d8817e4Smiod #include "elf/reloc-macros.h"
24*3d8817e4Smiod 
25*3d8817e4Smiod /* Relocations.  */
26*3d8817e4Smiod START_RELOC_NUMBERS (elf_m32r_reloc_type)
27*3d8817e4Smiod   RELOC_NUMBER (R_M32R_NONE, 0)
28*3d8817e4Smiod   /* REL relocations */
29*3d8817e4Smiod   RELOC_NUMBER (R_M32R_16, 1)		 /* For backwards compatibility. */
30*3d8817e4Smiod   RELOC_NUMBER (R_M32R_32, 2)		 /* For backwards compatibility. */
31*3d8817e4Smiod   RELOC_NUMBER (R_M32R_24, 3)		 /* For backwards compatibility. */
32*3d8817e4Smiod   RELOC_NUMBER (R_M32R_10_PCREL, 4)	 /* For backwards compatibility. */
33*3d8817e4Smiod   RELOC_NUMBER (R_M32R_18_PCREL, 5)	 /* For backwards compatibility. */
34*3d8817e4Smiod   RELOC_NUMBER (R_M32R_26_PCREL, 6)	 /* For backwards compatibility. */
35*3d8817e4Smiod   RELOC_NUMBER (R_M32R_HI16_ULO, 7)	 /* For backwards compatibility. */
36*3d8817e4Smiod   RELOC_NUMBER (R_M32R_HI16_SLO, 8)	 /* For backwards compatibility. */
37*3d8817e4Smiod   RELOC_NUMBER (R_M32R_LO16, 9)		 /* For backwards compatibility. */
38*3d8817e4Smiod   RELOC_NUMBER (R_M32R_SDA16, 10)	 /* For backwards compatibility. */
39*3d8817e4Smiod   RELOC_NUMBER (R_M32R_GNU_VTINHERIT, 11)/* For backwards compatibility. */
40*3d8817e4Smiod   RELOC_NUMBER (R_M32R_GNU_VTENTRY, 12)	 /* For backwards compatibility. */
41*3d8817e4Smiod 
42*3d8817e4Smiod   /* RELA relocations */
43*3d8817e4Smiod   RELOC_NUMBER (R_M32R_16_RELA, 33)
44*3d8817e4Smiod   RELOC_NUMBER (R_M32R_32_RELA, 34)
45*3d8817e4Smiod   RELOC_NUMBER (R_M32R_24_RELA, 35)
46*3d8817e4Smiod   RELOC_NUMBER (R_M32R_10_PCREL_RELA, 36)
47*3d8817e4Smiod   RELOC_NUMBER (R_M32R_18_PCREL_RELA, 37)
48*3d8817e4Smiod   RELOC_NUMBER (R_M32R_26_PCREL_RELA, 38)
49*3d8817e4Smiod   RELOC_NUMBER (R_M32R_HI16_ULO_RELA, 39)
50*3d8817e4Smiod   RELOC_NUMBER (R_M32R_HI16_SLO_RELA, 40)
51*3d8817e4Smiod   RELOC_NUMBER (R_M32R_LO16_RELA, 41)
52*3d8817e4Smiod   RELOC_NUMBER (R_M32R_SDA16_RELA, 42)
53*3d8817e4Smiod   RELOC_NUMBER (R_M32R_RELA_GNU_VTINHERIT, 43)
54*3d8817e4Smiod   RELOC_NUMBER (R_M32R_RELA_GNU_VTENTRY, 44)
55*3d8817e4Smiod 
56*3d8817e4Smiod   RELOC_NUMBER (R_M32R_REL32, 45)
57*3d8817e4Smiod 
58*3d8817e4Smiod   RELOC_NUMBER (R_M32R_GOT24, 48)
59*3d8817e4Smiod   RELOC_NUMBER (R_M32R_26_PLTREL, 49)
60*3d8817e4Smiod   RELOC_NUMBER (R_M32R_COPY, 50)
61*3d8817e4Smiod   RELOC_NUMBER (R_M32R_GLOB_DAT, 51)
62*3d8817e4Smiod   RELOC_NUMBER (R_M32R_JMP_SLOT, 52)
63*3d8817e4Smiod   RELOC_NUMBER (R_M32R_RELATIVE, 53)
64*3d8817e4Smiod   RELOC_NUMBER (R_M32R_GOTOFF, 54)
65*3d8817e4Smiod   RELOC_NUMBER (R_M32R_GOTPC24, 55)
66*3d8817e4Smiod   RELOC_NUMBER (R_M32R_GOT16_HI_ULO, 56)
67*3d8817e4Smiod   RELOC_NUMBER (R_M32R_GOT16_HI_SLO, 57)
68*3d8817e4Smiod   RELOC_NUMBER (R_M32R_GOT16_LO, 58)
69*3d8817e4Smiod   RELOC_NUMBER (R_M32R_GOTPC_HI_ULO, 59)
70*3d8817e4Smiod   RELOC_NUMBER (R_M32R_GOTPC_HI_SLO, 60)
71*3d8817e4Smiod   RELOC_NUMBER (R_M32R_GOTPC_LO, 61)
72*3d8817e4Smiod   RELOC_NUMBER (R_M32R_GOTOFF_HI_ULO, 62)
73*3d8817e4Smiod   RELOC_NUMBER (R_M32R_GOTOFF_HI_SLO, 63)
74*3d8817e4Smiod   RELOC_NUMBER (R_M32R_GOTOFF_LO, 64)
75*3d8817e4Smiod 
76*3d8817e4Smiod END_RELOC_NUMBERS (R_M32R_max)
77*3d8817e4Smiod 
78*3d8817e4Smiod /* Processor specific section indices.  These sections do not actually
79*3d8817e4Smiod    exist.  Symbols with a st_shndx field corresponding to one of these
80*3d8817e4Smiod    values have a special meaning.  */
81*3d8817e4Smiod 
82*3d8817e4Smiod /* Small common symbol.  */
83*3d8817e4Smiod #define SHN_M32R_SCOMMON	0xff00
84*3d8817e4Smiod 
85*3d8817e4Smiod /* Processor specific section flags.  */
86*3d8817e4Smiod 
87*3d8817e4Smiod /* This section contains sufficient relocs to be relaxed.
88*3d8817e4Smiod    When relaxing, even relocs of branch instructions the assembler could
89*3d8817e4Smiod    complete must be present because relaxing may cause the branch target to
90*3d8817e4Smiod    move.  */
91*3d8817e4Smiod #define SHF_M32R_CAN_RELAX	0x10000000
92*3d8817e4Smiod 
93*3d8817e4Smiod /* Processor specific flags for the ELF header e_flags field.  */
94*3d8817e4Smiod 
95*3d8817e4Smiod /* Two bit m32r architecture field.  */
96*3d8817e4Smiod #define EF_M32R_ARCH		0x30000000
97*3d8817e4Smiod 
98*3d8817e4Smiod /* m32r code.  */
99*3d8817e4Smiod #define E_M32R_ARCH		0x00000000
100*3d8817e4Smiod /* m32rx code.  */
101*3d8817e4Smiod #define E_M32RX_ARCH            0x10000000
102*3d8817e4Smiod /* m32r2 code.  */
103*3d8817e4Smiod #define E_M32R2_ARCH            0x20000000
104*3d8817e4Smiod 
105*3d8817e4Smiod /* 12 bit m32r new instructions field.  */
106*3d8817e4Smiod #define EF_M32R_INST            0x0FFF0000
107*3d8817e4Smiod /* Parallel instructions.  */
108*3d8817e4Smiod #define E_M32R_HAS_PARALLEL     0x00010000
109*3d8817e4Smiod /* Hidden instructions for m32rx:
110*3d8817e4Smiod    jc, jnc, macwhi-a, macwlo-a, mulwhi-a, mulwlo-a, sth+, shb+, sat, pcmpbz,
111*3d8817e4Smiod    sc, snc.  */
112*3d8817e4Smiod #define E_M32R_HAS_HIDDEN_INST  0x00020000
113*3d8817e4Smiod /* New bit instructions:
114*3d8817e4Smiod    clrpsw, setpsw, bset, bclr, btst.  */
115*3d8817e4Smiod #define E_M32R_HAS_BIT_INST     0x00040000
116*3d8817e4Smiod /* Floating point instructions.  */
117*3d8817e4Smiod #define E_M32R_HAS_FLOAT_INST   0x00080000
118*3d8817e4Smiod 
119*3d8817e4Smiod /* 4 bit m32r ignore to check field.  */
120*3d8817e4Smiod #define EF_M32R_IGNORE          0x0000000F
121*3d8817e4Smiod 
122*3d8817e4Smiod #endif
123