1 //===-- DNBArchImplARM64.h --------------------------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #ifndef __DNBArchImplARM64_h__ 10 #define __DNBArchImplARM64_h__ 11 12 #if defined(__arm__) || defined(__arm64__) || defined(__aarch64__) 13 14 #include <mach/thread_status.h> 15 #include <map> 16 17 #if defined(ARM_THREAD_STATE64_COUNT) 18 19 #include "DNBArch.h" 20 21 class MachThread; 22 23 class DNBArchMachARM64 : public DNBArchProtocol { 24 public: 25 enum { kMaxNumThumbITBreakpoints = 4 }; 26 27 DNBArchMachARM64(MachThread *thread) 28 : m_thread(thread), m_state(), m_disabled_watchpoints(), 29 m_watchpoint_hw_index(-1), m_watchpoint_did_occur(false), 30 m_watchpoint_resume_single_step_enabled(false), 31 m_saved_register_states() { 32 m_disabled_watchpoints.resize(16); 33 memset(&m_dbg_save, 0, sizeof(m_dbg_save)); 34 } 35 36 virtual ~DNBArchMachARM64() {} 37 38 static void Initialize(); 39 static const DNBRegisterSetInfo *GetRegisterSetInfo(nub_size_t *num_reg_sets); 40 41 virtual bool GetRegisterValue(uint32_t set, uint32_t reg, 42 DNBRegisterValue *value); 43 virtual bool SetRegisterValue(uint32_t set, uint32_t reg, 44 const DNBRegisterValue *value); 45 virtual nub_size_t GetRegisterContext(void *buf, nub_size_t buf_len); 46 virtual nub_size_t SetRegisterContext(const void *buf, nub_size_t buf_len); 47 virtual uint32_t SaveRegisterState(); 48 virtual bool RestoreRegisterState(uint32_t save_id); 49 50 virtual kern_return_t GetRegisterState(int set, bool force); 51 virtual kern_return_t SetRegisterState(int set); 52 virtual bool RegisterSetStateIsValid(int set) const; 53 54 virtual uint64_t GetPC(uint64_t failValue); // Get program counter 55 virtual kern_return_t SetPC(uint64_t value); 56 virtual uint64_t GetSP(uint64_t failValue); // Get stack pointer 57 virtual void ThreadWillResume(); 58 virtual bool ThreadDidStop(); 59 virtual bool NotifyException(MachException::Data &exc); 60 61 static DNBArchProtocol *Create(MachThread *thread); 62 static const uint8_t *SoftwareBreakpointOpcode(nub_size_t byte_size); 63 static uint32_t GetCPUType(); 64 65 virtual uint32_t NumSupportedHardwareWatchpoints(); 66 virtual uint32_t EnableHardwareWatchpoint(nub_addr_t addr, nub_size_t size, 67 bool read, bool write, 68 bool also_set_on_task); 69 virtual bool DisableHardwareWatchpoint(uint32_t hw_break_index, 70 bool also_set_on_task); 71 virtual bool DisableHardwareWatchpoint_helper(uint32_t hw_break_index, 72 bool also_set_on_task); 73 74 protected: 75 kern_return_t EnableHardwareSingleStep(bool enable); 76 static bool FixGenericRegisterNumber(uint32_t &set, uint32_t ®); 77 78 enum RegisterSet { 79 e_regSetALL = REGISTER_SET_ALL, 80 e_regSetGPR, // ARM_THREAD_STATE64, 81 e_regSetVFP, // ARM_NEON_STATE64, 82 e_regSetEXC, // ARM_EXCEPTION_STATE64, 83 e_regSetDBG, // ARM_DEBUG_STATE64, 84 kNumRegisterSets 85 }; 86 87 enum { 88 e_regSetGPRCount = ARM_THREAD_STATE64_COUNT, 89 e_regSetVFPCount = ARM_NEON_STATE64_COUNT, 90 e_regSetEXCCount = ARM_EXCEPTION_STATE64_COUNT, 91 e_regSetDBGCount = ARM_DEBUG_STATE64_COUNT, 92 }; 93 94 enum { Read = 0, Write = 1, kNumErrors = 2 }; 95 96 typedef arm_thread_state64_t GPR; 97 typedef arm_neon_state64_t FPU; 98 typedef arm_exception_state64_t EXC; 99 100 static const DNBRegisterInfo g_gpr_registers[]; 101 static const DNBRegisterInfo g_vfp_registers[]; 102 static const DNBRegisterInfo g_exc_registers[]; 103 static const DNBRegisterSetInfo g_reg_sets[]; 104 105 static const size_t k_num_gpr_registers; 106 static const size_t k_num_vfp_registers; 107 static const size_t k_num_exc_registers; 108 static const size_t k_num_all_registers; 109 static const size_t k_num_register_sets; 110 111 struct Context { 112 GPR gpr; 113 FPU vfp; 114 EXC exc; 115 }; 116 117 struct State { 118 Context context; 119 arm_debug_state64_t dbg; 120 kern_return_t gpr_errs[2]; // Read/Write errors 121 kern_return_t vfp_errs[2]; // Read/Write errors 122 kern_return_t exc_errs[2]; // Read/Write errors 123 kern_return_t dbg_errs[2]; // Read/Write errors 124 State() { 125 uint32_t i; 126 for (i = 0; i < kNumErrors; i++) { 127 gpr_errs[i] = -1; 128 vfp_errs[i] = -1; 129 exc_errs[i] = -1; 130 dbg_errs[i] = -1; 131 } 132 } 133 void InvalidateRegisterSetState(int set) { SetError(set, Read, -1); } 134 135 void InvalidateAllRegisterStates() { SetError(e_regSetALL, Read, -1); } 136 137 kern_return_t GetError(int set, uint32_t err_idx) const { 138 if (err_idx < kNumErrors) { 139 switch (set) { 140 // When getting all errors, just OR all values together to see if 141 // we got any kind of error. 142 case e_regSetALL: 143 return gpr_errs[err_idx] | vfp_errs[err_idx] | exc_errs[err_idx] | 144 dbg_errs[err_idx]; 145 case e_regSetGPR: 146 return gpr_errs[err_idx]; 147 case e_regSetVFP: 148 return vfp_errs[err_idx]; 149 case e_regSetEXC: 150 return exc_errs[err_idx]; 151 // case e_regSetDBG: return dbg_errs[err_idx]; 152 default: 153 break; 154 } 155 } 156 return -1; 157 } 158 bool SetError(int set, uint32_t err_idx, kern_return_t err) { 159 if (err_idx < kNumErrors) { 160 switch (set) { 161 case e_regSetALL: 162 gpr_errs[err_idx] = err; 163 vfp_errs[err_idx] = err; 164 dbg_errs[err_idx] = err; 165 exc_errs[err_idx] = err; 166 return true; 167 168 case e_regSetGPR: 169 gpr_errs[err_idx] = err; 170 return true; 171 172 case e_regSetVFP: 173 vfp_errs[err_idx] = err; 174 return true; 175 176 case e_regSetEXC: 177 exc_errs[err_idx] = err; 178 return true; 179 180 // case e_regSetDBG: 181 // dbg_errs[err_idx] = err; 182 // return true; 183 default: 184 break; 185 } 186 } 187 return false; 188 } 189 bool RegsAreValid(int set) const { 190 return GetError(set, Read) == KERN_SUCCESS; 191 } 192 }; 193 194 kern_return_t GetGPRState(bool force); 195 kern_return_t GetVFPState(bool force); 196 kern_return_t GetEXCState(bool force); 197 kern_return_t GetDBGState(bool force); 198 199 kern_return_t SetGPRState(); 200 kern_return_t SetVFPState(); 201 kern_return_t SetEXCState(); 202 kern_return_t SetDBGState(bool also_set_on_task); 203 204 // Helper functions for watchpoint implementaions. 205 206 typedef arm_debug_state64_t DBG; 207 208 void ClearWatchpointOccurred(); 209 bool HasWatchpointOccurred(); 210 bool IsWatchpointEnabled(const DBG &debug_state, uint32_t hw_index); 211 nub_addr_t GetWatchpointAddressByIndex(uint32_t hw_index); 212 nub_addr_t GetWatchAddress(const DBG &debug_state, uint32_t hw_index); 213 virtual bool ReenableHardwareWatchpoint(uint32_t hw_break_index); 214 virtual bool ReenableHardwareWatchpoint_helper(uint32_t hw_break_index); 215 virtual uint32_t GetHardwareWatchpointHit(nub_addr_t &addr); 216 217 class disabled_watchpoint { 218 public: 219 disabled_watchpoint() { 220 addr = 0; 221 control = 0; 222 } 223 nub_addr_t addr; 224 uint32_t control; 225 }; 226 227 protected: 228 MachThread *m_thread; 229 State m_state; 230 arm_debug_state64_t m_dbg_save; 231 232 // arm64 doesn't keep the disabled watchpoint values in the debug register 233 // context like armv7; 234 // we need to save them aside when we disable them temporarily. 235 std::vector<disabled_watchpoint> m_disabled_watchpoints; 236 237 // The following member variables should be updated atomically. 238 int32_t m_watchpoint_hw_index; 239 bool m_watchpoint_did_occur; 240 bool m_watchpoint_resume_single_step_enabled; 241 242 typedef std::map<uint32_t, Context> SaveRegisterStates; 243 SaveRegisterStates m_saved_register_states; 244 }; 245 246 #endif // #if defined (ARM_THREAD_STATE64_COUNT) 247 #endif // #if defined (__arm__) 248 #endif // #ifndef __DNBArchImplARM64_h__ 249