1 //===-- NativeRegisterContextLinux_ppc64le.cpp ----------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 // This implementation is related to the OpenPOWER ABI for Power Architecture 10 // 64-bit ELF V2 ABI 11 12 #if defined(__powerpc64__) 13 14 #include "NativeRegisterContextLinux_ppc64le.h" 15 16 #include "lldb/Host/common/NativeProcessProtocol.h" 17 #include "lldb/Utility/DataBufferHeap.h" 18 #include "lldb/Utility/Log.h" 19 #include "lldb/Utility/RegisterValue.h" 20 #include "lldb/Utility/Status.h" 21 22 #include "Plugins/Process/Linux/NativeProcessLinux.h" 23 #include "Plugins/Process/Linux/Procfs.h" 24 #include "Plugins/Process/POSIX/ProcessPOSIXLog.h" 25 #include "Plugins/Process/Utility/RegisterInfoPOSIX_ppc64le.h" 26 27 // System includes - They have to be included after framework includes because 28 // they define some macros which collide with variable names in other modules 29 #include <sys/socket.h> 30 #include <elf.h> 31 #include <asm/ptrace.h> 32 33 #define REG_CONTEXT_SIZE \ 34 (GetGPRSize() + GetFPRSize() + sizeof(m_vmx_ppc64le) + sizeof(m_vsx_ppc64le)) 35 using namespace lldb; 36 using namespace lldb_private; 37 using namespace lldb_private::process_linux; 38 39 static const uint32_t g_gpr_regnums_ppc64le[] = { 40 gpr_r0_ppc64le, gpr_r1_ppc64le, gpr_r2_ppc64le, gpr_r3_ppc64le, 41 gpr_r4_ppc64le, gpr_r5_ppc64le, gpr_r6_ppc64le, gpr_r7_ppc64le, 42 gpr_r8_ppc64le, gpr_r9_ppc64le, gpr_r10_ppc64le, gpr_r11_ppc64le, 43 gpr_r12_ppc64le, gpr_r13_ppc64le, gpr_r14_ppc64le, gpr_r15_ppc64le, 44 gpr_r16_ppc64le, gpr_r17_ppc64le, gpr_r18_ppc64le, gpr_r19_ppc64le, 45 gpr_r20_ppc64le, gpr_r21_ppc64le, gpr_r22_ppc64le, gpr_r23_ppc64le, 46 gpr_r24_ppc64le, gpr_r25_ppc64le, gpr_r26_ppc64le, gpr_r27_ppc64le, 47 gpr_r28_ppc64le, gpr_r29_ppc64le, gpr_r30_ppc64le, gpr_r31_ppc64le, 48 gpr_pc_ppc64le, gpr_msr_ppc64le, gpr_origr3_ppc64le, gpr_ctr_ppc64le, 49 gpr_lr_ppc64le, gpr_xer_ppc64le, gpr_cr_ppc64le, gpr_softe_ppc64le, 50 gpr_trap_ppc64le, 51 LLDB_INVALID_REGNUM // register sets need to end with this flag 52 }; 53 54 static const uint32_t g_fpr_regnums_ppc64le[] = { 55 fpr_f0_ppc64le, fpr_f1_ppc64le, fpr_f2_ppc64le, fpr_f3_ppc64le, 56 fpr_f4_ppc64le, fpr_f5_ppc64le, fpr_f6_ppc64le, fpr_f7_ppc64le, 57 fpr_f8_ppc64le, fpr_f9_ppc64le, fpr_f10_ppc64le, fpr_f11_ppc64le, 58 fpr_f12_ppc64le, fpr_f13_ppc64le, fpr_f14_ppc64le, fpr_f15_ppc64le, 59 fpr_f16_ppc64le, fpr_f17_ppc64le, fpr_f18_ppc64le, fpr_f19_ppc64le, 60 fpr_f20_ppc64le, fpr_f21_ppc64le, fpr_f22_ppc64le, fpr_f23_ppc64le, 61 fpr_f24_ppc64le, fpr_f25_ppc64le, fpr_f26_ppc64le, fpr_f27_ppc64le, 62 fpr_f28_ppc64le, fpr_f29_ppc64le, fpr_f30_ppc64le, fpr_f31_ppc64le, 63 fpr_fpscr_ppc64le, 64 LLDB_INVALID_REGNUM // register sets need to end with this flag 65 }; 66 67 static const uint32_t g_vmx_regnums_ppc64le[] = { 68 vmx_vr0_ppc64le, vmx_vr1_ppc64le, vmx_vr2_ppc64le, vmx_vr3_ppc64le, 69 vmx_vr4_ppc64le, vmx_vr5_ppc64le, vmx_vr6_ppc64le, vmx_vr7_ppc64le, 70 vmx_vr8_ppc64le, vmx_vr9_ppc64le, vmx_vr10_ppc64le, vmx_vr11_ppc64le, 71 vmx_vr12_ppc64le, vmx_vr13_ppc64le, vmx_vr14_ppc64le, vmx_vr15_ppc64le, 72 vmx_vr16_ppc64le, vmx_vr17_ppc64le, vmx_vr18_ppc64le, vmx_vr19_ppc64le, 73 vmx_vr20_ppc64le, vmx_vr21_ppc64le, vmx_vr22_ppc64le, vmx_vr23_ppc64le, 74 vmx_vr24_ppc64le, vmx_vr25_ppc64le, vmx_vr26_ppc64le, vmx_vr27_ppc64le, 75 vmx_vr28_ppc64le, vmx_vr29_ppc64le, vmx_vr30_ppc64le, vmx_vr31_ppc64le, 76 vmx_vscr_ppc64le, vmx_vrsave_ppc64le, 77 LLDB_INVALID_REGNUM // register sets need to end with this flag 78 }; 79 80 static const uint32_t g_vsx_regnums_ppc64le[] = { 81 vsx_vs0_ppc64le, vsx_vs1_ppc64le, vsx_vs2_ppc64le, vsx_vs3_ppc64le, 82 vsx_vs4_ppc64le, vsx_vs5_ppc64le, vsx_vs6_ppc64le, vsx_vs7_ppc64le, 83 vsx_vs8_ppc64le, vsx_vs9_ppc64le, vsx_vs10_ppc64le, vsx_vs11_ppc64le, 84 vsx_vs12_ppc64le, vsx_vs13_ppc64le, vsx_vs14_ppc64le, vsx_vs15_ppc64le, 85 vsx_vs16_ppc64le, vsx_vs17_ppc64le, vsx_vs18_ppc64le, vsx_vs19_ppc64le, 86 vsx_vs20_ppc64le, vsx_vs21_ppc64le, vsx_vs22_ppc64le, vsx_vs23_ppc64le, 87 vsx_vs24_ppc64le, vsx_vs25_ppc64le, vsx_vs26_ppc64le, vsx_vs27_ppc64le, 88 vsx_vs28_ppc64le, vsx_vs29_ppc64le, vsx_vs30_ppc64le, vsx_vs31_ppc64le, 89 vsx_vs32_ppc64le, vsx_vs33_ppc64le, vsx_vs34_ppc64le, vsx_vs35_ppc64le, 90 vsx_vs36_ppc64le, vsx_vs37_ppc64le, vsx_vs38_ppc64le, vsx_vs39_ppc64le, 91 vsx_vs40_ppc64le, vsx_vs41_ppc64le, vsx_vs42_ppc64le, vsx_vs43_ppc64le, 92 vsx_vs44_ppc64le, vsx_vs45_ppc64le, vsx_vs46_ppc64le, vsx_vs47_ppc64le, 93 vsx_vs48_ppc64le, vsx_vs49_ppc64le, vsx_vs50_ppc64le, vsx_vs51_ppc64le, 94 vsx_vs52_ppc64le, vsx_vs53_ppc64le, vsx_vs54_ppc64le, vsx_vs55_ppc64le, 95 vsx_vs56_ppc64le, vsx_vs57_ppc64le, vsx_vs58_ppc64le, vsx_vs59_ppc64le, 96 vsx_vs60_ppc64le, vsx_vs61_ppc64le, vsx_vs62_ppc64le, vsx_vs63_ppc64le, 97 LLDB_INVALID_REGNUM // register sets need to end with this flag 98 }; 99 100 namespace { 101 // Number of register sets provided by this context. 102 enum { k_num_register_sets = 4 }; 103 } 104 105 static const RegisterSet g_reg_sets_ppc64le[k_num_register_sets] = { 106 {"General Purpose Registers", "gpr", k_num_gpr_registers_ppc64le, 107 g_gpr_regnums_ppc64le}, 108 {"Floating Point Registers", "fpr", k_num_fpr_registers_ppc64le, 109 g_fpr_regnums_ppc64le}, 110 {"AltiVec/VMX Registers", "vmx", k_num_vmx_registers_ppc64le, 111 g_vmx_regnums_ppc64le}, 112 {"VSX Registers", "vsx", k_num_vsx_registers_ppc64le, 113 g_vsx_regnums_ppc64le}, 114 }; 115 116 std::unique_ptr<NativeRegisterContextLinux> 117 NativeRegisterContextLinux::CreateHostNativeRegisterContextLinux( 118 const ArchSpec &target_arch, NativeThreadLinux &native_thread) { 119 switch (target_arch.GetMachine()) { 120 case llvm::Triple::ppc64le: 121 return std::make_unique<NativeRegisterContextLinux_ppc64le>(target_arch, 122 native_thread); 123 default: 124 llvm_unreachable("have no register context for architecture"); 125 } 126 } 127 128 NativeRegisterContextLinux_ppc64le::NativeRegisterContextLinux_ppc64le( 129 const ArchSpec &target_arch, NativeThreadProtocol &native_thread) 130 : NativeRegisterContextRegisterInfo( 131 native_thread, new RegisterInfoPOSIX_ppc64le(target_arch)), 132 NativeRegisterContextLinux(native_thread) { 133 if (target_arch.GetMachine() != llvm::Triple::ppc64le) { 134 llvm_unreachable("Unhandled target architecture."); 135 } 136 137 ::memset(&m_gpr_ppc64le, 0, sizeof(m_gpr_ppc64le)); 138 ::memset(&m_fpr_ppc64le, 0, sizeof(m_fpr_ppc64le)); 139 ::memset(&m_vmx_ppc64le, 0, sizeof(m_vmx_ppc64le)); 140 ::memset(&m_vsx_ppc64le, 0, sizeof(m_vsx_ppc64le)); 141 ::memset(&m_hwp_regs, 0, sizeof(m_hwp_regs)); 142 } 143 144 uint32_t NativeRegisterContextLinux_ppc64le::GetRegisterSetCount() const { 145 return k_num_register_sets; 146 } 147 148 const RegisterSet * 149 NativeRegisterContextLinux_ppc64le::GetRegisterSet(uint32_t set_index) const { 150 if (set_index < k_num_register_sets) 151 return &g_reg_sets_ppc64le[set_index]; 152 153 return nullptr; 154 } 155 156 uint32_t NativeRegisterContextLinux_ppc64le::GetUserRegisterCount() const { 157 uint32_t count = 0; 158 for (uint32_t set_index = 0; set_index < k_num_register_sets; ++set_index) 159 count += g_reg_sets_ppc64le[set_index].num_registers; 160 return count; 161 } 162 163 Status NativeRegisterContextLinux_ppc64le::ReadRegister( 164 const RegisterInfo *reg_info, RegisterValue ®_value) { 165 Status error; 166 167 if (!reg_info) { 168 error.SetErrorString("reg_info NULL"); 169 return error; 170 } 171 172 const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB]; 173 174 if (IsFPR(reg)) { 175 error = ReadFPR(); 176 if (error.Fail()) 177 return error; 178 179 // Get pointer to m_fpr_ppc64le variable and set the data from it. 180 uint32_t fpr_offset = CalculateFprOffset(reg_info); 181 assert(fpr_offset < sizeof m_fpr_ppc64le); 182 uint8_t *src = (uint8_t *)&m_fpr_ppc64le + fpr_offset; 183 reg_value.SetFromMemoryData(reg_info, src, reg_info->byte_size, 184 eByteOrderLittle, error); 185 } else if (IsVSX(reg)) { 186 uint32_t vsx_offset = CalculateVsxOffset(reg_info); 187 assert(vsx_offset < sizeof(m_vsx_ppc64le)); 188 189 if (vsx_offset < sizeof(m_vsx_ppc64le) / 2) { 190 error = ReadVSX(); 191 if (error.Fail()) 192 return error; 193 194 error = ReadFPR(); 195 if (error.Fail()) 196 return error; 197 198 uint64_t value[2]; 199 uint8_t *dst, *src; 200 dst = (uint8_t *)&value; 201 src = (uint8_t *)&m_vsx_ppc64le + vsx_offset / 2; 202 ::memcpy(dst, src, 8); 203 dst += 8; 204 src = (uint8_t *)&m_fpr_ppc64le + vsx_offset / 2; 205 ::memcpy(dst, src, 8); 206 reg_value.SetFromMemoryData(reg_info, &value, reg_info->byte_size, 207 eByteOrderLittle, error); 208 } else { 209 error = ReadVMX(); 210 if (error.Fail()) 211 return error; 212 213 // Get pointer to m_vmx_ppc64le variable and set the data from it. 214 uint32_t vmx_offset = vsx_offset - sizeof(m_vsx_ppc64le) / 2; 215 uint8_t *src = (uint8_t *)&m_vmx_ppc64le + vmx_offset; 216 reg_value.SetFromMemoryData(reg_info, src, reg_info->byte_size, 217 eByteOrderLittle, error); 218 } 219 } else if (IsVMX(reg)) { 220 error = ReadVMX(); 221 if (error.Fail()) 222 return error; 223 224 // Get pointer to m_vmx_ppc64le variable and set the data from it. 225 uint32_t vmx_offset = CalculateVmxOffset(reg_info); 226 assert(vmx_offset < sizeof m_vmx_ppc64le); 227 uint8_t *src = (uint8_t *)&m_vmx_ppc64le + vmx_offset; 228 reg_value.SetFromMemoryData(reg_info, src, reg_info->byte_size, 229 eByteOrderLittle, error); 230 } else if (IsGPR(reg)) { 231 error = ReadGPR(); 232 if (error.Fail()) 233 return error; 234 235 uint8_t *src = (uint8_t *) &m_gpr_ppc64le + reg_info->byte_offset; 236 reg_value.SetFromMemoryData(reg_info, src, reg_info->byte_size, 237 eByteOrderLittle, error); 238 } else { 239 return Status("failed - register wasn't recognized to be a GPR, FPR, VSX " 240 "or VMX, read strategy unknown"); 241 } 242 243 return error; 244 } 245 246 Status NativeRegisterContextLinux_ppc64le::WriteRegister( 247 const RegisterInfo *reg_info, const RegisterValue ®_value) { 248 Status error; 249 if (!reg_info) 250 return Status("reg_info NULL"); 251 252 const uint32_t reg_index = reg_info->kinds[lldb::eRegisterKindLLDB]; 253 if (reg_index == LLDB_INVALID_REGNUM) 254 return Status("no lldb regnum for %s", reg_info && reg_info->name 255 ? reg_info->name 256 : "<unknown register>"); 257 258 if (IsGPR(reg_index)) { 259 error = ReadGPR(); 260 if (error.Fail()) 261 return error; 262 263 uint8_t *dst = (uint8_t *)&m_gpr_ppc64le + reg_info->byte_offset; 264 ::memcpy(dst, reg_value.GetBytes(), reg_value.GetByteSize()); 265 266 error = WriteGPR(); 267 if (error.Fail()) 268 return error; 269 270 return Status(); 271 } 272 273 if (IsFPR(reg_index)) { 274 error = ReadFPR(); 275 if (error.Fail()) 276 return error; 277 278 // Get pointer to m_fpr_ppc64le variable and set the data to it. 279 uint32_t fpr_offset = CalculateFprOffset(reg_info); 280 assert(fpr_offset < GetFPRSize()); 281 uint8_t *dst = (uint8_t *)&m_fpr_ppc64le + fpr_offset; 282 ::memcpy(dst, reg_value.GetBytes(), reg_value.GetByteSize()); 283 284 error = WriteFPR(); 285 if (error.Fail()) 286 return error; 287 288 return Status(); 289 } 290 291 if (IsVMX(reg_index)) { 292 error = ReadVMX(); 293 if (error.Fail()) 294 return error; 295 296 // Get pointer to m_vmx_ppc64le variable and set the data to it. 297 uint32_t vmx_offset = CalculateVmxOffset(reg_info); 298 assert(vmx_offset < sizeof(m_vmx_ppc64le)); 299 uint8_t *dst = (uint8_t *)&m_vmx_ppc64le + vmx_offset; 300 ::memcpy(dst, reg_value.GetBytes(), reg_value.GetByteSize()); 301 302 error = WriteVMX(); 303 if (error.Fail()) 304 return error; 305 306 return Status(); 307 } 308 309 if (IsVSX(reg_index)) { 310 uint32_t vsx_offset = CalculateVsxOffset(reg_info); 311 assert(vsx_offset < sizeof(m_vsx_ppc64le)); 312 313 if (vsx_offset < sizeof(m_vsx_ppc64le) / 2) { 314 error = ReadVSX(); 315 if (error.Fail()) 316 return error; 317 318 error = ReadFPR(); 319 if (error.Fail()) 320 return error; 321 322 uint64_t value[2]; 323 ::memcpy(value, reg_value.GetBytes(), 16); 324 uint8_t *dst, *src; 325 src = (uint8_t *)value; 326 dst = (uint8_t *)&m_vsx_ppc64le + vsx_offset / 2; 327 ::memcpy(dst, src, 8); 328 src += 8; 329 dst = (uint8_t *)&m_fpr_ppc64le + vsx_offset / 2; 330 ::memcpy(dst, src, 8); 331 332 WriteVSX(); 333 WriteFPR(); 334 } else { 335 error = ReadVMX(); 336 if (error.Fail()) 337 return error; 338 339 // Get pointer to m_vmx_ppc64le variable and set the data from it. 340 uint32_t vmx_offset = vsx_offset - sizeof(m_vsx_ppc64le) / 2; 341 uint8_t *dst = (uint8_t *)&m_vmx_ppc64le + vmx_offset; 342 ::memcpy(dst, reg_value.GetBytes(), reg_value.GetByteSize()); 343 WriteVMX(); 344 } 345 346 return Status(); 347 } 348 349 return Status("failed - register wasn't recognized to be a GPR, FPR, VSX " 350 "or VMX, write strategy unknown"); 351 } 352 353 Status NativeRegisterContextLinux_ppc64le::ReadAllRegisterValues( 354 lldb::DataBufferSP &data_sp) { 355 Status error; 356 357 data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0)); 358 error = ReadGPR(); 359 if (error.Fail()) 360 return error; 361 362 error = ReadFPR(); 363 if (error.Fail()) 364 return error; 365 366 error = ReadVMX(); 367 if (error.Fail()) 368 return error; 369 370 error = ReadVSX(); 371 if (error.Fail()) 372 return error; 373 374 uint8_t *dst = data_sp->GetBytes(); 375 ::memcpy(dst, &m_gpr_ppc64le, GetGPRSize()); 376 dst += GetGPRSize(); 377 ::memcpy(dst, &m_fpr_ppc64le, GetFPRSize()); 378 dst += GetFPRSize(); 379 ::memcpy(dst, &m_vmx_ppc64le, sizeof(m_vmx_ppc64le)); 380 dst += sizeof(m_vmx_ppc64le); 381 ::memcpy(dst, &m_vsx_ppc64le, sizeof(m_vsx_ppc64le)); 382 383 return error; 384 } 385 386 Status NativeRegisterContextLinux_ppc64le::WriteAllRegisterValues( 387 const lldb::DataBufferSP &data_sp) { 388 Status error; 389 390 if (!data_sp) { 391 error.SetErrorStringWithFormat( 392 "NativeRegisterContextLinux_ppc64le::%s invalid data_sp provided", 393 __FUNCTION__); 394 return error; 395 } 396 397 if (data_sp->GetByteSize() != REG_CONTEXT_SIZE) { 398 error.SetErrorStringWithFormat( 399 "NativeRegisterContextLinux_ppc64le::%s data_sp contained mismatched " 400 "data size, expected %" PRIu64 ", actual %" PRIu64, 401 __FUNCTION__, REG_CONTEXT_SIZE, data_sp->GetByteSize()); 402 return error; 403 } 404 405 uint8_t *src = data_sp->GetBytes(); 406 if (src == nullptr) { 407 error.SetErrorStringWithFormat("NativeRegisterContextLinux_ppc64le::%s " 408 "DataBuffer::GetBytes() returned a null " 409 "pointer", 410 __FUNCTION__); 411 return error; 412 } 413 414 ::memcpy(&m_gpr_ppc64le, src, GetGPRSize()); 415 error = WriteGPR(); 416 417 if (error.Fail()) 418 return error; 419 420 src += GetGPRSize(); 421 ::memcpy(&m_fpr_ppc64le, src, GetFPRSize()); 422 423 error = WriteFPR(); 424 if (error.Fail()) 425 return error; 426 427 src += GetFPRSize(); 428 ::memcpy(&m_vmx_ppc64le, src, sizeof(m_vmx_ppc64le)); 429 430 error = WriteVMX(); 431 if (error.Fail()) 432 return error; 433 434 src += sizeof(m_vmx_ppc64le); 435 ::memcpy(&m_vsx_ppc64le, src, sizeof(m_vsx_ppc64le)); 436 error = WriteVSX(); 437 438 return error; 439 } 440 441 bool NativeRegisterContextLinux_ppc64le::IsGPR(unsigned reg) const { 442 return reg <= k_last_gpr_ppc64le; // GPR's come first. 443 } 444 445 bool NativeRegisterContextLinux_ppc64le::IsFPR(unsigned reg) const { 446 return (k_first_fpr_ppc64le <= reg && reg <= k_last_fpr_ppc64le); 447 } 448 449 uint32_t NativeRegisterContextLinux_ppc64le::CalculateFprOffset( 450 const RegisterInfo *reg_info) const { 451 return reg_info->byte_offset - 452 GetRegisterInfoAtIndex(k_first_fpr_ppc64le)->byte_offset; 453 } 454 455 uint32_t NativeRegisterContextLinux_ppc64le::CalculateVmxOffset( 456 const RegisterInfo *reg_info) const { 457 return reg_info->byte_offset - 458 GetRegisterInfoAtIndex(k_first_vmx_ppc64le)->byte_offset; 459 } 460 461 uint32_t NativeRegisterContextLinux_ppc64le::CalculateVsxOffset( 462 const RegisterInfo *reg_info) const { 463 return reg_info->byte_offset - 464 GetRegisterInfoAtIndex(k_first_vsx_ppc64le)->byte_offset; 465 } 466 467 Status NativeRegisterContextLinux_ppc64le::ReadVMX() { 468 int regset = NT_PPC_VMX; 469 return NativeProcessLinux::PtraceWrapper(PTRACE_GETVRREGS, m_thread.GetID(), 470 ®set, &m_vmx_ppc64le, 471 sizeof(m_vmx_ppc64le)); 472 } 473 474 Status NativeRegisterContextLinux_ppc64le::WriteVMX() { 475 int regset = NT_PPC_VMX; 476 return NativeProcessLinux::PtraceWrapper(PTRACE_SETVRREGS, m_thread.GetID(), 477 ®set, &m_vmx_ppc64le, 478 sizeof(m_vmx_ppc64le)); 479 } 480 481 Status NativeRegisterContextLinux_ppc64le::ReadVSX() { 482 int regset = NT_PPC_VSX; 483 return NativeProcessLinux::PtraceWrapper(PTRACE_GETVSRREGS, m_thread.GetID(), 484 ®set, &m_vsx_ppc64le, 485 sizeof(m_vsx_ppc64le)); 486 } 487 488 Status NativeRegisterContextLinux_ppc64le::WriteVSX() { 489 int regset = NT_PPC_VSX; 490 return NativeProcessLinux::PtraceWrapper(PTRACE_SETVSRREGS, m_thread.GetID(), 491 ®set, &m_vsx_ppc64le, 492 sizeof(m_vsx_ppc64le)); 493 } 494 495 bool NativeRegisterContextLinux_ppc64le::IsVMX(unsigned reg) { 496 return (reg >= k_first_vmx_ppc64le) && (reg <= k_last_vmx_ppc64le); 497 } 498 499 bool NativeRegisterContextLinux_ppc64le::IsVSX(unsigned reg) { 500 return (reg >= k_first_vsx_ppc64le) && (reg <= k_last_vsx_ppc64le); 501 } 502 503 uint32_t NativeRegisterContextLinux_ppc64le::NumSupportedHardwareWatchpoints() { 504 Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); 505 506 // Read hardware breakpoint and watchpoint information. 507 Status error = ReadHardwareDebugInfo(); 508 509 if (error.Fail()) 510 return 0; 511 512 LLDB_LOG(log, "{0}", m_max_hwp_supported); 513 return m_max_hwp_supported; 514 } 515 516 uint32_t NativeRegisterContextLinux_ppc64le::SetHardwareWatchpoint( 517 lldb::addr_t addr, size_t size, uint32_t watch_flags) { 518 Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); 519 LLDB_LOG(log, "addr: {0:x}, size: {1:x} watch_flags: {2:x}", addr, size, 520 watch_flags); 521 522 // Read hardware breakpoint and watchpoint information. 523 Status error = ReadHardwareDebugInfo(); 524 525 if (error.Fail()) 526 return LLDB_INVALID_INDEX32; 527 528 uint32_t control_value = 0, wp_index = 0; 529 lldb::addr_t real_addr = addr; 530 uint32_t rw_mode = 0; 531 532 // Check if we are setting watchpoint other than read/write/access Update 533 // watchpoint flag to match ppc64le write-read bit configuration. 534 switch (watch_flags) { 535 case eWatchpointKindWrite: 536 rw_mode = PPC_BREAKPOINT_TRIGGER_WRITE; 537 watch_flags = 2; 538 break; 539 case eWatchpointKindRead: 540 rw_mode = PPC_BREAKPOINT_TRIGGER_READ; 541 watch_flags = 1; 542 break; 543 case (eWatchpointKindRead | eWatchpointKindWrite): 544 rw_mode = PPC_BREAKPOINT_TRIGGER_RW; 545 break; 546 default: 547 return LLDB_INVALID_INDEX32; 548 } 549 550 // Check if size has a valid hardware watchpoint length. 551 if (size != 1 && size != 2 && size != 4 && size != 8) 552 return LLDB_INVALID_INDEX32; 553 554 // Check 8-byte alignment for hardware watchpoint target address. Below is a 555 // hack to recalculate address and size in order to make sure we can watch 556 // non 8-byte aligned addresses as well. 557 if (addr & 0x07) { 558 559 addr_t begin = llvm::alignDown(addr, 8); 560 addr_t end = llvm::alignTo(addr + size, 8); 561 size = llvm::PowerOf2Ceil(end - begin); 562 563 addr = addr & (~0x07); 564 } 565 566 // Setup control value 567 control_value = watch_flags << 3; 568 control_value |= ((1 << size) - 1) << 5; 569 control_value |= (2 << 1) | 1; 570 571 // Iterate over stored watchpoints and find a free wp_index 572 wp_index = LLDB_INVALID_INDEX32; 573 for (uint32_t i = 0; i < m_max_hwp_supported; i++) { 574 if ((m_hwp_regs[i].control & 1) == 0) { 575 wp_index = i; // Mark last free slot 576 } else if (m_hwp_regs[i].address == addr) { 577 return LLDB_INVALID_INDEX32; // We do not support duplicate watchpoints. 578 } 579 } 580 581 if (wp_index == LLDB_INVALID_INDEX32) 582 return LLDB_INVALID_INDEX32; 583 584 // Update watchpoint in local cache 585 m_hwp_regs[wp_index].real_addr = real_addr; 586 m_hwp_regs[wp_index].address = addr; 587 m_hwp_regs[wp_index].control = control_value; 588 m_hwp_regs[wp_index].mode = rw_mode; 589 590 // PTRACE call to set corresponding watchpoint register. 591 error = WriteHardwareDebugRegs(); 592 593 if (error.Fail()) { 594 m_hwp_regs[wp_index].address = 0; 595 m_hwp_regs[wp_index].control &= llvm::maskTrailingZeros<uint32_t>(1); 596 597 return LLDB_INVALID_INDEX32; 598 } 599 600 return wp_index; 601 } 602 603 bool NativeRegisterContextLinux_ppc64le::ClearHardwareWatchpoint( 604 uint32_t wp_index) { 605 Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); 606 LLDB_LOG(log, "wp_index: {0}", wp_index); 607 608 // Read hardware breakpoint and watchpoint information. 609 Status error = ReadHardwareDebugInfo(); 610 611 if (error.Fail()) 612 return false; 613 614 if (wp_index >= m_max_hwp_supported) 615 return false; 616 617 // Create a backup we can revert to in case of failure. 618 lldb::addr_t tempAddr = m_hwp_regs[wp_index].address; 619 uint32_t tempControl = m_hwp_regs[wp_index].control; 620 long *tempSlot = reinterpret_cast<long *>(m_hwp_regs[wp_index].slot); 621 622 // Update watchpoint in local cache 623 m_hwp_regs[wp_index].control &= llvm::maskTrailingZeros<uint32_t>(1); 624 m_hwp_regs[wp_index].address = 0; 625 m_hwp_regs[wp_index].slot = 0; 626 m_hwp_regs[wp_index].mode = 0; 627 628 // Ptrace call to update hardware debug registers 629 error = NativeProcessLinux::PtraceWrapper(PPC_PTRACE_DELHWDEBUG, 630 m_thread.GetID(), 0, tempSlot); 631 632 if (error.Fail()) { 633 m_hwp_regs[wp_index].control = tempControl; 634 m_hwp_regs[wp_index].address = tempAddr; 635 m_hwp_regs[wp_index].slot = reinterpret_cast<long>(tempSlot); 636 637 return false; 638 } 639 640 return true; 641 } 642 643 uint32_t 644 NativeRegisterContextLinux_ppc64le::GetWatchpointSize(uint32_t wp_index) { 645 Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); 646 LLDB_LOG(log, "wp_index: {0}", wp_index); 647 648 unsigned control = (m_hwp_regs[wp_index].control >> 5) & 0xff; 649 if (llvm::isPowerOf2_32(control + 1)) { 650 return llvm::countPopulation(control); 651 } 652 653 return 0; 654 } 655 656 bool NativeRegisterContextLinux_ppc64le::WatchpointIsEnabled( 657 uint32_t wp_index) { 658 Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); 659 LLDB_LOG(log, "wp_index: {0}", wp_index); 660 661 return !!((m_hwp_regs[wp_index].control & 0x1) == 0x1); 662 } 663 664 Status NativeRegisterContextLinux_ppc64le::GetWatchpointHitIndex( 665 uint32_t &wp_index, lldb::addr_t trap_addr) { 666 Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); 667 LLDB_LOG(log, "wp_index: {0}, trap_addr: {1:x}", wp_index, trap_addr); 668 669 uint32_t watch_size; 670 lldb::addr_t watch_addr; 671 672 for (wp_index = 0; wp_index < m_max_hwp_supported; ++wp_index) { 673 watch_size = GetWatchpointSize(wp_index); 674 watch_addr = m_hwp_regs[wp_index].address; 675 676 if (WatchpointIsEnabled(wp_index) && trap_addr >= watch_addr && 677 trap_addr <= watch_addr + watch_size) { 678 m_hwp_regs[wp_index].hit_addr = trap_addr; 679 return Status(); 680 } 681 } 682 683 wp_index = LLDB_INVALID_INDEX32; 684 return Status(); 685 } 686 687 lldb::addr_t 688 NativeRegisterContextLinux_ppc64le::GetWatchpointAddress(uint32_t wp_index) { 689 Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); 690 LLDB_LOG(log, "wp_index: {0}", wp_index); 691 692 if (wp_index >= m_max_hwp_supported) 693 return LLDB_INVALID_ADDRESS; 694 695 if (WatchpointIsEnabled(wp_index)) 696 return m_hwp_regs[wp_index].real_addr; 697 else 698 return LLDB_INVALID_ADDRESS; 699 } 700 701 lldb::addr_t 702 NativeRegisterContextLinux_ppc64le::GetWatchpointHitAddress(uint32_t wp_index) { 703 Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); 704 LLDB_LOG(log, "wp_index: {0}", wp_index); 705 706 if (wp_index >= m_max_hwp_supported) 707 return LLDB_INVALID_ADDRESS; 708 709 if (WatchpointIsEnabled(wp_index)) 710 return m_hwp_regs[wp_index].hit_addr; 711 712 return LLDB_INVALID_ADDRESS; 713 } 714 715 Status NativeRegisterContextLinux_ppc64le::ReadHardwareDebugInfo() { 716 if (!m_refresh_hwdebug_info) { 717 return Status(); 718 } 719 720 ::pid_t tid = m_thread.GetID(); 721 722 struct ppc_debug_info hwdebug_info; 723 Status error; 724 725 error = NativeProcessLinux::PtraceWrapper( 726 PPC_PTRACE_GETHWDBGINFO, tid, 0, &hwdebug_info, sizeof(hwdebug_info)); 727 728 if (error.Fail()) 729 return error; 730 731 m_max_hwp_supported = hwdebug_info.num_data_bps; 732 m_max_hbp_supported = hwdebug_info.num_instruction_bps; 733 m_refresh_hwdebug_info = false; 734 735 return error; 736 } 737 738 Status NativeRegisterContextLinux_ppc64le::WriteHardwareDebugRegs() { 739 struct ppc_hw_breakpoint reg_state; 740 Status error; 741 long ret; 742 743 for (uint32_t i = 0; i < m_max_hwp_supported; i++) { 744 reg_state.addr = m_hwp_regs[i].address; 745 reg_state.trigger_type = m_hwp_regs[i].mode; 746 reg_state.version = 1; 747 reg_state.addr_mode = PPC_BREAKPOINT_MODE_EXACT; 748 reg_state.condition_mode = PPC_BREAKPOINT_CONDITION_NONE; 749 reg_state.addr2 = 0; 750 reg_state.condition_value = 0; 751 752 error = NativeProcessLinux::PtraceWrapper(PPC_PTRACE_SETHWDEBUG, 753 m_thread.GetID(), 0, ®_state, 754 sizeof(reg_state), &ret); 755 756 if (error.Fail()) 757 return error; 758 759 m_hwp_regs[i].slot = ret; 760 } 761 762 return error; 763 } 764 765 #endif // defined(__powerpc64__) 766