1 //===-- NativeRegisterContextLinux_ppc64le.cpp ------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 // This implementation is related to the OpenPOWER ABI for Power Architecture 10 // 64-bit ELF V2 ABI 11 12 #if defined(__powerpc64__) 13 14 #include "NativeRegisterContextLinux_ppc64le.h" 15 16 #include "lldb/Host/common/NativeProcessProtocol.h" 17 #include "lldb/Utility/DataBufferHeap.h" 18 #include "lldb/Utility/Log.h" 19 #include "lldb/Utility/RegisterValue.h" 20 #include "lldb/Utility/Status.h" 21 22 #include "Plugins/Process/Linux/NativeProcessLinux.h" 23 #include "Plugins/Process/Linux/Procfs.h" 24 #include "Plugins/Process/POSIX/ProcessPOSIXLog.h" 25 #include "Plugins/Process/Utility/RegisterInfoPOSIX_ppc64le.h" 26 27 // System includes - They have to be included after framework includes because 28 // they define some macros which collide with variable names in other modules 29 #include <sys/socket.h> 30 #include <elf.h> 31 #include <asm/ptrace.h> 32 33 #define REG_CONTEXT_SIZE \ 34 (GetGPRSize() + GetFPRSize() + sizeof(m_vmx_ppc64le) + sizeof(m_vsx_ppc64le)) 35 using namespace lldb; 36 using namespace lldb_private; 37 using namespace lldb_private::process_linux; 38 39 static const uint32_t g_gpr_regnums_ppc64le[] = { 40 gpr_r0_ppc64le, gpr_r1_ppc64le, gpr_r2_ppc64le, gpr_r3_ppc64le, 41 gpr_r4_ppc64le, gpr_r5_ppc64le, gpr_r6_ppc64le, gpr_r7_ppc64le, 42 gpr_r8_ppc64le, gpr_r9_ppc64le, gpr_r10_ppc64le, gpr_r11_ppc64le, 43 gpr_r12_ppc64le, gpr_r13_ppc64le, gpr_r14_ppc64le, gpr_r15_ppc64le, 44 gpr_r16_ppc64le, gpr_r17_ppc64le, gpr_r18_ppc64le, gpr_r19_ppc64le, 45 gpr_r20_ppc64le, gpr_r21_ppc64le, gpr_r22_ppc64le, gpr_r23_ppc64le, 46 gpr_r24_ppc64le, gpr_r25_ppc64le, gpr_r26_ppc64le, gpr_r27_ppc64le, 47 gpr_r28_ppc64le, gpr_r29_ppc64le, gpr_r30_ppc64le, gpr_r31_ppc64le, 48 gpr_pc_ppc64le, gpr_msr_ppc64le, gpr_origr3_ppc64le, gpr_ctr_ppc64le, 49 gpr_lr_ppc64le, gpr_xer_ppc64le, gpr_cr_ppc64le, gpr_softe_ppc64le, 50 gpr_trap_ppc64le, 51 LLDB_INVALID_REGNUM // register sets need to end with this flag 52 }; 53 54 static const uint32_t g_fpr_regnums_ppc64le[] = { 55 fpr_f0_ppc64le, fpr_f1_ppc64le, fpr_f2_ppc64le, fpr_f3_ppc64le, 56 fpr_f4_ppc64le, fpr_f5_ppc64le, fpr_f6_ppc64le, fpr_f7_ppc64le, 57 fpr_f8_ppc64le, fpr_f9_ppc64le, fpr_f10_ppc64le, fpr_f11_ppc64le, 58 fpr_f12_ppc64le, fpr_f13_ppc64le, fpr_f14_ppc64le, fpr_f15_ppc64le, 59 fpr_f16_ppc64le, fpr_f17_ppc64le, fpr_f18_ppc64le, fpr_f19_ppc64le, 60 fpr_f20_ppc64le, fpr_f21_ppc64le, fpr_f22_ppc64le, fpr_f23_ppc64le, 61 fpr_f24_ppc64le, fpr_f25_ppc64le, fpr_f26_ppc64le, fpr_f27_ppc64le, 62 fpr_f28_ppc64le, fpr_f29_ppc64le, fpr_f30_ppc64le, fpr_f31_ppc64le, 63 fpr_fpscr_ppc64le, 64 LLDB_INVALID_REGNUM // register sets need to end with this flag 65 }; 66 67 static const uint32_t g_vmx_regnums_ppc64le[] = { 68 vmx_vr0_ppc64le, vmx_vr1_ppc64le, vmx_vr2_ppc64le, vmx_vr3_ppc64le, 69 vmx_vr4_ppc64le, vmx_vr5_ppc64le, vmx_vr6_ppc64le, vmx_vr7_ppc64le, 70 vmx_vr8_ppc64le, vmx_vr9_ppc64le, vmx_vr10_ppc64le, vmx_vr11_ppc64le, 71 vmx_vr12_ppc64le, vmx_vr13_ppc64le, vmx_vr14_ppc64le, vmx_vr15_ppc64le, 72 vmx_vr16_ppc64le, vmx_vr17_ppc64le, vmx_vr18_ppc64le, vmx_vr19_ppc64le, 73 vmx_vr20_ppc64le, vmx_vr21_ppc64le, vmx_vr22_ppc64le, vmx_vr23_ppc64le, 74 vmx_vr24_ppc64le, vmx_vr25_ppc64le, vmx_vr26_ppc64le, vmx_vr27_ppc64le, 75 vmx_vr28_ppc64le, vmx_vr29_ppc64le, vmx_vr30_ppc64le, vmx_vr31_ppc64le, 76 vmx_vscr_ppc64le, vmx_vrsave_ppc64le, 77 LLDB_INVALID_REGNUM // register sets need to end with this flag 78 }; 79 80 static const uint32_t g_vsx_regnums_ppc64le[] = { 81 vsx_vs0_ppc64le, vsx_vs1_ppc64le, vsx_vs2_ppc64le, vsx_vs3_ppc64le, 82 vsx_vs4_ppc64le, vsx_vs5_ppc64le, vsx_vs6_ppc64le, vsx_vs7_ppc64le, 83 vsx_vs8_ppc64le, vsx_vs9_ppc64le, vsx_vs10_ppc64le, vsx_vs11_ppc64le, 84 vsx_vs12_ppc64le, vsx_vs13_ppc64le, vsx_vs14_ppc64le, vsx_vs15_ppc64le, 85 vsx_vs16_ppc64le, vsx_vs17_ppc64le, vsx_vs18_ppc64le, vsx_vs19_ppc64le, 86 vsx_vs20_ppc64le, vsx_vs21_ppc64le, vsx_vs22_ppc64le, vsx_vs23_ppc64le, 87 vsx_vs24_ppc64le, vsx_vs25_ppc64le, vsx_vs26_ppc64le, vsx_vs27_ppc64le, 88 vsx_vs28_ppc64le, vsx_vs29_ppc64le, vsx_vs30_ppc64le, vsx_vs31_ppc64le, 89 vsx_vs32_ppc64le, vsx_vs33_ppc64le, vsx_vs34_ppc64le, vsx_vs35_ppc64le, 90 vsx_vs36_ppc64le, vsx_vs37_ppc64le, vsx_vs38_ppc64le, vsx_vs39_ppc64le, 91 vsx_vs40_ppc64le, vsx_vs41_ppc64le, vsx_vs42_ppc64le, vsx_vs43_ppc64le, 92 vsx_vs44_ppc64le, vsx_vs45_ppc64le, vsx_vs46_ppc64le, vsx_vs47_ppc64le, 93 vsx_vs48_ppc64le, vsx_vs49_ppc64le, vsx_vs50_ppc64le, vsx_vs51_ppc64le, 94 vsx_vs52_ppc64le, vsx_vs53_ppc64le, vsx_vs54_ppc64le, vsx_vs55_ppc64le, 95 vsx_vs56_ppc64le, vsx_vs57_ppc64le, vsx_vs58_ppc64le, vsx_vs59_ppc64le, 96 vsx_vs60_ppc64le, vsx_vs61_ppc64le, vsx_vs62_ppc64le, vsx_vs63_ppc64le, 97 LLDB_INVALID_REGNUM // register sets need to end with this flag 98 }; 99 100 namespace { 101 // Number of register sets provided by this context. 102 enum { k_num_register_sets = 4 }; 103 } 104 105 static const RegisterSet g_reg_sets_ppc64le[k_num_register_sets] = { 106 {"General Purpose Registers", "gpr", k_num_gpr_registers_ppc64le, 107 g_gpr_regnums_ppc64le}, 108 {"Floating Point Registers", "fpr", k_num_fpr_registers_ppc64le, 109 g_fpr_regnums_ppc64le}, 110 {"AltiVec/VMX Registers", "vmx", k_num_vmx_registers_ppc64le, 111 g_vmx_regnums_ppc64le}, 112 {"VSX Registers", "vsx", k_num_vsx_registers_ppc64le, 113 g_vsx_regnums_ppc64le}, 114 }; 115 116 std::unique_ptr<NativeRegisterContextLinux> 117 NativeRegisterContextLinux::CreateHostNativeRegisterContextLinux( 118 const ArchSpec &target_arch, NativeThreadProtocol &native_thread) { 119 switch (target_arch.GetMachine()) { 120 case llvm::Triple::ppc64le: 121 return std::make_unique<NativeRegisterContextLinux_ppc64le>(target_arch, 122 native_thread); 123 default: 124 llvm_unreachable("have no register context for architecture"); 125 } 126 } 127 128 NativeRegisterContextLinux_ppc64le::NativeRegisterContextLinux_ppc64le( 129 const ArchSpec &target_arch, NativeThreadProtocol &native_thread) 130 : NativeRegisterContextLinux(native_thread, 131 new RegisterInfoPOSIX_ppc64le(target_arch)) { 132 if (target_arch.GetMachine() != llvm::Triple::ppc64le) { 133 llvm_unreachable("Unhandled target architecture."); 134 } 135 136 ::memset(&m_gpr_ppc64le, 0, sizeof(m_gpr_ppc64le)); 137 ::memset(&m_fpr_ppc64le, 0, sizeof(m_fpr_ppc64le)); 138 ::memset(&m_vmx_ppc64le, 0, sizeof(m_vmx_ppc64le)); 139 ::memset(&m_vsx_ppc64le, 0, sizeof(m_vsx_ppc64le)); 140 ::memset(&m_hwp_regs, 0, sizeof(m_hwp_regs)); 141 } 142 143 uint32_t NativeRegisterContextLinux_ppc64le::GetRegisterSetCount() const { 144 return k_num_register_sets; 145 } 146 147 const RegisterSet * 148 NativeRegisterContextLinux_ppc64le::GetRegisterSet(uint32_t set_index) const { 149 if (set_index < k_num_register_sets) 150 return &g_reg_sets_ppc64le[set_index]; 151 152 return nullptr; 153 } 154 155 uint32_t NativeRegisterContextLinux_ppc64le::GetUserRegisterCount() const { 156 uint32_t count = 0; 157 for (uint32_t set_index = 0; set_index < k_num_register_sets; ++set_index) 158 count += g_reg_sets_ppc64le[set_index].num_registers; 159 return count; 160 } 161 162 Status NativeRegisterContextLinux_ppc64le::ReadRegister( 163 const RegisterInfo *reg_info, RegisterValue ®_value) { 164 Status error; 165 166 if (!reg_info) { 167 error.SetErrorString("reg_info NULL"); 168 return error; 169 } 170 171 const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB]; 172 173 if (IsFPR(reg)) { 174 error = ReadFPR(); 175 if (error.Fail()) 176 return error; 177 178 // Get pointer to m_fpr_ppc64le variable and set the data from it. 179 uint32_t fpr_offset = CalculateFprOffset(reg_info); 180 assert(fpr_offset < sizeof m_fpr_ppc64le); 181 uint8_t *src = (uint8_t *)&m_fpr_ppc64le + fpr_offset; 182 reg_value.SetFromMemoryData(reg_info, src, reg_info->byte_size, 183 eByteOrderLittle, error); 184 } else if (IsVSX(reg)) { 185 uint32_t vsx_offset = CalculateVsxOffset(reg_info); 186 assert(vsx_offset < sizeof(m_vsx_ppc64le)); 187 188 if (vsx_offset < sizeof(m_vsx_ppc64le) / 2) { 189 error = ReadVSX(); 190 if (error.Fail()) 191 return error; 192 193 error = ReadFPR(); 194 if (error.Fail()) 195 return error; 196 197 uint64_t value[2]; 198 uint8_t *dst, *src; 199 dst = (uint8_t *)&value; 200 src = (uint8_t *)&m_vsx_ppc64le + vsx_offset / 2; 201 ::memcpy(dst, src, 8); 202 dst += 8; 203 src = (uint8_t *)&m_fpr_ppc64le + vsx_offset / 2; 204 ::memcpy(dst, src, 8); 205 reg_value.SetFromMemoryData(reg_info, &value, reg_info->byte_size, 206 eByteOrderLittle, error); 207 } else { 208 error = ReadVMX(); 209 if (error.Fail()) 210 return error; 211 212 // Get pointer to m_vmx_ppc64le variable and set the data from it. 213 uint32_t vmx_offset = vsx_offset - sizeof(m_vsx_ppc64le) / 2; 214 uint8_t *src = (uint8_t *)&m_vmx_ppc64le + vmx_offset; 215 reg_value.SetFromMemoryData(reg_info, src, reg_info->byte_size, 216 eByteOrderLittle, error); 217 } 218 } else if (IsVMX(reg)) { 219 error = ReadVMX(); 220 if (error.Fail()) 221 return error; 222 223 // Get pointer to m_vmx_ppc64le variable and set the data from it. 224 uint32_t vmx_offset = CalculateVmxOffset(reg_info); 225 assert(vmx_offset < sizeof m_vmx_ppc64le); 226 uint8_t *src = (uint8_t *)&m_vmx_ppc64le + vmx_offset; 227 reg_value.SetFromMemoryData(reg_info, src, reg_info->byte_size, 228 eByteOrderLittle, error); 229 } else if (IsGPR(reg)) { 230 error = ReadGPR(); 231 if (error.Fail()) 232 return error; 233 234 uint8_t *src = (uint8_t *) &m_gpr_ppc64le + reg_info->byte_offset; 235 reg_value.SetFromMemoryData(reg_info, src, reg_info->byte_size, 236 eByteOrderLittle, error); 237 } else { 238 return Status("failed - register wasn't recognized to be a GPR, FPR, VSX " 239 "or VMX, read strategy unknown"); 240 } 241 242 return error; 243 } 244 245 Status NativeRegisterContextLinux_ppc64le::WriteRegister( 246 const RegisterInfo *reg_info, const RegisterValue ®_value) { 247 Status error; 248 if (!reg_info) 249 return Status("reg_info NULL"); 250 251 const uint32_t reg_index = reg_info->kinds[lldb::eRegisterKindLLDB]; 252 if (reg_index == LLDB_INVALID_REGNUM) 253 return Status("no lldb regnum for %s", reg_info && reg_info->name 254 ? reg_info->name 255 : "<unknown register>"); 256 257 if (IsGPR(reg_index)) { 258 error = ReadGPR(); 259 if (error.Fail()) 260 return error; 261 262 uint8_t *dst = (uint8_t *)&m_gpr_ppc64le + reg_info->byte_offset; 263 ::memcpy(dst, reg_value.GetBytes(), reg_value.GetByteSize()); 264 265 error = WriteGPR(); 266 if (error.Fail()) 267 return error; 268 269 return Status(); 270 } 271 272 if (IsFPR(reg_index)) { 273 error = ReadFPR(); 274 if (error.Fail()) 275 return error; 276 277 // Get pointer to m_fpr_ppc64le variable and set the data to it. 278 uint32_t fpr_offset = CalculateFprOffset(reg_info); 279 assert(fpr_offset < GetFPRSize()); 280 uint8_t *dst = (uint8_t *)&m_fpr_ppc64le + fpr_offset; 281 ::memcpy(dst, reg_value.GetBytes(), reg_value.GetByteSize()); 282 283 error = WriteFPR(); 284 if (error.Fail()) 285 return error; 286 287 return Status(); 288 } 289 290 if (IsVMX(reg_index)) { 291 error = ReadVMX(); 292 if (error.Fail()) 293 return error; 294 295 // Get pointer to m_vmx_ppc64le variable and set the data to it. 296 uint32_t vmx_offset = CalculateVmxOffset(reg_info); 297 assert(vmx_offset < sizeof(m_vmx_ppc64le)); 298 uint8_t *dst = (uint8_t *)&m_vmx_ppc64le + vmx_offset; 299 ::memcpy(dst, reg_value.GetBytes(), reg_value.GetByteSize()); 300 301 error = WriteVMX(); 302 if (error.Fail()) 303 return error; 304 305 return Status(); 306 } 307 308 if (IsVSX(reg_index)) { 309 uint32_t vsx_offset = CalculateVsxOffset(reg_info); 310 assert(vsx_offset < sizeof(m_vsx_ppc64le)); 311 312 if (vsx_offset < sizeof(m_vsx_ppc64le) / 2) { 313 error = ReadVSX(); 314 if (error.Fail()) 315 return error; 316 317 error = ReadFPR(); 318 if (error.Fail()) 319 return error; 320 321 uint64_t value[2]; 322 ::memcpy(value, reg_value.GetBytes(), 16); 323 uint8_t *dst, *src; 324 src = (uint8_t *)value; 325 dst = (uint8_t *)&m_vsx_ppc64le + vsx_offset / 2; 326 ::memcpy(dst, src, 8); 327 src += 8; 328 dst = (uint8_t *)&m_fpr_ppc64le + vsx_offset / 2; 329 ::memcpy(dst, src, 8); 330 331 WriteVSX(); 332 WriteFPR(); 333 } else { 334 error = ReadVMX(); 335 if (error.Fail()) 336 return error; 337 338 // Get pointer to m_vmx_ppc64le variable and set the data from it. 339 uint32_t vmx_offset = vsx_offset - sizeof(m_vsx_ppc64le) / 2; 340 uint8_t *dst = (uint8_t *)&m_vmx_ppc64le + vmx_offset; 341 ::memcpy(dst, reg_value.GetBytes(), reg_value.GetByteSize()); 342 WriteVMX(); 343 } 344 345 return Status(); 346 } 347 348 return Status("failed - register wasn't recognized to be a GPR, FPR, VSX " 349 "or VMX, write strategy unknown"); 350 } 351 352 Status NativeRegisterContextLinux_ppc64le::ReadAllRegisterValues( 353 lldb::DataBufferSP &data_sp) { 354 Status error; 355 356 data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0)); 357 error = ReadGPR(); 358 if (error.Fail()) 359 return error; 360 361 error = ReadFPR(); 362 if (error.Fail()) 363 return error; 364 365 error = ReadVMX(); 366 if (error.Fail()) 367 return error; 368 369 error = ReadVSX(); 370 if (error.Fail()) 371 return error; 372 373 uint8_t *dst = data_sp->GetBytes(); 374 ::memcpy(dst, &m_gpr_ppc64le, GetGPRSize()); 375 dst += GetGPRSize(); 376 ::memcpy(dst, &m_fpr_ppc64le, GetFPRSize()); 377 dst += GetFPRSize(); 378 ::memcpy(dst, &m_vmx_ppc64le, sizeof(m_vmx_ppc64le)); 379 dst += sizeof(m_vmx_ppc64le); 380 ::memcpy(dst, &m_vsx_ppc64le, sizeof(m_vsx_ppc64le)); 381 382 return error; 383 } 384 385 Status NativeRegisterContextLinux_ppc64le::WriteAllRegisterValues( 386 const lldb::DataBufferSP &data_sp) { 387 Status error; 388 389 if (!data_sp) { 390 error.SetErrorStringWithFormat( 391 "NativeRegisterContextLinux_ppc64le::%s invalid data_sp provided", 392 __FUNCTION__); 393 return error; 394 } 395 396 if (data_sp->GetByteSize() != REG_CONTEXT_SIZE) { 397 error.SetErrorStringWithFormat( 398 "NativeRegisterContextLinux_ppc64le::%s data_sp contained mismatched " 399 "data size, expected %" PRIu64 ", actual %" PRIu64, 400 __FUNCTION__, REG_CONTEXT_SIZE, data_sp->GetByteSize()); 401 return error; 402 } 403 404 uint8_t *src = data_sp->GetBytes(); 405 if (src == nullptr) { 406 error.SetErrorStringWithFormat("NativeRegisterContextLinux_ppc64le::%s " 407 "DataBuffer::GetBytes() returned a null " 408 "pointer", 409 __FUNCTION__); 410 return error; 411 } 412 413 ::memcpy(&m_gpr_ppc64le, src, GetGPRSize()); 414 error = WriteGPR(); 415 416 if (error.Fail()) 417 return error; 418 419 src += GetGPRSize(); 420 ::memcpy(&m_fpr_ppc64le, src, GetFPRSize()); 421 422 error = WriteFPR(); 423 if (error.Fail()) 424 return error; 425 426 src += GetFPRSize(); 427 ::memcpy(&m_vmx_ppc64le, src, sizeof(m_vmx_ppc64le)); 428 429 error = WriteVMX(); 430 if (error.Fail()) 431 return error; 432 433 src += sizeof(m_vmx_ppc64le); 434 ::memcpy(&m_vsx_ppc64le, src, sizeof(m_vsx_ppc64le)); 435 error = WriteVSX(); 436 437 return error; 438 } 439 440 bool NativeRegisterContextLinux_ppc64le::IsGPR(unsigned reg) const { 441 return reg <= k_last_gpr_ppc64le; // GPR's come first. 442 } 443 444 bool NativeRegisterContextLinux_ppc64le::IsFPR(unsigned reg) const { 445 return (k_first_fpr_ppc64le <= reg && reg <= k_last_fpr_ppc64le); 446 } 447 448 uint32_t NativeRegisterContextLinux_ppc64le::CalculateFprOffset( 449 const RegisterInfo *reg_info) const { 450 return reg_info->byte_offset - 451 GetRegisterInfoAtIndex(k_first_fpr_ppc64le)->byte_offset; 452 } 453 454 uint32_t NativeRegisterContextLinux_ppc64le::CalculateVmxOffset( 455 const RegisterInfo *reg_info) const { 456 return reg_info->byte_offset - 457 GetRegisterInfoAtIndex(k_first_vmx_ppc64le)->byte_offset; 458 } 459 460 uint32_t NativeRegisterContextLinux_ppc64le::CalculateVsxOffset( 461 const RegisterInfo *reg_info) const { 462 return reg_info->byte_offset - 463 GetRegisterInfoAtIndex(k_first_vsx_ppc64le)->byte_offset; 464 } 465 466 Status NativeRegisterContextLinux_ppc64le::ReadVMX() { 467 int regset = NT_PPC_VMX; 468 return NativeProcessLinux::PtraceWrapper(PTRACE_GETVRREGS, m_thread.GetID(), 469 ®set, &m_vmx_ppc64le, 470 sizeof(m_vmx_ppc64le)); 471 } 472 473 Status NativeRegisterContextLinux_ppc64le::WriteVMX() { 474 int regset = NT_PPC_VMX; 475 return NativeProcessLinux::PtraceWrapper(PTRACE_SETVRREGS, m_thread.GetID(), 476 ®set, &m_vmx_ppc64le, 477 sizeof(m_vmx_ppc64le)); 478 } 479 480 Status NativeRegisterContextLinux_ppc64le::ReadVSX() { 481 int regset = NT_PPC_VSX; 482 return NativeProcessLinux::PtraceWrapper(PTRACE_GETVSRREGS, m_thread.GetID(), 483 ®set, &m_vsx_ppc64le, 484 sizeof(m_vsx_ppc64le)); 485 } 486 487 Status NativeRegisterContextLinux_ppc64le::WriteVSX() { 488 int regset = NT_PPC_VSX; 489 return NativeProcessLinux::PtraceWrapper(PTRACE_SETVSRREGS, m_thread.GetID(), 490 ®set, &m_vsx_ppc64le, 491 sizeof(m_vsx_ppc64le)); 492 } 493 494 bool NativeRegisterContextLinux_ppc64le::IsVMX(unsigned reg) { 495 return (reg >= k_first_vmx_ppc64le) && (reg <= k_last_vmx_ppc64le); 496 } 497 498 bool NativeRegisterContextLinux_ppc64le::IsVSX(unsigned reg) { 499 return (reg >= k_first_vsx_ppc64le) && (reg <= k_last_vsx_ppc64le); 500 } 501 502 uint32_t NativeRegisterContextLinux_ppc64le::NumSupportedHardwareWatchpoints() { 503 Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); 504 505 // Read hardware breakpoint and watchpoint information. 506 Status error = ReadHardwareDebugInfo(); 507 508 if (error.Fail()) 509 return 0; 510 511 LLDB_LOG(log, "{0}", m_max_hwp_supported); 512 return m_max_hwp_supported; 513 } 514 515 uint32_t NativeRegisterContextLinux_ppc64le::SetHardwareWatchpoint( 516 lldb::addr_t addr, size_t size, uint32_t watch_flags) { 517 Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); 518 LLDB_LOG(log, "addr: {0:x}, size: {1:x} watch_flags: {2:x}", addr, size, 519 watch_flags); 520 521 // Read hardware breakpoint and watchpoint information. 522 Status error = ReadHardwareDebugInfo(); 523 524 if (error.Fail()) 525 return LLDB_INVALID_INDEX32; 526 527 uint32_t control_value = 0, wp_index = 0; 528 lldb::addr_t real_addr = addr; 529 uint32_t rw_mode = 0; 530 531 // Check if we are setting watchpoint other than read/write/access Update 532 // watchpoint flag to match ppc64le write-read bit configuration. 533 switch (watch_flags) { 534 case eWatchpointKindWrite: 535 rw_mode = PPC_BREAKPOINT_TRIGGER_WRITE; 536 watch_flags = 2; 537 break; 538 case eWatchpointKindRead: 539 rw_mode = PPC_BREAKPOINT_TRIGGER_READ; 540 watch_flags = 1; 541 break; 542 case (eWatchpointKindRead | eWatchpointKindWrite): 543 rw_mode = PPC_BREAKPOINT_TRIGGER_RW; 544 break; 545 default: 546 return LLDB_INVALID_INDEX32; 547 } 548 549 // Check if size has a valid hardware watchpoint length. 550 if (size != 1 && size != 2 && size != 4 && size != 8) 551 return LLDB_INVALID_INDEX32; 552 553 // Check 8-byte alignment for hardware watchpoint target address. Below is a 554 // hack to recalculate address and size in order to make sure we can watch 555 // non 8-byte alligned addresses as well. 556 if (addr & 0x07) { 557 558 addr_t begin = llvm::alignDown(addr, 8); 559 addr_t end = llvm::alignTo(addr + size, 8); 560 size = llvm::PowerOf2Ceil(end - begin); 561 562 addr = addr & (~0x07); 563 } 564 565 // Setup control value 566 control_value = watch_flags << 3; 567 control_value |= ((1 << size) - 1) << 5; 568 control_value |= (2 << 1) | 1; 569 570 // Iterate over stored watchpoints and find a free wp_index 571 wp_index = LLDB_INVALID_INDEX32; 572 for (uint32_t i = 0; i < m_max_hwp_supported; i++) { 573 if ((m_hwp_regs[i].control & 1) == 0) { 574 wp_index = i; // Mark last free slot 575 } else if (m_hwp_regs[i].address == addr) { 576 return LLDB_INVALID_INDEX32; // We do not support duplicate watchpoints. 577 } 578 } 579 580 if (wp_index == LLDB_INVALID_INDEX32) 581 return LLDB_INVALID_INDEX32; 582 583 // Update watchpoint in local cache 584 m_hwp_regs[wp_index].real_addr = real_addr; 585 m_hwp_regs[wp_index].address = addr; 586 m_hwp_regs[wp_index].control = control_value; 587 m_hwp_regs[wp_index].mode = rw_mode; 588 589 // PTRACE call to set corresponding watchpoint register. 590 error = WriteHardwareDebugRegs(); 591 592 if (error.Fail()) { 593 m_hwp_regs[wp_index].address = 0; 594 m_hwp_regs[wp_index].control &= llvm::maskTrailingZeros<uint32_t>(1); 595 596 return LLDB_INVALID_INDEX32; 597 } 598 599 return wp_index; 600 } 601 602 bool NativeRegisterContextLinux_ppc64le::ClearHardwareWatchpoint( 603 uint32_t wp_index) { 604 Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); 605 LLDB_LOG(log, "wp_index: {0}", wp_index); 606 607 // Read hardware breakpoint and watchpoint information. 608 Status error = ReadHardwareDebugInfo(); 609 610 if (error.Fail()) 611 return false; 612 613 if (wp_index >= m_max_hwp_supported) 614 return false; 615 616 // Create a backup we can revert to in case of failure. 617 lldb::addr_t tempAddr = m_hwp_regs[wp_index].address; 618 uint32_t tempControl = m_hwp_regs[wp_index].control; 619 long *tempSlot = reinterpret_cast<long *>(m_hwp_regs[wp_index].slot); 620 621 // Update watchpoint in local cache 622 m_hwp_regs[wp_index].control &= llvm::maskTrailingZeros<uint32_t>(1); 623 m_hwp_regs[wp_index].address = 0; 624 m_hwp_regs[wp_index].slot = 0; 625 m_hwp_regs[wp_index].mode = 0; 626 627 // Ptrace call to update hardware debug registers 628 error = NativeProcessLinux::PtraceWrapper(PPC_PTRACE_DELHWDEBUG, 629 m_thread.GetID(), 0, tempSlot); 630 631 if (error.Fail()) { 632 m_hwp_regs[wp_index].control = tempControl; 633 m_hwp_regs[wp_index].address = tempAddr; 634 m_hwp_regs[wp_index].slot = reinterpret_cast<long>(tempSlot); 635 636 return false; 637 } 638 639 return true; 640 } 641 642 uint32_t 643 NativeRegisterContextLinux_ppc64le::GetWatchpointSize(uint32_t wp_index) { 644 Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); 645 LLDB_LOG(log, "wp_index: {0}", wp_index); 646 647 unsigned control = (m_hwp_regs[wp_index].control >> 5) & 0xff; 648 if (llvm::isPowerOf2_32(control + 1)) { 649 return llvm::countPopulation(control); 650 } 651 652 return 0; 653 } 654 655 bool NativeRegisterContextLinux_ppc64le::WatchpointIsEnabled( 656 uint32_t wp_index) { 657 Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); 658 LLDB_LOG(log, "wp_index: {0}", wp_index); 659 660 return !!((m_hwp_regs[wp_index].control & 0x1) == 0x1); 661 } 662 663 Status NativeRegisterContextLinux_ppc64le::GetWatchpointHitIndex( 664 uint32_t &wp_index, lldb::addr_t trap_addr) { 665 Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); 666 LLDB_LOG(log, "wp_index: {0}, trap_addr: {1:x}", wp_index, trap_addr); 667 668 uint32_t watch_size; 669 lldb::addr_t watch_addr; 670 671 for (wp_index = 0; wp_index < m_max_hwp_supported; ++wp_index) { 672 watch_size = GetWatchpointSize(wp_index); 673 watch_addr = m_hwp_regs[wp_index].address; 674 675 if (WatchpointIsEnabled(wp_index) && trap_addr >= watch_addr && 676 trap_addr <= watch_addr + watch_size) { 677 m_hwp_regs[wp_index].hit_addr = trap_addr; 678 return Status(); 679 } 680 } 681 682 wp_index = LLDB_INVALID_INDEX32; 683 return Status(); 684 } 685 686 lldb::addr_t 687 NativeRegisterContextLinux_ppc64le::GetWatchpointAddress(uint32_t wp_index) { 688 Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); 689 LLDB_LOG(log, "wp_index: {0}", wp_index); 690 691 if (wp_index >= m_max_hwp_supported) 692 return LLDB_INVALID_ADDRESS; 693 694 if (WatchpointIsEnabled(wp_index)) 695 return m_hwp_regs[wp_index].real_addr; 696 else 697 return LLDB_INVALID_ADDRESS; 698 } 699 700 lldb::addr_t 701 NativeRegisterContextLinux_ppc64le::GetWatchpointHitAddress(uint32_t wp_index) { 702 Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS)); 703 LLDB_LOG(log, "wp_index: {0}", wp_index); 704 705 if (wp_index >= m_max_hwp_supported) 706 return LLDB_INVALID_ADDRESS; 707 708 if (WatchpointIsEnabled(wp_index)) 709 return m_hwp_regs[wp_index].hit_addr; 710 711 return LLDB_INVALID_ADDRESS; 712 } 713 714 Status NativeRegisterContextLinux_ppc64le::ReadHardwareDebugInfo() { 715 if (!m_refresh_hwdebug_info) { 716 return Status(); 717 } 718 719 ::pid_t tid = m_thread.GetID(); 720 721 struct ppc_debug_info hwdebug_info; 722 Status error; 723 724 error = NativeProcessLinux::PtraceWrapper( 725 PPC_PTRACE_GETHWDBGINFO, tid, 0, &hwdebug_info, sizeof(hwdebug_info)); 726 727 if (error.Fail()) 728 return error; 729 730 m_max_hwp_supported = hwdebug_info.num_data_bps; 731 m_max_hbp_supported = hwdebug_info.num_instruction_bps; 732 m_refresh_hwdebug_info = false; 733 734 return error; 735 } 736 737 Status NativeRegisterContextLinux_ppc64le::WriteHardwareDebugRegs() { 738 struct ppc_hw_breakpoint reg_state; 739 Status error; 740 long ret; 741 742 for (uint32_t i = 0; i < m_max_hwp_supported; i++) { 743 reg_state.addr = m_hwp_regs[i].address; 744 reg_state.trigger_type = m_hwp_regs[i].mode; 745 reg_state.version = 1; 746 reg_state.addr_mode = PPC_BREAKPOINT_MODE_EXACT; 747 reg_state.condition_mode = PPC_BREAKPOINT_CONDITION_NONE; 748 reg_state.addr2 = 0; 749 reg_state.condition_value = 0; 750 751 error = NativeProcessLinux::PtraceWrapper(PPC_PTRACE_SETHWDEBUG, 752 m_thread.GetID(), 0, ®_state, 753 sizeof(reg_state), &ret); 754 755 if (error.Fail()) 756 return error; 757 758 m_hwp_regs[i].slot = ret; 759 } 760 761 return error; 762 } 763 764 #endif // defined(__powerpc64__) 765