xref: /openbsd-src/gnu/llvm/lldb/source/Plugins/Process/FreeBSDKernel/RegisterContextFreeBSDKernel_arm64.cpp (revision f6aab3d83b51b91c24247ad2c2573574de475a82)
1*f6aab3d8Srobert //===-- RegisterContextFreeBSDKernel_arm64.cpp ----------------------------===//
2*f6aab3d8Srobert //
3*f6aab3d8Srobert // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4*f6aab3d8Srobert // See https://llvm.org/LICENSE.txt for license information.
5*f6aab3d8Srobert // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6*f6aab3d8Srobert //
7*f6aab3d8Srobert //===----------------------------------------------------------------------===//
8*f6aab3d8Srobert 
9*f6aab3d8Srobert #include "RegisterContextFreeBSDKernel_arm64.h"
10*f6aab3d8Srobert #include "Plugins/Process/Utility/lldb-arm64-register-enums.h"
11*f6aab3d8Srobert 
12*f6aab3d8Srobert #include "lldb/Target/Process.h"
13*f6aab3d8Srobert #include "lldb/Target/Thread.h"
14*f6aab3d8Srobert #include "lldb/Utility/RegisterValue.h"
15*f6aab3d8Srobert #include "llvm/Support/Endian.h"
16*f6aab3d8Srobert 
17*f6aab3d8Srobert using namespace lldb;
18*f6aab3d8Srobert using namespace lldb_private;
19*f6aab3d8Srobert 
RegisterContextFreeBSDKernel_arm64(Thread & thread,std::unique_ptr<RegisterInfoPOSIX_arm64> register_info_up,lldb::addr_t pcb_addr)20*f6aab3d8Srobert RegisterContextFreeBSDKernel_arm64::RegisterContextFreeBSDKernel_arm64(
21*f6aab3d8Srobert     Thread &thread, std::unique_ptr<RegisterInfoPOSIX_arm64> register_info_up,
22*f6aab3d8Srobert     lldb::addr_t pcb_addr)
23*f6aab3d8Srobert     : RegisterContextPOSIX_arm64(thread, std::move(register_info_up)),
24*f6aab3d8Srobert       m_pcb_addr(pcb_addr) {}
25*f6aab3d8Srobert 
ReadGPR()26*f6aab3d8Srobert bool RegisterContextFreeBSDKernel_arm64::ReadGPR() { return true; }
27*f6aab3d8Srobert 
ReadFPR()28*f6aab3d8Srobert bool RegisterContextFreeBSDKernel_arm64::ReadFPR() { return true; }
29*f6aab3d8Srobert 
WriteGPR()30*f6aab3d8Srobert bool RegisterContextFreeBSDKernel_arm64::WriteGPR() {
31*f6aab3d8Srobert   assert(0);
32*f6aab3d8Srobert   return false;
33*f6aab3d8Srobert }
34*f6aab3d8Srobert 
WriteFPR()35*f6aab3d8Srobert bool RegisterContextFreeBSDKernel_arm64::WriteFPR() {
36*f6aab3d8Srobert   assert(0);
37*f6aab3d8Srobert   return false;
38*f6aab3d8Srobert }
39*f6aab3d8Srobert 
ReadRegister(const RegisterInfo * reg_info,RegisterValue & value)40*f6aab3d8Srobert bool RegisterContextFreeBSDKernel_arm64::ReadRegister(
41*f6aab3d8Srobert     const RegisterInfo *reg_info, RegisterValue &value) {
42*f6aab3d8Srobert   if (m_pcb_addr == LLDB_INVALID_ADDRESS)
43*f6aab3d8Srobert     return false;
44*f6aab3d8Srobert 
45*f6aab3d8Srobert   struct {
46*f6aab3d8Srobert     llvm::support::ulittle64_t x[30];
47*f6aab3d8Srobert     llvm::support::ulittle64_t lr;
48*f6aab3d8Srobert     llvm::support::ulittle64_t _reserved;
49*f6aab3d8Srobert     llvm::support::ulittle64_t sp;
50*f6aab3d8Srobert   } pcb;
51*f6aab3d8Srobert 
52*f6aab3d8Srobert   Status error;
53*f6aab3d8Srobert   size_t rd =
54*f6aab3d8Srobert       m_thread.GetProcess()->ReadMemory(m_pcb_addr, &pcb, sizeof(pcb), error);
55*f6aab3d8Srobert   if (rd != sizeof(pcb))
56*f6aab3d8Srobert     return false;
57*f6aab3d8Srobert 
58*f6aab3d8Srobert   uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB];
59*f6aab3d8Srobert   switch (reg) {
60*f6aab3d8Srobert   case gpr_x0_arm64:
61*f6aab3d8Srobert   case gpr_x1_arm64:
62*f6aab3d8Srobert   case gpr_x2_arm64:
63*f6aab3d8Srobert   case gpr_x3_arm64:
64*f6aab3d8Srobert   case gpr_x4_arm64:
65*f6aab3d8Srobert   case gpr_x5_arm64:
66*f6aab3d8Srobert   case gpr_x6_arm64:
67*f6aab3d8Srobert   case gpr_x7_arm64:
68*f6aab3d8Srobert   case gpr_x8_arm64:
69*f6aab3d8Srobert   case gpr_x9_arm64:
70*f6aab3d8Srobert   case gpr_x10_arm64:
71*f6aab3d8Srobert   case gpr_x11_arm64:
72*f6aab3d8Srobert   case gpr_x12_arm64:
73*f6aab3d8Srobert   case gpr_x13_arm64:
74*f6aab3d8Srobert   case gpr_x14_arm64:
75*f6aab3d8Srobert   case gpr_x15_arm64:
76*f6aab3d8Srobert   case gpr_x16_arm64:
77*f6aab3d8Srobert   case gpr_x17_arm64:
78*f6aab3d8Srobert   case gpr_x18_arm64:
79*f6aab3d8Srobert   case gpr_x19_arm64:
80*f6aab3d8Srobert   case gpr_x20_arm64:
81*f6aab3d8Srobert   case gpr_x21_arm64:
82*f6aab3d8Srobert   case gpr_x22_arm64:
83*f6aab3d8Srobert   case gpr_x23_arm64:
84*f6aab3d8Srobert   case gpr_x24_arm64:
85*f6aab3d8Srobert   case gpr_x25_arm64:
86*f6aab3d8Srobert   case gpr_x26_arm64:
87*f6aab3d8Srobert   case gpr_x27_arm64:
88*f6aab3d8Srobert   case gpr_x28_arm64:
89*f6aab3d8Srobert   case gpr_fp_arm64:
90*f6aab3d8Srobert     static_assert(gpr_fp_arm64 - gpr_x0_arm64 == 29,
91*f6aab3d8Srobert                   "nonconsecutive arm64 register numbers");
92*f6aab3d8Srobert     value = pcb.x[reg - gpr_x0_arm64];
93*f6aab3d8Srobert     break;
94*f6aab3d8Srobert   case gpr_sp_arm64:
95*f6aab3d8Srobert     value = pcb.sp;
96*f6aab3d8Srobert     break;
97*f6aab3d8Srobert   case gpr_pc_arm64:
98*f6aab3d8Srobert     // The pc of crashing thread is stored in lr.
99*f6aab3d8Srobert     value = pcb.lr;
100*f6aab3d8Srobert     break;
101*f6aab3d8Srobert   default:
102*f6aab3d8Srobert     return false;
103*f6aab3d8Srobert   }
104*f6aab3d8Srobert   return true;
105*f6aab3d8Srobert }
106*f6aab3d8Srobert 
WriteRegister(const RegisterInfo * reg_info,const RegisterValue & value)107*f6aab3d8Srobert bool RegisterContextFreeBSDKernel_arm64::WriteRegister(
108*f6aab3d8Srobert     const RegisterInfo *reg_info, const RegisterValue &value) {
109*f6aab3d8Srobert   return false;
110*f6aab3d8Srobert }
111