xref: /openbsd-src/gnu/llvm/clang/lib/Basic/Targets/Hexagon.h (revision 12c855180aad702bbcca06e0398d774beeafb155)
1e5dd7070Spatrick //===--- Hexagon.h - Declare Hexagon target feature support -----*- C++ -*-===//
2e5dd7070Spatrick //
3e5dd7070Spatrick // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4e5dd7070Spatrick // See https://llvm.org/LICENSE.txt for license information.
5e5dd7070Spatrick // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6e5dd7070Spatrick //
7e5dd7070Spatrick //===----------------------------------------------------------------------===//
8e5dd7070Spatrick //
9e5dd7070Spatrick // This file declares Hexagon TargetInfo objects.
10e5dd7070Spatrick //
11e5dd7070Spatrick //===----------------------------------------------------------------------===//
12e5dd7070Spatrick 
13e5dd7070Spatrick #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_HEXAGON_H
14e5dd7070Spatrick #define LLVM_CLANG_LIB_BASIC_TARGETS_HEXAGON_H
15e5dd7070Spatrick 
16e5dd7070Spatrick #include "clang/Basic/TargetInfo.h"
17e5dd7070Spatrick #include "clang/Basic/TargetOptions.h"
18e5dd7070Spatrick #include "llvm/ADT/Triple.h"
19e5dd7070Spatrick #include "llvm/Support/Compiler.h"
20e5dd7070Spatrick 
21e5dd7070Spatrick namespace clang {
22e5dd7070Spatrick namespace targets {
23e5dd7070Spatrick 
24e5dd7070Spatrick // Hexagon abstract base class
25e5dd7070Spatrick class LLVM_LIBRARY_VISIBILITY HexagonTargetInfo : public TargetInfo {
26e5dd7070Spatrick 
27e5dd7070Spatrick   static const char *const GCCRegNames[];
28e5dd7070Spatrick   static const TargetInfo::GCCRegAlias GCCRegAliases[];
29e5dd7070Spatrick   std::string CPU;
30e5dd7070Spatrick   std::string HVXVersion;
31e5dd7070Spatrick   bool HasHVX = false;
32e5dd7070Spatrick   bool HasHVX64B = false;
33e5dd7070Spatrick   bool HasHVX128B = false;
34ec727ea7Spatrick   bool HasAudio = false;
35e5dd7070Spatrick   bool UseLongCalls = false;
36e5dd7070Spatrick 
37e5dd7070Spatrick public:
HexagonTargetInfo(const llvm::Triple & Triple,const TargetOptions &)38e5dd7070Spatrick   HexagonTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
39e5dd7070Spatrick       : TargetInfo(Triple) {
40e5dd7070Spatrick     // Specify the vector alignment explicitly. For v512x1, the calculated
41e5dd7070Spatrick     // alignment would be 512*alignment(i1), which is 512 bytes, instead of
42e5dd7070Spatrick     // the required minimum of 64 bytes.
43e5dd7070Spatrick     resetDataLayout(
44e5dd7070Spatrick         "e-m:e-p:32:32:32-a:0-n16:32-"
45e5dd7070Spatrick         "i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-"
46e5dd7070Spatrick         "v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048");
47e5dd7070Spatrick     SizeType = UnsignedInt;
48e5dd7070Spatrick     PtrDiffType = SignedInt;
49e5dd7070Spatrick     IntPtrType = SignedInt;
50e5dd7070Spatrick 
51e5dd7070Spatrick     // {} in inline assembly are packet specifiers, not assembly variant
52e5dd7070Spatrick     // specifiers.
53e5dd7070Spatrick     NoAsmVariants = true;
54e5dd7070Spatrick 
55e5dd7070Spatrick     LargeArrayMinWidth = 64;
56e5dd7070Spatrick     LargeArrayAlign = 64;
57e5dd7070Spatrick     UseBitFieldTypeAlignment = true;
58e5dd7070Spatrick     ZeroLengthBitfieldBoundary = 32;
59ec727ea7Spatrick     MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
60ec727ea7Spatrick 
61ec727ea7Spatrick     // These are the default values anyway, but explicitly make sure
62ec727ea7Spatrick     // that the size of the boolean type is 8 bits. Bool vectors are used
63ec727ea7Spatrick     // for modeling predicate registers in HVX, and the bool -> byte
64ec727ea7Spatrick     // correspondence matches the HVX architecture.
65ec727ea7Spatrick     BoolWidth = BoolAlign = 8;
66e5dd7070Spatrick   }
67e5dd7070Spatrick 
68e5dd7070Spatrick   ArrayRef<Builtin::Info> getTargetBuiltins() const override;
69e5dd7070Spatrick 
validateAsmConstraint(const char * & Name,TargetInfo::ConstraintInfo & Info)70e5dd7070Spatrick   bool validateAsmConstraint(const char *&Name,
71e5dd7070Spatrick                              TargetInfo::ConstraintInfo &Info) const override {
72e5dd7070Spatrick     switch (*Name) {
73e5dd7070Spatrick     case 'v':
74e5dd7070Spatrick     case 'q':
75e5dd7070Spatrick       if (HasHVX) {
76e5dd7070Spatrick         Info.setAllowsRegister();
77e5dd7070Spatrick         return true;
78e5dd7070Spatrick       }
79e5dd7070Spatrick       break;
80e5dd7070Spatrick     case 'a': // Modifier register m0-m1.
81e5dd7070Spatrick       Info.setAllowsRegister();
82e5dd7070Spatrick       return true;
83e5dd7070Spatrick     case 's':
84e5dd7070Spatrick       // Relocatable constant.
85e5dd7070Spatrick       return true;
86e5dd7070Spatrick     }
87e5dd7070Spatrick     return false;
88e5dd7070Spatrick   }
89e5dd7070Spatrick 
90e5dd7070Spatrick   void getTargetDefines(const LangOptions &Opts,
91e5dd7070Spatrick                         MacroBuilder &Builder) const override;
92e5dd7070Spatrick 
isCLZForZeroUndef()93e5dd7070Spatrick   bool isCLZForZeroUndef() const override { return false; }
94e5dd7070Spatrick 
95e5dd7070Spatrick   bool hasFeature(StringRef Feature) const override;
96e5dd7070Spatrick 
97e5dd7070Spatrick   bool
98e5dd7070Spatrick   initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
99e5dd7070Spatrick                  StringRef CPU,
100e5dd7070Spatrick                  const std::vector<std::string> &FeaturesVec) const override;
101e5dd7070Spatrick 
102e5dd7070Spatrick   bool handleTargetFeatures(std::vector<std::string> &Features,
103e5dd7070Spatrick                             DiagnosticsEngine &Diags) override;
104e5dd7070Spatrick 
getBuiltinVaListKind()105e5dd7070Spatrick   BuiltinVaListKind getBuiltinVaListKind() const override {
106ec727ea7Spatrick     if (getTriple().isMusl())
107ec727ea7Spatrick       return TargetInfo::HexagonBuiltinVaList;
108e5dd7070Spatrick     return TargetInfo::CharPtrBuiltinVaList;
109e5dd7070Spatrick   }
110e5dd7070Spatrick 
111e5dd7070Spatrick   ArrayRef<const char *> getGCCRegNames() const override;
112e5dd7070Spatrick 
113e5dd7070Spatrick   ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
114e5dd7070Spatrick 
getClobbers()115e5dd7070Spatrick   const char *getClobbers() const override { return ""; }
116e5dd7070Spatrick 
117e5dd7070Spatrick   static const char *getHexagonCPUSuffix(StringRef Name);
118e5dd7070Spatrick 
isValidCPUName(StringRef Name)119e5dd7070Spatrick   bool isValidCPUName(StringRef Name) const override {
120e5dd7070Spatrick     return getHexagonCPUSuffix(Name);
121e5dd7070Spatrick   }
122e5dd7070Spatrick 
123e5dd7070Spatrick   void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
124e5dd7070Spatrick 
setCPU(const std::string & Name)125e5dd7070Spatrick   bool setCPU(const std::string &Name) override {
126e5dd7070Spatrick     if (!isValidCPUName(Name))
127e5dd7070Spatrick       return false;
128e5dd7070Spatrick     CPU = Name;
129e5dd7070Spatrick     return true;
130e5dd7070Spatrick   }
131e5dd7070Spatrick 
getEHDataRegisterNumber(unsigned RegNo)132e5dd7070Spatrick   int getEHDataRegisterNumber(unsigned RegNo) const override {
133e5dd7070Spatrick     return RegNo < 2 ? RegNo : -1;
134e5dd7070Spatrick   }
135ec727ea7Spatrick 
isTinyCore()136ec727ea7Spatrick   bool isTinyCore() const {
137ec727ea7Spatrick     // We can write more stricter checks later.
138ec727ea7Spatrick     return CPU.find('t') != std::string::npos;
139ec727ea7Spatrick   }
140ec727ea7Spatrick 
hasBitIntType()141*12c85518Srobert   bool hasBitIntType() const override { return true; }
142e5dd7070Spatrick };
143e5dd7070Spatrick } // namespace targets
144e5dd7070Spatrick } // namespace clang
145e5dd7070Spatrick #endif // LLVM_CLANG_LIB_BASIC_TARGETS_HEXAGON_H
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