xref: /onnv-gate/usr/src/uts/sun4v/sys/machthread.h (revision 0:68f95e015346)
1*0Sstevel@tonic-gate /*
2*0Sstevel@tonic-gate  * CDDL HEADER START
3*0Sstevel@tonic-gate  *
4*0Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
5*0Sstevel@tonic-gate  * Common Development and Distribution License, Version 1.0 only
6*0Sstevel@tonic-gate  * (the "License").  You may not use this file except in compliance
7*0Sstevel@tonic-gate  * with the License.
8*0Sstevel@tonic-gate  *
9*0Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10*0Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
11*0Sstevel@tonic-gate  * See the License for the specific language governing permissions
12*0Sstevel@tonic-gate  * and limitations under the License.
13*0Sstevel@tonic-gate  *
14*0Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
15*0Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16*0Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
17*0Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
18*0Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
19*0Sstevel@tonic-gate  *
20*0Sstevel@tonic-gate  * CDDL HEADER END
21*0Sstevel@tonic-gate  */
22*0Sstevel@tonic-gate /*
23*0Sstevel@tonic-gate  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24*0Sstevel@tonic-gate  * Use is subject to license terms.
25*0Sstevel@tonic-gate  */
26*0Sstevel@tonic-gate 
27*0Sstevel@tonic-gate #ifndef	_SYS_MACHTHREAD_H
28*0Sstevel@tonic-gate #define	_SYS_MACHTHREAD_H
29*0Sstevel@tonic-gate 
30*0Sstevel@tonic-gate #pragma ident	"%Z%%M%	%I%	%E% SMI"
31*0Sstevel@tonic-gate 
32*0Sstevel@tonic-gate #include <sys/asi.h>
33*0Sstevel@tonic-gate #include <sys/sun4asi.h>
34*0Sstevel@tonic-gate #include <sys/machasi.h>
35*0Sstevel@tonic-gate #include <sys/bitmap.h>
36*0Sstevel@tonic-gate 
37*0Sstevel@tonic-gate #ifdef	__cplusplus
38*0Sstevel@tonic-gate extern "C" {
39*0Sstevel@tonic-gate #endif
40*0Sstevel@tonic-gate 
41*0Sstevel@tonic-gate #ifdef	_ASM
42*0Sstevel@tonic-gate 
43*0Sstevel@tonic-gate #define	THREAD_REG	%g7		/* pointer to current thread data */
44*0Sstevel@tonic-gate 
45*0Sstevel@tonic-gate /*
46*0Sstevel@tonic-gate  * CPU_INDEX(r, scr)
47*0Sstevel@tonic-gate  * Returns cpu id in r.
48*0Sstevel@tonic-gate  */
49*0Sstevel@tonic-gate #define	CPU_INDEX(r, scr)		\
50*0Sstevel@tonic-gate 	mov	SCRATCHPAD_CPUID, scr;	\
51*0Sstevel@tonic-gate 	ldxa	[scr]ASI_SCRATCHPAD, r
52*0Sstevel@tonic-gate 
53*0Sstevel@tonic-gate /*
54*0Sstevel@tonic-gate  * Given a cpu id extract the appropriate word
55*0Sstevel@tonic-gate  * in the cpuset mask for this cpu id.
56*0Sstevel@tonic-gate  */
57*0Sstevel@tonic-gate #if CPUSET_SIZE > CLONGSIZE
58*0Sstevel@tonic-gate #define	CPU_INDEXTOSET(base, index, scr)	\
59*0Sstevel@tonic-gate 	srl	index, BT_ULSHIFT, scr;		\
60*0Sstevel@tonic-gate 	and	index, BT_ULMASK, index;	\
61*0Sstevel@tonic-gate 	sll	scr, CLONGSHIFT, scr;		\
62*0Sstevel@tonic-gate 	add	base, scr, base
63*0Sstevel@tonic-gate #else
64*0Sstevel@tonic-gate #define	CPU_INDEXTOSET(base, index, scr)
65*0Sstevel@tonic-gate #endif	/* CPUSET_SIZE */
66*0Sstevel@tonic-gate 
67*0Sstevel@tonic-gate 
68*0Sstevel@tonic-gate /*
69*0Sstevel@tonic-gate  * Assembly macro to find address of the current CPU.
70*0Sstevel@tonic-gate  * Used when coming in from a user trap - cannot use THREAD_REG.
71*0Sstevel@tonic-gate  * Args are destination register and one scratch register.
72*0Sstevel@tonic-gate  */
73*0Sstevel@tonic-gate #define	CPU_ADDR(reg, scr) 		\
74*0Sstevel@tonic-gate 	.global	cpu;			\
75*0Sstevel@tonic-gate 	CPU_INDEX(scr, reg);		\
76*0Sstevel@tonic-gate 	sll	scr, CPTRSHIFT, scr;	\
77*0Sstevel@tonic-gate 	set	cpu, reg;		\
78*0Sstevel@tonic-gate 	ldn	[reg + scr], reg
79*0Sstevel@tonic-gate 
80*0Sstevel@tonic-gate #define	CINT64SHIFT	3
81*0Sstevel@tonic-gate 
82*0Sstevel@tonic-gate /*
83*0Sstevel@tonic-gate  * Assembly macro to find the physical address of the current CPU.
84*0Sstevel@tonic-gate  * All memory references using VA must be limited to nucleus
85*0Sstevel@tonic-gate  * memory to avoid any MMU side effect.
86*0Sstevel@tonic-gate  */
87*0Sstevel@tonic-gate #define	CPU_PADDR(reg, scr)				\
88*0Sstevel@tonic-gate 	.global cpu_pa;					\
89*0Sstevel@tonic-gate 	CPU_INDEX(scr, reg);				\
90*0Sstevel@tonic-gate 	sll	scr, CINT64SHIFT, scr;			\
91*0Sstevel@tonic-gate 	set	cpu_pa, reg;				\
92*0Sstevel@tonic-gate 	ldx	[reg + scr], reg
93*0Sstevel@tonic-gate 
94*0Sstevel@tonic-gate #endif	/* _ASM */
95*0Sstevel@tonic-gate 
96*0Sstevel@tonic-gate #ifdef	__cplusplus
97*0Sstevel@tonic-gate }
98*0Sstevel@tonic-gate #endif
99*0Sstevel@tonic-gate 
100*0Sstevel@tonic-gate #endif	/* _SYS_MACHTHREAD_H */
101