xref: /onnv-gate/usr/src/uts/sun4v/sys/hypervisor_api.h (revision 13098:496fd9979cfc)
10Sstevel@tonic-gate /*
20Sstevel@tonic-gate  * CDDL HEADER START
30Sstevel@tonic-gate  *
40Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
51370Sschwartz  * Common Development and Distribution License (the "License").
61370Sschwartz  * You may not use this file except in compliance with the License.
70Sstevel@tonic-gate  *
80Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
90Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
100Sstevel@tonic-gate  * See the License for the specific language governing permissions
110Sstevel@tonic-gate  * and limitations under the License.
120Sstevel@tonic-gate  *
130Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
140Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
150Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
160Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
170Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
180Sstevel@tonic-gate  *
190Sstevel@tonic-gate  * CDDL HEADER END
200Sstevel@tonic-gate  */
211370Sschwartz 
220Sstevel@tonic-gate /*
23*13098SWentao.Yang@Sun.COM  * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
240Sstevel@tonic-gate  */
250Sstevel@tonic-gate 
260Sstevel@tonic-gate #ifndef _SYS_HYPERVISOR_API_H
270Sstevel@tonic-gate #define	_SYS_HYPERVISOR_API_H
280Sstevel@tonic-gate 
290Sstevel@tonic-gate /*
300Sstevel@tonic-gate  * sun4v Hypervisor API
310Sstevel@tonic-gate  *
320Sstevel@tonic-gate  * Reference: api.pdf Revision 0.12 dated May 12, 2004.
330Sstevel@tonic-gate  *	      io-api.txt version 1.11 dated 10/19/2004
340Sstevel@tonic-gate  */
350Sstevel@tonic-gate 
360Sstevel@tonic-gate #ifdef __cplusplus
370Sstevel@tonic-gate extern "C" {
380Sstevel@tonic-gate #endif
390Sstevel@tonic-gate 
400Sstevel@tonic-gate /*
410Sstevel@tonic-gate  * Trap types
420Sstevel@tonic-gate  */
430Sstevel@tonic-gate #define	FAST_TRAP		0x80	/* Function # in %o5 */
440Sstevel@tonic-gate #define	CPU_TICK_NPT		0x81
450Sstevel@tonic-gate #define	CPU_STICK_NPT		0x82
460Sstevel@tonic-gate #define	MMU_MAP_ADDR		0x83
470Sstevel@tonic-gate #define	MMU_UNMAP_ADDR		0x84
487718SJason.Beloro@Sun.COM #define	MMU_MAP_TTE		0x86
490Sstevel@tonic-gate 
501991Sheppo #define	CORE_TRAP		0xff
511991Sheppo 
520Sstevel@tonic-gate /*
530Sstevel@tonic-gate  * Error returns in %o0.
540Sstevel@tonic-gate  * (Additional result is returned in %o1.)
550Sstevel@tonic-gate  */
560Sstevel@tonic-gate #define	H_EOK			0	/* Successful return */
570Sstevel@tonic-gate #define	H_ENOCPU		1	/* Invalid CPU id */
580Sstevel@tonic-gate #define	H_ENORADDR		2	/* Invalid real address */
590Sstevel@tonic-gate #define	H_ENOINTR		3	/* Invalid interrupt id */
600Sstevel@tonic-gate #define	H_EBADPGSZ		4	/* Invalid pagesize encoding */
610Sstevel@tonic-gate #define	H_EBADTSB		5	/* Invalid TSB description */
620Sstevel@tonic-gate #define	H_EINVAL		6	/* Invalid argument */
630Sstevel@tonic-gate #define	H_EBADTRAP		7	/* Invalid function number */
640Sstevel@tonic-gate #define	H_EBADALIGN		8	/* Invalid address alignment */
650Sstevel@tonic-gate #define	H_EWOULDBLOCK		9	/* Cannot complete operation */
660Sstevel@tonic-gate 					/* without blocking */
670Sstevel@tonic-gate #define	H_ENOACCESS		10	/* No access to resource */
680Sstevel@tonic-gate #define	H_EIO			11	/* I/O error */
690Sstevel@tonic-gate #define	H_ECPUERROR		12	/* CPU is in error state */
700Sstevel@tonic-gate #define	H_ENOTSUPPORTED		13	/* Function not supported */
710Sstevel@tonic-gate #define	H_ENOMAP		14	/* Mapping is not valid, */
720Sstevel@tonic-gate 					/* no translation exists */
731592Sgirish #define	H_EBUSY			17	/* Resource busy */
741991Sheppo #define	H_ETOOMANY		15	/* Hard resource limit exceeded */
751991Sheppo #define	H_ECHANNEL		16	/* Illegal LDC channel */
760Sstevel@tonic-gate 
770Sstevel@tonic-gate #define	H_BREAK			-1	/* Console Break */
780Sstevel@tonic-gate #define	H_HUP			-2	/* Console Break */
791310Sha137994 
801310Sha137994 /*
811310Sha137994  * Mondo CPU ID argument processing.
821310Sha137994  */
831310Sha137994 #define	HV_SEND_MONDO_ENTRYDONE	0xffff
841310Sha137994 
850Sstevel@tonic-gate /*
860Sstevel@tonic-gate  * Function numbers for FAST_TRAP.
870Sstevel@tonic-gate  */
880Sstevel@tonic-gate #define	HV_MACH_EXIT		0x00
890Sstevel@tonic-gate #define	HV_MACH_DESC		0x01
901991Sheppo #define	HV_MACH_SIR		0x02
912036Swentaoy #define	MACH_SET_WATCHDOG	0x05
921991Sheppo 
931991Sheppo #define	HV_CPU_START		0x10
941991Sheppo #define	HV_CPU_STOP		0x11
950Sstevel@tonic-gate #define	HV_CPU_YIELD		0x12
961991Sheppo #define	HV_CPU_QCONF		0x14
970Sstevel@tonic-gate #define	HV_CPU_STATE		0x17
981991Sheppo #define	HV_CPU_SET_RTBA		0x18
991991Sheppo 
1000Sstevel@tonic-gate #define	MMU_TSB_CTX0		0x20
1010Sstevel@tonic-gate #define	MMU_TSB_CTXNON0		0x21
1020Sstevel@tonic-gate #define	MMU_DEMAP_PAGE		0x22
1030Sstevel@tonic-gate #define	MMU_DEMAP_CTX		0x23
1040Sstevel@tonic-gate #define	MMU_DEMAP_ALL		0x24
1050Sstevel@tonic-gate #define	MAP_PERM_ADDR		0x25
1060Sstevel@tonic-gate #define	MMU_SET_INFOPTR		0x26
1071991Sheppo #define	MMU_ENABLE		0x27
1080Sstevel@tonic-gate #define	UNMAP_PERM_ADDR		0x28
1091991Sheppo 
1100Sstevel@tonic-gate #define	HV_MEM_SCRUB		0x31
1110Sstevel@tonic-gate #define	HV_MEM_SYNC		0x32
1121991Sheppo 
1130Sstevel@tonic-gate #define	HV_INTR_SEND		0x42
1141991Sheppo 
1150Sstevel@tonic-gate #define	TOD_GET			0x50
1160Sstevel@tonic-gate #define	TOD_SET			0x51
1171991Sheppo 
1181991Sheppo #define	CONS_GETCHAR		0x60
1191991Sheppo #define	CONS_PUTCHAR		0x61
1202282Sjb145095 #define	CONS_READ		0x62
1212282Sjb145095 #define	CONS_WRITE		0x63
1220Sstevel@tonic-gate 
1233266Sjb145095 #define	SOFT_STATE_SET		0x70
1243266Sjb145095 #define	SOFT_STATE_GET		0x71
1253266Sjb145095 
1260Sstevel@tonic-gate #define	TTRACE_BUF_CONF		0x90
1270Sstevel@tonic-gate #define	TTRACE_BUF_INFO		0x91
1280Sstevel@tonic-gate #define	TTRACE_ENABLE		0x92
1290Sstevel@tonic-gate #define	TTRACE_FREEZE		0x93
1300Sstevel@tonic-gate #define	DUMP_BUF_UPDATE		0x94
1310Sstevel@tonic-gate 
1320Sstevel@tonic-gate #define	HVIO_INTR_DEVINO2SYSINO	0xa0
1330Sstevel@tonic-gate #define	HVIO_INTR_GETVALID	0xa1
1340Sstevel@tonic-gate #define	HVIO_INTR_SETVALID	0xa2
1350Sstevel@tonic-gate #define	HVIO_INTR_GETSTATE	0xa3
1360Sstevel@tonic-gate #define	HVIO_INTR_SETSTATE	0xa4
1370Sstevel@tonic-gate #define	HVIO_INTR_GETTARGET	0xa5
1380Sstevel@tonic-gate #define	HVIO_INTR_SETTARGET	0xa6
1390Sstevel@tonic-gate 
1401991Sheppo #define	VINTR_GET_COOKIE	0xa7
1411991Sheppo #define	VINTR_SET_COOKIE	0xa8
1421991Sheppo #define	VINTR_GET_VALID		0xa9
1431991Sheppo #define	VINTR_SET_VALID		0xaa
1441991Sheppo #define	VINTR_GET_STATE		0xab
1451991Sheppo #define	VINTR_SET_STATE		0xac
1461991Sheppo #define	VINTR_GET_TARGET	0xad
1471991Sheppo #define	VINTR_SET_TARGET	0xae
1481991Sheppo 
1491991Sheppo #define	LDC_TX_QCONF		0xe0
1501991Sheppo #define	LDC_TX_QINFO		0xe1
1511991Sheppo #define	LDC_TX_GET_STATE	0xe2
1521991Sheppo #define	LDC_TX_SET_QTAIL	0xe3
1531991Sheppo #define	LDC_RX_QCONF		0xe4
1541991Sheppo #define	LDC_RX_QINFO		0xe5
1551991Sheppo #define	LDC_RX_GET_STATE	0xe6
1561991Sheppo #define	LDC_RX_SET_QHEAD	0xe7
1571991Sheppo 
1581991Sheppo #define	LDC_SET_MAP_TABLE	0xea
1591991Sheppo #define	LDC_GET_MAP_TABLE	0xeb
1601991Sheppo #define	LDC_COPY		0xec
1611991Sheppo #define	LDC_MAPIN		0xed
1621991Sheppo #define	LDC_UNMAP		0xee
1631991Sheppo #define	LDC_REVOKE		0xef
164*13098SWentao.Yang@Sun.COM #define	LDC_MAPIN_SIZE_MAX	0x187
1651991Sheppo 
1660Sstevel@tonic-gate #ifdef SET_MMU_STATS
1670Sstevel@tonic-gate #define	MMU_STAT_AREA		0xfc
1680Sstevel@tonic-gate #endif /* SET_MMU_STATS */
1690Sstevel@tonic-gate 
17011304SJanie.Lu@Sun.COM #define	HV_MACH_PRI		0x170
17111304SJanie.Lu@Sun.COM #define	HV_REBOOT_DATA_SET	0x172
17211304SJanie.Lu@Sun.COM 
17310346Swyllys.ingersoll@sun.com #define	HV_TPM_GET		0x176
17410346Swyllys.ingersoll@sun.com #define	HV_TPM_PUT		0x177
17510346Swyllys.ingersoll@sun.com 
1767718SJason.Beloro@Sun.COM #define	HV_TM_ENABLE		0x180
1777718SJason.Beloro@Sun.COM 
17811172SHaik.Aftandilian@Sun.COM #define	GUEST_SUSPEND		0x181
17911172SHaik.Aftandilian@Sun.COM #define	TICK_SET_NPT		0x182
18011172SHaik.Aftandilian@Sun.COM #define	STICK_SET_NPT		0x183
18111172SHaik.Aftandilian@Sun.COM 
182624Sschwartz #define	HV_RA2PA		0x200
183624Sschwartz #define	HV_HPRIV		0x201
184624Sschwartz 
1850Sstevel@tonic-gate /*
1861991Sheppo  * Function numbers for CORE_TRAP.
1871991Sheppo  */
1881991Sheppo #define	API_SET_VERSION		0x00
1891991Sheppo #define	API_PUT_CHAR		0x01
1901991Sheppo #define	API_EXIT		0x02
1911991Sheppo #define	API_GET_VERSION		0x03
1921991Sheppo 
1931991Sheppo 
1941991Sheppo /*
1953266Sjb145095  * Definitions for MACH_SOFT_STATE routines
1963266Sjb145095  */
1973266Sjb145095 
1983266Sjb145095 #define	SIS_NORMAL		0x01
1993266Sjb145095 #define	SIS_TRANSITION		0x02
2003266Sjb145095 
2013266Sjb145095 /*
2020Sstevel@tonic-gate  * Bits for MMU functions flags argument:
2030Sstevel@tonic-gate  *	arg3 of MMU_MAP_ADDR
2040Sstevel@tonic-gate  *	arg3 of MMU_DEMAP_CTX
2050Sstevel@tonic-gate  *	arg2 of MMU_DEMAP_ALL
2060Sstevel@tonic-gate  */
2070Sstevel@tonic-gate #define	MAP_DTLB		0x1
2080Sstevel@tonic-gate #define	MAP_ITLB		0x2
2090Sstevel@tonic-gate 
2100Sstevel@tonic-gate 
2110Sstevel@tonic-gate /*
2120Sstevel@tonic-gate  * Interrupt state manipulation definitions.
2130Sstevel@tonic-gate  */
2140Sstevel@tonic-gate 
2150Sstevel@tonic-gate #define	HV_INTR_IDLE_STATE	0
2160Sstevel@tonic-gate #define	HV_INTR_RECEIVED_STATE	1
2170Sstevel@tonic-gate #define	HV_INTR_DELIVERED_STATE	2
2180Sstevel@tonic-gate 
2190Sstevel@tonic-gate #define	HV_INTR_NOTVALID	0
2200Sstevel@tonic-gate #define	HV_INTR_VALID		1
2210Sstevel@tonic-gate 
2220Sstevel@tonic-gate #ifndef _ASM
2230Sstevel@tonic-gate 
2240Sstevel@tonic-gate /*
2250Sstevel@tonic-gate  * TSB description structure for MMU_TSB_CTX0 and MMU_TSB_CTXNON0.
2260Sstevel@tonic-gate  */
2270Sstevel@tonic-gate typedef struct hv_tsb_info {
2280Sstevel@tonic-gate 	uint16_t	hvtsb_idxpgsz;	/* page size used to index TSB */
2290Sstevel@tonic-gate 	uint16_t	hvtsb_assoc;	/* TSB associativity */
2300Sstevel@tonic-gate 	uint32_t	hvtsb_ntte;	/* TSB size (#TTE entries) */
2310Sstevel@tonic-gate 	uint32_t	hvtsb_ctx_index; /* context reg index */
2320Sstevel@tonic-gate 	uint32_t	hvtsb_pgszs;	/* sizes in use */
2330Sstevel@tonic-gate 	uint64_t	hvtsb_pa;	/* real address of TSB base */
2340Sstevel@tonic-gate 	uint64_t	hvtsb_rsvd;	/* reserved */
2350Sstevel@tonic-gate } hv_tsb_info_t;
2360Sstevel@tonic-gate 
2370Sstevel@tonic-gate #define	HVTSB_SHARE_INDEX	((uint32_t)-1)
2380Sstevel@tonic-gate 
2390Sstevel@tonic-gate #ifdef SET_MMU_STATS
2400Sstevel@tonic-gate #ifndef TTE4V_NPGSZ
2410Sstevel@tonic-gate #define	TTE4V_NPGSZ	8
2420Sstevel@tonic-gate #endif /* TTE4V_NPGSZ */
2430Sstevel@tonic-gate /*
2440Sstevel@tonic-gate  * MMU statistics structure for MMU_STAT_AREA
2450Sstevel@tonic-gate  */
2460Sstevel@tonic-gate struct mmu_stat_one {
2470Sstevel@tonic-gate 	uint64_t	hit_ctx0[TTE4V_NPGSZ];
2480Sstevel@tonic-gate 	uint64_t	hit_ctxn0[TTE4V_NPGSZ];
2490Sstevel@tonic-gate 	uint64_t	tsb_miss;
2500Sstevel@tonic-gate 	uint64_t	tlb_miss;	/* miss, no TSB set */
2510Sstevel@tonic-gate 	uint64_t	map_ctx0[TTE4V_NPGSZ];
2520Sstevel@tonic-gate 	uint64_t	map_ctxn0[TTE4V_NPGSZ];
2530Sstevel@tonic-gate };
2540Sstevel@tonic-gate 
2550Sstevel@tonic-gate struct mmu_stat {
2560Sstevel@tonic-gate 	struct mmu_stat_one	immu_stat;
2570Sstevel@tonic-gate 	struct mmu_stat_one	dmmu_stat;
2580Sstevel@tonic-gate 	uint64_t		set_ctx0;
2590Sstevel@tonic-gate 	uint64_t		set_ctxn0;
2600Sstevel@tonic-gate };
2610Sstevel@tonic-gate #endif /* SET_MMU_STATS */
2620Sstevel@tonic-gate 
2631991Sheppo #endif /* ! _ASM */
2640Sstevel@tonic-gate 
2650Sstevel@tonic-gate /*
2660Sstevel@tonic-gate  * CPU States
2670Sstevel@tonic-gate  */
2680Sstevel@tonic-gate #define	CPU_STATE_INVALID	0x0
2691991Sheppo #define	CPU_STATE_STOPPED	0x1	/* cpu not started */
2701991Sheppo #define	CPU_STATE_RUNNING	0x2	/* cpu running guest code */
2710Sstevel@tonic-gate #define	CPU_STATE_ERROR		0x3	/* cpu is in the error state */
2720Sstevel@tonic-gate #define	CPU_STATE_LAST_PUBLIC	CPU_STATE_ERROR	/* last valid state */
2730Sstevel@tonic-gate 
2740Sstevel@tonic-gate /*
2750Sstevel@tonic-gate  * MMU fault status area
2760Sstevel@tonic-gate  */
2770Sstevel@tonic-gate 
2780Sstevel@tonic-gate #define	MMFSA_TYPE_	0x00	/* fault type */
2790Sstevel@tonic-gate #define	MMFSA_ADDR_	0x08	/* fault address */
2800Sstevel@tonic-gate #define	MMFSA_CTX_	0x10	/* fault context */
2810Sstevel@tonic-gate 
2820Sstevel@tonic-gate #define	MMFSA_I_	0x00		/* start of fields for I */
2830Sstevel@tonic-gate #define	MMFSA_I_TYPE	(MMFSA_I_ + MMFSA_TYPE_) /* instruction fault type */
2840Sstevel@tonic-gate #define	MMFSA_I_ADDR	(MMFSA_I_ + MMFSA_ADDR_) /* instruction fault address */
2850Sstevel@tonic-gate #define	MMFSA_I_CTX	(MMFSA_I_ + MMFSA_CTX_)	/* instruction fault context */
2860Sstevel@tonic-gate 
2870Sstevel@tonic-gate #define	MMFSA_D_	0x40		/* start of fields for D */
2880Sstevel@tonic-gate #define	MMFSA_D_TYPE	(MMFSA_D_ + MMFSA_TYPE_) /* data fault type */
2890Sstevel@tonic-gate #define	MMFSA_D_ADDR	(MMFSA_D_ + MMFSA_ADDR_) /* data fault address */
2900Sstevel@tonic-gate #define	MMFSA_D_CTX	(MMFSA_D_ + MMFSA_CTX_)	/* data fault context */
2910Sstevel@tonic-gate 
2920Sstevel@tonic-gate #define	MMFSA_F_FMISS	1	/* fast miss */
2930Sstevel@tonic-gate #define	MMFSA_F_FPROT	2	/* fast protection */
2940Sstevel@tonic-gate #define	MMFSA_F_MISS	3	/* mmu miss */
2950Sstevel@tonic-gate #define	MMFSA_F_INVRA	4	/* invalid RA */
2960Sstevel@tonic-gate #define	MMFSA_F_PRIV	5	/* privilege violation */
2970Sstevel@tonic-gate #define	MMFSA_F_PROT	6	/* protection violation */
2980Sstevel@tonic-gate #define	MMFSA_F_NFO	7	/* NFO access */
2990Sstevel@tonic-gate #define	MMFSA_F_SOPG	8	/* so page */
3000Sstevel@tonic-gate #define	MMFSA_F_INVVA	9	/* invalid VA */
3010Sstevel@tonic-gate #define	MMFSA_F_INVASI	10	/* invalid ASI */
3020Sstevel@tonic-gate #define	MMFSA_F_NCATM	11	/* non-cacheable atomic */
3030Sstevel@tonic-gate #define	MMFSA_F_PRVACT	12	/* privileged action */
3040Sstevel@tonic-gate #define	MMFSA_F_WPT	13	/* watchpoint hit */
3050Sstevel@tonic-gate #define	MMFSA_F_UNALIGN	14	/* unaligned access */
3060Sstevel@tonic-gate #define	MMFSA_F_INVPGSZ	15	/* invalid page size */
3070Sstevel@tonic-gate 
3080Sstevel@tonic-gate #define	MMFSA_SIZE	0x80	/* in bytes, 64 byte aligned */
3090Sstevel@tonic-gate 
3100Sstevel@tonic-gate /*
3110Sstevel@tonic-gate  * MMU fault status - MMFSA_IFS and MMFSA_DFS
3120Sstevel@tonic-gate  */
3130Sstevel@tonic-gate #define	MMFS_FV		0x00000001
3140Sstevel@tonic-gate #define	MMFS_OW		0x00000002
3150Sstevel@tonic-gate #define	MMFS_W		0x00000004
3160Sstevel@tonic-gate #define	MMFS_PR		0x00000008
3170Sstevel@tonic-gate #define	MMFS_CT		0x00000030
3180Sstevel@tonic-gate #define	MMFS_E		0x00000040
3190Sstevel@tonic-gate #define	MMFS_FT		0x00003f80
3200Sstevel@tonic-gate #define	MMFS_ME		0x00004000
3210Sstevel@tonic-gate #define	MMFS_TM		0x00008000
3220Sstevel@tonic-gate #define	MMFS_ASI	0x00ff0000
3230Sstevel@tonic-gate #define	MMFS_NF		0x01000000
3240Sstevel@tonic-gate 
3250Sstevel@tonic-gate /*
3260Sstevel@tonic-gate  * DMA sync parameter definitions
3270Sstevel@tonic-gate  */
3287718SJason.Beloro@Sun.COM #define	HVIO_DMA_SYNC_DIR_TO_DEV		0x01
3297718SJason.Beloro@Sun.COM #define	HVIO_DMA_SYNC_DIR_FROM_DEV		0x02
3300Sstevel@tonic-gate 
3311991Sheppo /*
3321991Sheppo  * LDC Channel States
3331991Sheppo  */
3341991Sheppo #define	LDC_CHANNEL_DOWN	0x0
3351991Sheppo #define	LDC_CHANNEL_UP		0x1
3361991Sheppo #define	LDC_CHANNEL_RESET	0x2
3371991Sheppo 
338*13098SWentao.Yang@Sun.COM /*
339*13098SWentao.Yang@Sun.COM  * LDC mapin table types
340*13098SWentao.Yang@Sun.COM  */
341*13098SWentao.Yang@Sun.COM #define	LDC_MAPIN_TYPE_REGULAR	0x1		/* 8K page-size table */
342*13098SWentao.Yang@Sun.COM #define	LDC_MAPIN_TYPE_LARGE	0x2		/* Large page-size table */
343*13098SWentao.Yang@Sun.COM 
3440Sstevel@tonic-gate #ifndef _ASM
3450Sstevel@tonic-gate 
3460Sstevel@tonic-gate extern uint64_t hv_mmu_map_perm_addr(void *, int, uint64_t, int);
3470Sstevel@tonic-gate extern uint64_t	hv_mmu_unmap_perm_addr(void *, int, int);
3481991Sheppo extern uint64_t hv_mach_exit(uint64_t exit_code);
3491991Sheppo extern uint64_t hv_mach_sir(void);
3501991Sheppo 
3511991Sheppo extern uint64_t hv_cpu_start(uint64_t cpuid, uint64_t pc, uint64_t rtba,
3521991Sheppo     uint64_t arg);
3531991Sheppo extern uint64_t hv_cpu_stop(uint64_t cpuid);
3541991Sheppo extern uint64_t hv_cpu_set_rtba(uint64_t *rtba);
3551991Sheppo 
3560Sstevel@tonic-gate extern uint64_t	hv_set_ctx0(uint64_t, uint64_t);
3570Sstevel@tonic-gate extern uint64_t	hv_set_ctxnon0(uint64_t, uint64_t);
3581991Sheppo extern uint64_t hv_mmu_fault_area_conf(void *raddr);
3590Sstevel@tonic-gate #ifdef SET_MMU_STATS
3600Sstevel@tonic-gate extern uint64_t hv_mmu_set_stat_area(uint64_t, uint64_t);
3610Sstevel@tonic-gate #endif /* SET_MMU_STATS */
3620Sstevel@tonic-gate 
3630Sstevel@tonic-gate extern uint64_t hv_cpu_qconf(int queue, uint64_t paddr, int size);
3641991Sheppo extern uint64_t hv_cpu_yield(void);
3650Sstevel@tonic-gate extern uint64_t hv_cpu_state(uint64_t cpuid, uint64_t *cpu_state);
3660Sstevel@tonic-gate extern uint64_t hv_mem_scrub(uint64_t real_addr, uint64_t length,
3670Sstevel@tonic-gate     uint64_t *scrubbed_len);
3680Sstevel@tonic-gate extern uint64_t hv_mem_sync(uint64_t real_addr, uint64_t length,
3690Sstevel@tonic-gate     uint64_t *flushed_len);
3707718SJason.Beloro@Sun.COM extern uint64_t hv_tm_enable(uint64_t enable);
3710Sstevel@tonic-gate 
3720Sstevel@tonic-gate extern uint64_t hv_service_recv(uint64_t s_id, uint64_t buf_pa,
3730Sstevel@tonic-gate     uint64_t size, uint64_t *recv_bytes);
3740Sstevel@tonic-gate extern uint64_t hv_service_send(uint64_t s_id, uint64_t buf_pa,
3750Sstevel@tonic-gate     uint64_t size, uint64_t *send_bytes);
3760Sstevel@tonic-gate extern uint64_t hv_service_getstatus(uint64_t s_id, uint64_t *vreg);
377459Swh94709 extern uint64_t hv_service_setstatus(uint64_t s_id, uint64_t bits);
3780Sstevel@tonic-gate extern uint64_t hv_service_clrstatus(uint64_t s_id, uint64_t bits);
3790Sstevel@tonic-gate extern uint64_t hv_mach_desc(uint64_t buffer_ra, uint64_t *buffer_sizep);
3800Sstevel@tonic-gate 
3810Sstevel@tonic-gate extern uint64_t hv_ttrace_buf_info(uint64_t *, uint64_t *);
3820Sstevel@tonic-gate extern uint64_t hv_ttrace_buf_conf(uint64_t, uint64_t, uint64_t *);
3830Sstevel@tonic-gate extern uint64_t hv_ttrace_enable(uint64_t, uint64_t *);
3840Sstevel@tonic-gate extern uint64_t hv_ttrace_freeze(uint64_t, uint64_t *);
3850Sstevel@tonic-gate extern uint64_t hv_dump_buf_update(uint64_t, uint64_t, uint64_t *);
3862036Swentaoy extern uint64_t hv_mach_set_watchdog(uint64_t, uint64_t *);
3870Sstevel@tonic-gate 
3880Sstevel@tonic-gate extern int64_t hv_cnputchar(uint8_t);
3890Sstevel@tonic-gate extern int64_t hv_cngetchar(uint8_t *);
3902282Sjb145095 extern int64_t hv_cnwrite(uint64_t, uint64_t, uint64_t *);
3912282Sjb145095 extern int64_t hv_cnread(uint64_t, uint64_t, int64_t *);
3920Sstevel@tonic-gate 
3930Sstevel@tonic-gate extern uint64_t hv_tod_get(uint64_t *seconds);
3940Sstevel@tonic-gate extern uint64_t hv_tod_set(uint64_t);
3950Sstevel@tonic-gate 
3960Sstevel@tonic-gate extern uint64_t hvio_intr_devino_to_sysino(uint64_t dev_hdl, uint32_t devino,
3970Sstevel@tonic-gate     uint64_t *sysino);
3980Sstevel@tonic-gate extern uint64_t hvio_intr_getvalid(uint64_t sysino,
3991991Sheppo 	int *intr_valid_state);
4000Sstevel@tonic-gate extern uint64_t hvio_intr_setvalid(uint64_t sysino,
4011991Sheppo 	int intr_valid_state);
4020Sstevel@tonic-gate extern uint64_t hvio_intr_getstate(uint64_t sysino,
4031991Sheppo 	int *intr_state);
4040Sstevel@tonic-gate extern uint64_t hvio_intr_setstate(uint64_t sysino, int intr_state);
4050Sstevel@tonic-gate extern uint64_t hvio_intr_gettarget(uint64_t sysino, uint32_t *cpuid);
4060Sstevel@tonic-gate extern uint64_t hvio_intr_settarget(uint64_t sysino, uint32_t cpuid);
4073266Sjb145095 extern uint64_t hv_soft_state_set(uint64_t state, uint64_t string_ra);
4083266Sjb145095 extern uint64_t hv_soft_state_get(uint64_t string_ra, uint64_t *state);
4091370Sschwartz 
4101991Sheppo extern uint64_t hv_ldc_tx_qconf(uint64_t channel, uint64_t ra_base,
4111991Sheppo     uint64_t nentries);
4121991Sheppo extern uint64_t hv_ldc_tx_qinfo(uint64_t channel, uint64_t *ra_base,
4131991Sheppo     uint64_t *nentries);
4141991Sheppo extern uint64_t hv_ldc_tx_get_state(uint64_t channel, uint64_t *headp,
4151991Sheppo     uint64_t *tailp, uint64_t *state);
4161991Sheppo extern uint64_t hv_ldc_tx_set_qtail(uint64_t channel, uint64_t tail);
4171991Sheppo extern uint64_t hv_ldc_rx_qconf(uint64_t channel, uint64_t ra_base,
4181991Sheppo     uint64_t nentries);
4191991Sheppo extern uint64_t hv_ldc_rx_qinfo(uint64_t channel, uint64_t *ra_base,
4201991Sheppo     uint64_t *nentries);
4211991Sheppo extern uint64_t hv_ldc_rx_get_state(uint64_t channel, uint64_t *headp,
4221991Sheppo     uint64_t *tailp, uint64_t *state);
4231991Sheppo extern uint64_t hv_ldc_rx_set_qhead(uint64_t channel, uint64_t head);
4241991Sheppo 
4251991Sheppo extern uint64_t hv_ldc_set_map_table(uint64_t channel, uint64_t tbl_ra,
4261991Sheppo     uint64_t tbl_entries);
4271991Sheppo extern uint64_t hv_ldc_get_map_table(uint64_t channel, uint64_t *tbl_ra,
4281991Sheppo     uint64_t *tbl_entries);
4291991Sheppo extern uint64_t hv_ldc_copy(uint64_t channel, uint64_t request,
4301991Sheppo     uint64_t cookie, uint64_t raddr, uint64_t length, uint64_t *lengthp);
4311991Sheppo extern uint64_t hv_ldc_mapin(uint64_t channel, uint64_t cookie,
4321991Sheppo     uint64_t *raddr, uint64_t *perm);
4331991Sheppo extern uint64_t hv_ldc_unmap(uint64_t raddr);
4342531Snarayan extern uint64_t hv_ldc_revoke(uint64_t channel, uint64_t cookie,
4352531Snarayan     uint64_t revoke_cookie);
436*13098SWentao.Yang@Sun.COM extern uint64_t hv_ldc_mapin_size_max(uint64_t tbl_type, uint64_t *sz);
4371991Sheppo extern uint64_t hv_api_get_version(uint64_t api_group, uint64_t *majorp,
4381991Sheppo     uint64_t *minorp);
4391991Sheppo extern uint64_t hv_api_set_version(uint64_t api_group, uint64_t major,
4401991Sheppo     uint64_t minor, uint64_t *supported_minor);
4411991Sheppo 
4421991Sheppo extern uint64_t hvldc_intr_getcookie(uint64_t dev_hdl, uint32_t devino,
4431991Sheppo     uint64_t *cookie);
4441991Sheppo extern uint64_t hvldc_intr_setcookie(uint64_t dev_hdl, uint32_t devino,
4451991Sheppo     uint64_t cookie);
4461991Sheppo extern uint64_t hvldc_intr_getvalid(uint64_t dev_hdl, uint32_t devino,
4471991Sheppo     int *intr_valid_state);
4481991Sheppo extern uint64_t hvldc_intr_setvalid(uint64_t dev_hdl, uint32_t devino,
4491991Sheppo     int intr_valid_state);
4501991Sheppo extern uint64_t hvldc_intr_getstate(uint64_t dev_hdl, uint32_t devino,
4511991Sheppo     int *intr_state);
4521991Sheppo extern uint64_t hvldc_intr_setstate(uint64_t dev_hdl, uint32_t devino,
4531991Sheppo     int intr_state);
4541991Sheppo extern uint64_t hvldc_intr_gettarget(uint64_t dev_hdl, uint32_t devino,
4551991Sheppo     uint32_t *cpuid);
4561991Sheppo extern uint64_t hvldc_intr_settarget(uint64_t dev_hdl, uint32_t devino,
4571991Sheppo     uint32_t cpuid);
45811304SJanie.Lu@Sun.COM extern uint64_t hv_mach_pri(uint64_t buffer_ra, uint64_t *buffer_sizep);
45911304SJanie.Lu@Sun.COM extern uint64_t hv_reboot_data_set(uint64_t buffer_ra, uint64_t buffer_len);
4601991Sheppo 
46111172SHaik.Aftandilian@Sun.COM extern uint64_t	hv_guest_suspend(void);
46211172SHaik.Aftandilian@Sun.COM extern uint64_t	hv_tick_set_npt(uint64_t npt);
46311172SHaik.Aftandilian@Sun.COM extern uint64_t	hv_stick_set_npt(uint64_t npt);
46411172SHaik.Aftandilian@Sun.COM 
4651991Sheppo #endif /* ! _ASM */
4661991Sheppo 
4670Sstevel@tonic-gate 
4680Sstevel@tonic-gate #ifdef __cplusplus
4690Sstevel@tonic-gate }
4700Sstevel@tonic-gate #endif
4710Sstevel@tonic-gate 
4720Sstevel@tonic-gate #endif /* _SYS_HYPERVISOR_API_H */
473