xref: /onnv-gate/usr/src/uts/sun4v/sys/cpu_module.h (revision 0:68f95e015346)
1*0Sstevel@tonic-gate /*
2*0Sstevel@tonic-gate  * CDDL HEADER START
3*0Sstevel@tonic-gate  *
4*0Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
5*0Sstevel@tonic-gate  * Common Development and Distribution License, Version 1.0 only
6*0Sstevel@tonic-gate  * (the "License").  You may not use this file except in compliance
7*0Sstevel@tonic-gate  * with the License.
8*0Sstevel@tonic-gate  *
9*0Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10*0Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
11*0Sstevel@tonic-gate  * See the License for the specific language governing permissions
12*0Sstevel@tonic-gate  * and limitations under the License.
13*0Sstevel@tonic-gate  *
14*0Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
15*0Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16*0Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
17*0Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
18*0Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
19*0Sstevel@tonic-gate  *
20*0Sstevel@tonic-gate  * CDDL HEADER END
21*0Sstevel@tonic-gate  */
22*0Sstevel@tonic-gate /*
23*0Sstevel@tonic-gate  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24*0Sstevel@tonic-gate  * Use is subject to license terms.
25*0Sstevel@tonic-gate  */
26*0Sstevel@tonic-gate 
27*0Sstevel@tonic-gate #ifndef _SYS_CPU_MODULE_H
28*0Sstevel@tonic-gate #define	_SYS_CPU_MODULE_H
29*0Sstevel@tonic-gate 
30*0Sstevel@tonic-gate #pragma ident	"%Z%%M%	%I%	%E% SMI"
31*0Sstevel@tonic-gate 
32*0Sstevel@tonic-gate #include <sys/pte.h>
33*0Sstevel@tonic-gate #include <sys/async.h>
34*0Sstevel@tonic-gate #include <sys/x_call.h>
35*0Sstevel@tonic-gate #include <sys/conf.h>
36*0Sstevel@tonic-gate #include <sys/obpdefs.h>
37*0Sstevel@tonic-gate 
38*0Sstevel@tonic-gate #ifdef	__cplusplus
39*0Sstevel@tonic-gate extern "C" {
40*0Sstevel@tonic-gate #endif
41*0Sstevel@tonic-gate 
42*0Sstevel@tonic-gate 
43*0Sstevel@tonic-gate #ifdef _KERNEL
44*0Sstevel@tonic-gate 
45*0Sstevel@tonic-gate /*
46*0Sstevel@tonic-gate  * The are functions that are expected of the cpu modules.
47*0Sstevel@tonic-gate  */
48*0Sstevel@tonic-gate 
49*0Sstevel@tonic-gate extern struct module_ops *moduleops;
50*0Sstevel@tonic-gate 
51*0Sstevel@tonic-gate struct kdi;
52*0Sstevel@tonic-gate 
53*0Sstevel@tonic-gate /*
54*0Sstevel@tonic-gate  * module initialization
55*0Sstevel@tonic-gate  */
56*0Sstevel@tonic-gate void	cpu_setup(void);
57*0Sstevel@tonic-gate 
58*0Sstevel@tonic-gate /*
59*0Sstevel@tonic-gate  * set CPU implementation details
60*0Sstevel@tonic-gate  *
61*0Sstevel@tonic-gate  * mmu_init_mmu_page_sizes changes the mmu_page_sizes variable from
62*0Sstevel@tonic-gate  *	The default 4 page sizes to 6 page sizes for Panther-only domains,
63*0Sstevel@tonic-gate  *	and is called from fillsysinfo.c:check_cpus_set at early bootup time.
64*0Sstevel@tonic-gate  */
65*0Sstevel@tonic-gate struct cpu_node;
66*0Sstevel@tonic-gate void	cpu_fiximp(struct cpu_node *cpunode);
67*0Sstevel@tonic-gate #pragma weak mmu_init_mmu_page_sizes
68*0Sstevel@tonic-gate int	mmu_init_mmu_page_sizes(int cinfo);
69*0Sstevel@tonic-gate 
70*0Sstevel@tonic-gate /*
71*0Sstevel@tonic-gate  * virtual demap flushes (tlbs & virtual tag caches)
72*0Sstevel@tonic-gate  */
73*0Sstevel@tonic-gate void	vtag_flushpage(caddr_t addr, uint_t ctx);
74*0Sstevel@tonic-gate void	vtag_flushctx(uint_t ctx);
75*0Sstevel@tonic-gate void	vtag_flushall(void);
76*0Sstevel@tonic-gate void	vtag_flushpage_tl1(uint64_t addr, uint64_t ctx);
77*0Sstevel@tonic-gate void	vtag_flush_pgcnt_tl1(uint64_t addr, uint64_t ctx_pgcnt);
78*0Sstevel@tonic-gate void	vtag_flushctx_tl1(uint64_t ctx, uint64_t dummy);
79*0Sstevel@tonic-gate void	vtag_flushall_tl1(uint64_t dummy1, uint64_t dummy2);
80*0Sstevel@tonic-gate void	vtag_unmap_perm_tl1(uint64_t addr, uint64_t ctx);
81*0Sstevel@tonic-gate 
82*0Sstevel@tonic-gate /*
83*0Sstevel@tonic-gate  * virtual alias flushes (virtual address caches)
84*0Sstevel@tonic-gate  */
85*0Sstevel@tonic-gate void	vac_flushpage(pfn_t pf, int color);
86*0Sstevel@tonic-gate void	vac_flushpage_tl1(uint64_t pf, uint64_t color);
87*0Sstevel@tonic-gate void	vac_flushcolor(int color, pfn_t pf);
88*0Sstevel@tonic-gate void	vac_flushcolor_tl1(uint64_t color, uint64_t dummy);
89*0Sstevel@tonic-gate 
90*0Sstevel@tonic-gate /*
91*0Sstevel@tonic-gate  * Calculate, set optimal dtlb pagesize, for ISM and mpss, to support
92*0Sstevel@tonic-gate  * cpus with non-fully-associative dtlbs.
93*0Sstevel@tonic-gate  */
94*0Sstevel@tonic-gate extern uchar_t *ctx_pgsz_array;
95*0Sstevel@tonic-gate 
96*0Sstevel@tonic-gate /*
97*0Sstevel@tonic-gate  * flush instruction cache if needed
98*0Sstevel@tonic-gate  */
99*0Sstevel@tonic-gate void	flush_instr_mem(caddr_t addr, size_t len);
100*0Sstevel@tonic-gate 
101*0Sstevel@tonic-gate /*
102*0Sstevel@tonic-gate  * Cpu-specific error and ecache handling routines
103*0Sstevel@tonic-gate  */
104*0Sstevel@tonic-gate #pragma weak itlb_parity_trap
105*0Sstevel@tonic-gate void itlb_parity_trap(void);
106*0Sstevel@tonic-gate 
107*0Sstevel@tonic-gate #pragma weak dtlb_parity_trap
108*0Sstevel@tonic-gate void dtlb_parity_trap(void);
109*0Sstevel@tonic-gate 
110*0Sstevel@tonic-gate /*
111*0Sstevel@tonic-gate  * this symbol appears as a second label for vtag_flushall
112*0Sstevel@tonic-gate  * only for cpus that implement DEMAP_ALL_TYPE
113*0Sstevel@tonic-gate  */
114*0Sstevel@tonic-gate #pragma	weak demap_all
115*0Sstevel@tonic-gate 
116*0Sstevel@tonic-gate /*
117*0Sstevel@tonic-gate  * change cpu speed
118*0Sstevel@tonic-gate  */
119*0Sstevel@tonic-gate void	cpu_change_speed(uint64_t divisor, uint64_t arg2);
120*0Sstevel@tonic-gate 
121*0Sstevel@tonic-gate /*
122*0Sstevel@tonic-gate  * flush routine
123*0Sstevel@tonic-gate  */
124*0Sstevel@tonic-gate #pragma weak dtrace_flush_sec
125*0Sstevel@tonic-gate void	dtrace_flush_sec(uintptr_t);
126*0Sstevel@tonic-gate 
127*0Sstevel@tonic-gate /*
128*0Sstevel@tonic-gate  * Cpu private initialize/uninitialize, including ecache scrubber.
129*0Sstevel@tonic-gate  */
130*0Sstevel@tonic-gate void	cpu_init_private(struct cpu *);
131*0Sstevel@tonic-gate void	cpu_uninit_private(struct cpu *);
132*0Sstevel@tonic-gate 
133*0Sstevel@tonic-gate #pragma weak cpu_mp_init
134*0Sstevel@tonic-gate void    cpu_mp_init(void);
135*0Sstevel@tonic-gate 
136*0Sstevel@tonic-gate #pragma weak cpu_feature_init
137*0Sstevel@tonic-gate void    cpu_feature_init(void);
138*0Sstevel@tonic-gate 
139*0Sstevel@tonic-gate #pragma weak cpu_error_init
140*0Sstevel@tonic-gate void	cpu_error_init(int);
141*0Sstevel@tonic-gate 
142*0Sstevel@tonic-gate extern int kzero(void *addr, size_t count);
143*0Sstevel@tonic-gate extern void uzero(void *addr, size_t count);
144*0Sstevel@tonic-gate extern void bzero(void *addr, size_t count);
145*0Sstevel@tonic-gate 
146*0Sstevel@tonic-gate #endif /* _KERNEL */
147*0Sstevel@tonic-gate 
148*0Sstevel@tonic-gate #ifdef	__cplusplus
149*0Sstevel@tonic-gate }
150*0Sstevel@tonic-gate #endif
151*0Sstevel@tonic-gate 
152*0Sstevel@tonic-gate #endif /* _SYS_CPU_MODULE_H */
153