xref: /onnv-gate/usr/src/uts/sun4v/os/mach_mp_startup.c (revision 4203:8d20ed8bb872)
10Sstevel@tonic-gate /*
20Sstevel@tonic-gate  * CDDL HEADER START
30Sstevel@tonic-gate  *
40Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
51991Sheppo  * Common Development and Distribution License (the "License").
61991Sheppo  * You may not use this file except in compliance with the License.
70Sstevel@tonic-gate  *
80Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
90Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
100Sstevel@tonic-gate  * See the License for the specific language governing permissions
110Sstevel@tonic-gate  * and limitations under the License.
120Sstevel@tonic-gate  *
130Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
140Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
150Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
160Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
170Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
180Sstevel@tonic-gate  *
190Sstevel@tonic-gate  * CDDL HEADER END
200Sstevel@tonic-gate  */
211991Sheppo 
220Sstevel@tonic-gate /*
234050Sjb145095  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
240Sstevel@tonic-gate  * Use is subject to license terms.
250Sstevel@tonic-gate  */
260Sstevel@tonic-gate 
270Sstevel@tonic-gate #pragma ident	"%Z%%M%	%I%	%E% SMI"
280Sstevel@tonic-gate 
290Sstevel@tonic-gate #include <sys/machsystm.h>
300Sstevel@tonic-gate #include <sys/cpu_module.h>
310Sstevel@tonic-gate #include <sys/dtrace.h>
320Sstevel@tonic-gate #include <sys/cpu_sgnblk_defs.h>
331991Sheppo #include <sys/mdesc.h>
341991Sheppo #include <sys/mach_descrip.h>
352957Sjm22469 #include <sys/ldoms.h>
363266Sjb145095 #include <sys/hypervisor_api.h>
373266Sjb145095 #include <sys/soft_state.h>
380Sstevel@tonic-gate 
390Sstevel@tonic-gate /*
400Sstevel@tonic-gate  * Useful for disabling MP bring-up for an MP capable kernel
410Sstevel@tonic-gate  * (a kernel that was built with MP defined)
420Sstevel@tonic-gate  */
430Sstevel@tonic-gate int use_mp = 1;			/* set to come up mp */
440Sstevel@tonic-gate 
450Sstevel@tonic-gate /*
460Sstevel@tonic-gate  * Init CPU info - get CPU type info for processor_info system call.
470Sstevel@tonic-gate  */
480Sstevel@tonic-gate void
490Sstevel@tonic-gate init_cpu_info(struct cpu *cp)
500Sstevel@tonic-gate {
510Sstevel@tonic-gate 	processor_info_t *pi = &cp->cpu_type_info;
520Sstevel@tonic-gate 	int cpuid = cp->cpu_id;
530Sstevel@tonic-gate 	struct cpu_node *cpunode = &cpunodes[cpuid];
540Sstevel@tonic-gate 	char buf[CPU_IDSTRLEN];
550Sstevel@tonic-gate 
560Sstevel@tonic-gate 	cp->cpu_fpowner = NULL;		/* not used for V9 */
570Sstevel@tonic-gate 
580Sstevel@tonic-gate 	/*
590Sstevel@tonic-gate 	 * Get clock-frequency property from cpunodes[] for the CPU.
600Sstevel@tonic-gate 	 */
610Sstevel@tonic-gate 	pi->pi_clock = (cpunode->clock_freq + 500000) / 1000000;
620Sstevel@tonic-gate 
630Sstevel@tonic-gate 	(void) strcpy(pi->pi_processor_type, "sparcv9");
640Sstevel@tonic-gate 	(void) strcpy(pi->pi_fputypes, "sparcv9");
650Sstevel@tonic-gate 
660Sstevel@tonic-gate 	(void) snprintf(buf, sizeof (buf),
670Sstevel@tonic-gate 	    "%s (cpuid %d clock %d MHz)",
680Sstevel@tonic-gate 	    cpunode->name, cpunode->cpuid, pi->pi_clock);
690Sstevel@tonic-gate 
700Sstevel@tonic-gate 	cp->cpu_idstr = kmem_alloc(strlen(buf) + 1, KM_SLEEP);
710Sstevel@tonic-gate 	(void) strcpy(cp->cpu_idstr, buf);
720Sstevel@tonic-gate 
730Sstevel@tonic-gate 	cmn_err(CE_CONT, "?cpu%d: %s\n", cpuid, cp->cpu_idstr);
740Sstevel@tonic-gate 
750Sstevel@tonic-gate 	cp->cpu_brandstr = kmem_alloc(strlen(cpunode->name) + 1, KM_SLEEP);
760Sstevel@tonic-gate 	(void) strcpy(cp->cpu_brandstr, cpunode->name);
770Sstevel@tonic-gate 
780Sstevel@tonic-gate 	/*
790Sstevel@tonic-gate 	 * StarFire requires the signature block stuff setup here
800Sstevel@tonic-gate 	 */
810Sstevel@tonic-gate 	CPU_SGN_MAPIN(cpuid);
820Sstevel@tonic-gate 	if (cpuid == cpu0.cpu_id) {
830Sstevel@tonic-gate 		/*
840Sstevel@tonic-gate 		 * cpu0 starts out running.  Other cpus are
850Sstevel@tonic-gate 		 * still in OBP land and we will leave them
860Sstevel@tonic-gate 		 * alone for now.
870Sstevel@tonic-gate 		 */
880Sstevel@tonic-gate 		CPU_SIGNATURE(OS_SIG, SIGST_RUN, SIGSUBST_NULL, cpuid);
893266Sjb145095 		/*
903266Sjb145095 		 * On first cpu setup, tell hv we are booting
913266Sjb145095 		 */
923266Sjb145095 		mach_set_soft_state(SIS_TRANSITION,
933266Sjb145095 				&SOLARIS_SOFT_STATE_BOOT_MSG);
940Sstevel@tonic-gate #ifdef	lint
950Sstevel@tonic-gate 		cpuid = cpuid;
960Sstevel@tonic-gate #endif	/* lint */
970Sstevel@tonic-gate 	}
980Sstevel@tonic-gate }
990Sstevel@tonic-gate 
1000Sstevel@tonic-gate /*
1011991Sheppo  * Routine used to cleanup a CPU that has been powered off. This will
1020Sstevel@tonic-gate  * destroy all per-cpu information related to this cpu.
1030Sstevel@tonic-gate  */
1040Sstevel@tonic-gate int
1050Sstevel@tonic-gate mp_cpu_unconfigure(int cpuid)
1060Sstevel@tonic-gate {
1071991Sheppo 	int retval;
1081991Sheppo 	extern void empty_cpu(int);
1091991Sheppo 	extern int cleanup_cpu_common(int);
1101991Sheppo 
1111991Sheppo 	ASSERT(MUTEX_HELD(&cpu_lock));
1121991Sheppo 
1131991Sheppo 	retval = cleanup_cpu_common(cpuid);
1141991Sheppo 
1151991Sheppo 	empty_cpu(cpuid);
1161991Sheppo 
1171991Sheppo 	return (retval);
1180Sstevel@tonic-gate }
1190Sstevel@tonic-gate 
1201991Sheppo struct mp_find_cpu_arg {
1211991Sheppo 	int cpuid;		/* set by mp_cpu_configure() */
1221991Sheppo 	dev_info_t *dip;	/* set by mp_find_cpu() */
1231991Sheppo };
1241991Sheppo 
1250Sstevel@tonic-gate int
1260Sstevel@tonic-gate mp_find_cpu(dev_info_t *dip, void *arg)
1270Sstevel@tonic-gate {
1281991Sheppo 	struct mp_find_cpu_arg *target = (struct mp_find_cpu_arg *)arg;
1291991Sheppo 	char	*type;
1301991Sheppo 	int	rv = DDI_WALK_CONTINUE;
1311991Sheppo 	int	cpuid;
1321991Sheppo 
1331991Sheppo 	if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip,
1341991Sheppo 	    DDI_PROP_DONTPASS, "device_type", &type))
1351991Sheppo 		return (DDI_WALK_CONTINUE);
1361991Sheppo 
1371991Sheppo 	if (strcmp(type, "cpu") != 0)
1381991Sheppo 		goto out;
1391991Sheppo 
1401991Sheppo 	cpuid = ddi_prop_get_int(DDI_DEV_T_ANY, dip,
1411991Sheppo 	    DDI_PROP_DONTPASS, "reg", -1);
1421991Sheppo 
1431991Sheppo 	if (cpuid == -1) {
1441991Sheppo 		cmn_err(CE_PANIC, "reg prop not found in cpu node");
1451991Sheppo 	}
1461991Sheppo 
1471991Sheppo 	cpuid = PROM_CFGHDL_TO_CPUID(cpuid);
1481991Sheppo 
1491991Sheppo 	if (cpuid != target->cpuid)
1501991Sheppo 		goto out;
1511991Sheppo 
1521991Sheppo 	/* Found it */
1531991Sheppo 	rv = DDI_WALK_TERMINATE;
1541991Sheppo 	target->dip = dip;
1551991Sheppo 
1561991Sheppo out:
1571991Sheppo 	ddi_prop_free(type);
1581991Sheppo 	return (rv);
1590Sstevel@tonic-gate }
1600Sstevel@tonic-gate 
1610Sstevel@tonic-gate /*
1620Sstevel@tonic-gate  * Routine used to setup a newly inserted CPU in preparation for starting
1630Sstevel@tonic-gate  * it running code.
1640Sstevel@tonic-gate  */
1650Sstevel@tonic-gate int
1660Sstevel@tonic-gate mp_cpu_configure(int cpuid)
1670Sstevel@tonic-gate {
1681991Sheppo 	extern void fill_cpu(md_t *, mde_cookie_t);
1694050Sjb145095 	extern int setup_cpu_common(int);
1704050Sjb145095 	extern int cleanup_cpu_common(int);
1711991Sheppo 	extern void setup_exec_unit_mappings(md_t *);
1721991Sheppo 
173*4203Srsmaeda 	md_t		*mdp;
174*4203Srsmaeda 	mde_cookie_t	rootnode, cpunode = MDE_INVAL_ELEM_COOKIE;
175*4203Srsmaeda 	int		listsz, i;
176*4203Srsmaeda 	mde_cookie_t	*listp = NULL;
177*4203Srsmaeda 	int		num_nodes;
178*4203Srsmaeda 	uint64_t	cpuid_prop;
179*4203Srsmaeda 	cpu_t		*cpu;
180*4203Srsmaeda 	processorid_t	id;
1811991Sheppo 
1821991Sheppo 	ASSERT(MUTEX_HELD(&cpu_lock));
1831991Sheppo 
1841991Sheppo 	if ((mdp = md_get_handle()) == NULL)
1851991Sheppo 		return (ENODEV);
1861991Sheppo 
1871991Sheppo 	rootnode = md_root_node(mdp);
1881991Sheppo 
1891991Sheppo 	ASSERT(rootnode != MDE_INVAL_ELEM_COOKIE);
1901991Sheppo 
1911991Sheppo 	num_nodes = md_node_count(mdp);
1921991Sheppo 
1931991Sheppo 	ASSERT(num_nodes > 0);
1941991Sheppo 
1951991Sheppo 	listsz = num_nodes * sizeof (mde_cookie_t);
1961991Sheppo 	listp = kmem_zalloc(listsz, KM_SLEEP);
1971991Sheppo 
1981991Sheppo 	num_nodes = md_scan_dag(mdp, rootnode, md_find_name(mdp, "cpu"),
1991991Sheppo 	    md_find_name(mdp, "fwd"), listp);
2001991Sheppo 
2011991Sheppo 	if (num_nodes < 0)
2021991Sheppo 		return (ENODEV);
2031991Sheppo 
2041991Sheppo 	for (i = 0; i < num_nodes; i++) {
2051991Sheppo 		if (md_get_prop_val(mdp, listp[i], "id", &cpuid_prop))
2061991Sheppo 			break;
2071991Sheppo 		if (cpuid_prop == (uint64_t)cpuid) {
2081991Sheppo 			cpunode = listp[i];
2091991Sheppo 			break;
2101991Sheppo 		}
2111991Sheppo 	}
2121991Sheppo 
2131991Sheppo 	if (cpunode == MDE_INVAL_ELEM_COOKIE)
2141991Sheppo 		return (ENODEV);
2151991Sheppo 
2161991Sheppo 	kmem_free(listp, listsz);
2171991Sheppo 
2181991Sheppo 	/*
2191991Sheppo 	 * Note: uses cpu_lock to protect cpunodes and ncpunodes
2201991Sheppo 	 * which will be modified inside of fill_cpu and
2211991Sheppo 	 * setup_exec_unit_mappings.
2221991Sheppo 	 */
2231991Sheppo 	fill_cpu(mdp, cpunode);
2241991Sheppo 
2251991Sheppo 	/*
226*4203Srsmaeda 	 * Adding a CPU may cause the execution unit sharing
227*4203Srsmaeda 	 * relationships to change. Update the mappings in
228*4203Srsmaeda 	 * the cpunode structures.
2291991Sheppo 	 */
2301991Sheppo 	setup_exec_unit_mappings(mdp);
2311991Sheppo 
232*4203Srsmaeda 	/* propagate the updated mappings to the CPU structures */
233*4203Srsmaeda 	for (id = 0; id < NCPU; id++) {
234*4203Srsmaeda 		if ((cpu = cpu_get(id)) == NULL)
235*4203Srsmaeda 			continue;
236*4203Srsmaeda 
237*4203Srsmaeda 		cpu_map_exec_units(cpu);
238*4203Srsmaeda 	}
239*4203Srsmaeda 
2401991Sheppo 	(void) md_fini_handle(mdp);
2411991Sheppo 
2424050Sjb145095 	if ((i = setup_cpu_common(cpuid)) != 0) {
2434050Sjb145095 		(void) cleanup_cpu_common(cpuid);
2444050Sjb145095 		return (i);
2454050Sjb145095 	}
246*4203Srsmaeda 
2470Sstevel@tonic-gate 	return (0);
2480Sstevel@tonic-gate }
2492957Sjm22469 
2502957Sjm22469 /*
2512957Sjm22469  * Platform-specific actions to be taken when all cpus are running
2522957Sjm22469  * in the OS.
2532957Sjm22469  */
2542957Sjm22469 void
2552957Sjm22469 cpu_mp_init(void)
2562957Sjm22469 {
2572957Sjm22469 	extern void recalc_xc_timeouts();
2582957Sjm22469 	extern int cif_cpu_mp_ready;
2592957Sjm22469 
2602957Sjm22469 	/* N.B. This must happen after xc_init() has run. */
2612957Sjm22469 	recalc_xc_timeouts();
2622957Sjm22469 
2632957Sjm22469 	if (!(domaining_capabilities & DOMAINING_ENABLED))
2642957Sjm22469 		return;
2652957Sjm22469 
2662957Sjm22469 	cif_cpu_mp_ready = 1;
2672957Sjm22469 }
268