1*3299Sschwartz /* 2*3299Sschwartz * CDDL HEADER START 3*3299Sschwartz * 4*3299Sschwartz * The contents of this file are subject to the terms of the 5*3299Sschwartz * Common Development and Distribution License (the "License"). 6*3299Sschwartz * You may not use this file except in compliance with the License. 7*3299Sschwartz * 8*3299Sschwartz * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*3299Sschwartz * or http://www.opensolaris.org/os/licensing. 10*3299Sschwartz * See the License for the specific language governing permissions 11*3299Sschwartz * and limitations under the License. 12*3299Sschwartz * 13*3299Sschwartz * When distributing Covered Code, include this CDDL HEADER in each 14*3299Sschwartz * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*3299Sschwartz * If applicable, add the following below this CDDL HEADER, with the 16*3299Sschwartz * fields enclosed by brackets "[]" replaced with your own identifying 17*3299Sschwartz * information: Portions Copyright [yyyy] [name of copyright owner] 18*3299Sschwartz * 19*3299Sschwartz * CDDL HEADER END 20*3299Sschwartz */ 21*3299Sschwartz 22*3299Sschwartz /* 23*3299Sschwartz * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 24*3299Sschwartz * Use is subject to license terms. 25*3299Sschwartz */ 26*3299Sschwartz 27*3299Sschwartz #ifndef _N2PIUPC_BITERR_H 28*3299Sschwartz #define _N2PIUPC_BITERR_H 29*3299Sschwartz 30*3299Sschwartz #pragma ident "%Z%%M% %I% %E% SMI" 31*3299Sschwartz 32*3299Sschwartz /* 33*3299Sschwartz * "Virtual register" definitions for the bit error performance counters. 34*3299Sschwartz * 35*3299Sschwartz * The N2 PIU presents two bit error counters. Bit 63 on the first counter 36*3299Sschwartz * serves as an enable for all bit error counters. Bit 62 serves as a clear 37*3299Sschwartz * for all the bit error counters. 38*3299Sschwartz * 39*3299Sschwartz * Busstat doesn't play well with a register that has counters, enable and 40*3299Sschwartz * clear, so this module presents to the rest of the driver and to busstat a 41*3299Sschwartz * new layered set of register interfaces. 42*3299Sschwartz * 43*3299Sschwartz * These are: 44*3299Sschwartz * SW_N2PIU_BITERR_CNT1_DATA Biterr counter 1 data (readonly) 45*3299Sschwartz * Maps directly to HW biterr 46*3299Sschwartz * counter 1. Returns data for 47*3299Sschwartz * bad_dllps, bad_tlps, 48*3299Sschwartz * phys_rcvr_errs 49*3299Sschwartz * 50*3299Sschwartz * SW_N2PIU_BITERR_CNT2_DATA Biterr counter 2 data (readonly) 51*3299Sschwartz * Maps to HW biterr counter 2, but 52*3299Sschwartz * offers evt select of individual 53*3299Sschwartz * lanes 0-7 or all lanes together 54*3299Sschwartz * 55*3299Sschwartz * SW_N2PIU_BITERR_CLR Setting bit 62 here clears all biterr 56*3299Sschwartz * counters (write-only) 57*3299Sschwartz * 58*3299Sschwartz * SW_N2PIU_BITERR_SEL Bit 63 is overall biterr enable. 59*3299Sschwartz * Bits 0-3 are event select for counter 2 60*3299Sschwartz * (read-write) 61*3299Sschwartz * 62*3299Sschwartz * Note: each is assigned an offset similar to the offset of real performance 63*3299Sschwartz * counter registers. Offsets for these registers extend beyond the real reg 64*3299Sschwartz * set. 65*3299Sschwartz */ 66*3299Sschwartz 67*3299Sschwartz #ifdef __cplusplus 68*3299Sschwartz extern "C" { 69*3299Sschwartz #endif 70*3299Sschwartz 71*3299Sschwartz #include <sys/sunddi.h> 72*3299Sschwartz 73*3299Sschwartz /* SW abstractions for the BITERR counters. */ 74*3299Sschwartz 75*3299Sschwartz /* Select register. Select enable for all biterr ctrs, and PIC3 events. */ 76*3299Sschwartz #define SW_N2PIU_BITERR_SEL HVIO_N2PIU_PERFREG_NUM_REGS 77*3299Sschwartz 78*3299Sschwartz /* Clear register. This zeros out all biterr ctrs. */ 79*3299Sschwartz #define SW_N2PIU_BITERR_CLR (HVIO_N2PIU_PERFREG_NUM_REGS + 1) 80*3299Sschwartz 81*3299Sschwartz /* Biterr counter 1. Same as in the PRM. */ 82*3299Sschwartz #define SW_N2PIU_BITERR_CNT1_DATA (HVIO_N2PIU_PERFREG_NUM_REGS + 2) 83*3299Sschwartz 84*3299Sschwartz /* 85*3299Sschwartz * Biterr counter 2. Reports errors for all lanes, or for any individual lane. 86*3299Sschwartz * Select what to report with the SELect register above. Enabled only if the 87*3299Sschwartz * enable for all biterr counters is enabled. 88*3299Sschwartz */ 89*3299Sschwartz #define SW_N2PIU_BITERR_CNT2_DATA (HVIO_N2PIU_PERFREG_NUM_REGS + 3) 90*3299Sschwartz 91*3299Sschwartz /* Biterr counter abstraction functions. */ 92*3299Sschwartz extern int n2piupc_biterr_attach(void **); 93*3299Sschwartz extern void n2piupc_biterr_detach(void *); 94*3299Sschwartz extern int n2piupc_biterr_write(n2piupc_t *n2piupc_p, int regid, uint64_t data); 95*3299Sschwartz extern int n2piupc_biterr_read(n2piupc_t *n2piupc_p, int regid, uint64_t *data); 96*3299Sschwartz 97*3299Sschwartz #ifdef __cplusplus 98*3299Sschwartz } 99*3299Sschwartz #endif 100*3299Sschwartz 101*3299Sschwartz #endif /* _N2PIUPC_BITERR_H */ 102