xref: /onnv-gate/usr/src/uts/sun4u/sys/pci/pci_sc.h (revision 0:68f95e015346)
1*0Sstevel@tonic-gate /*
2*0Sstevel@tonic-gate  * CDDL HEADER START
3*0Sstevel@tonic-gate  *
4*0Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
5*0Sstevel@tonic-gate  * Common Development and Distribution License, Version 1.0 only
6*0Sstevel@tonic-gate  * (the "License").  You may not use this file except in compliance
7*0Sstevel@tonic-gate  * with the License.
8*0Sstevel@tonic-gate  *
9*0Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10*0Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
11*0Sstevel@tonic-gate  * See the License for the specific language governing permissions
12*0Sstevel@tonic-gate  * and limitations under the License.
13*0Sstevel@tonic-gate  *
14*0Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
15*0Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16*0Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
17*0Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
18*0Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
19*0Sstevel@tonic-gate  *
20*0Sstevel@tonic-gate  * CDDL HEADER END
21*0Sstevel@tonic-gate  */
22*0Sstevel@tonic-gate /*
23*0Sstevel@tonic-gate  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24*0Sstevel@tonic-gate  * Use is subject to license terms.
25*0Sstevel@tonic-gate  */
26*0Sstevel@tonic-gate 
27*0Sstevel@tonic-gate #ifndef	_SYS_PCI_SC_H
28*0Sstevel@tonic-gate #define	_SYS_PCI_SC_H
29*0Sstevel@tonic-gate 
30*0Sstevel@tonic-gate #pragma ident	"%Z%%M%	%I%	%E% SMI"
31*0Sstevel@tonic-gate 
32*0Sstevel@tonic-gate #ifdef	__cplusplus
33*0Sstevel@tonic-gate extern "C" {
34*0Sstevel@tonic-gate #endif
35*0Sstevel@tonic-gate 
36*0Sstevel@tonic-gate /*
37*0Sstevel@tonic-gate  * streaming cache (sc) block soft state structure:
38*0Sstevel@tonic-gate  *
39*0Sstevel@tonic-gate  * Each pci node contains has its own private sc block structure.
40*0Sstevel@tonic-gate  */
41*0Sstevel@tonic-gate typedef struct sc sc_t;
42*0Sstevel@tonic-gate struct sc {
43*0Sstevel@tonic-gate 
44*0Sstevel@tonic-gate 	pci_t *sc_pci_p;	/* link back to pci soft state */
45*0Sstevel@tonic-gate 
46*0Sstevel@tonic-gate 	/*
47*0Sstevel@tonic-gate 	 * control registers (psycho and schizo):
48*0Sstevel@tonic-gate 	 */
49*0Sstevel@tonic-gate 	volatile uint64_t *sc_ctrl_reg;
50*0Sstevel@tonic-gate 	volatile uint64_t *sc_invl_reg;
51*0Sstevel@tonic-gate 	volatile uint64_t *sc_sync_reg;
52*0Sstevel@tonic-gate 	uint64_t sc_sync_reg_pa;
53*0Sstevel@tonic-gate 
54*0Sstevel@tonic-gate 	/*
55*0Sstevel@tonic-gate 	 * control registers (schizo only):
56*0Sstevel@tonic-gate 	 */
57*0Sstevel@tonic-gate 	volatile uint64_t *sc_ctx_invl_reg;
58*0Sstevel@tonic-gate 	volatile uint64_t *sc_ctx_match_reg;
59*0Sstevel@tonic-gate 
60*0Sstevel@tonic-gate 	/*
61*0Sstevel@tonic-gate 	 * diagnostic access registers:
62*0Sstevel@tonic-gate 	 */
63*0Sstevel@tonic-gate 	volatile uint64_t *sc_data_diag_acc;
64*0Sstevel@tonic-gate 	volatile uint64_t *sc_tag_diag_acc;
65*0Sstevel@tonic-gate 	volatile uint64_t *sc_ltag_diag_acc;
66*0Sstevel@tonic-gate 
67*0Sstevel@tonic-gate 	/*
68*0Sstevel@tonic-gate 	 * Sync flag and its associated buffer.
69*0Sstevel@tonic-gate 	 */
70*0Sstevel@tonic-gate 	caddr_t sc_sync_flag_base;
71*0Sstevel@tonic-gate 	volatile uint64_t *sc_sync_flag_vaddr;
72*0Sstevel@tonic-gate 	uint64_t sc_sync_flag_pa;
73*0Sstevel@tonic-gate 
74*0Sstevel@tonic-gate 	kmutex_t sc_sync_mutex;		/* mutex for flush/sync register */
75*0Sstevel@tonic-gate };
76*0Sstevel@tonic-gate 
77*0Sstevel@tonic-gate #define	PCI_SBUF_ENTRIES	16	/* number of i/o cache lines */
78*0Sstevel@tonic-gate #define	PCI_SBUF_LINE_SIZE	64	/* size of i/o cache line */
79*0Sstevel@tonic-gate 
80*0Sstevel@tonic-gate #define	PCI_CACHE_LINE_SIZE	(PCI_SBUF_LINE_SIZE / 4)
81*0Sstevel@tonic-gate 
82*0Sstevel@tonic-gate extern void sc_create(pci_t *pci_p);
83*0Sstevel@tonic-gate extern void sc_destroy(pci_t *pci_p);
84*0Sstevel@tonic-gate extern void sc_configure(sc_t *sc_p);
85*0Sstevel@tonic-gate 
86*0Sstevel@tonic-gate /*
87*0Sstevel@tonic-gate  * The most significant bit (63) of each context match register.
88*0Sstevel@tonic-gate  */
89*0Sstevel@tonic-gate #define	SC_CMR_DIRTY_BIT	1
90*0Sstevel@tonic-gate #define	SC_ENTRIES		16
91*0Sstevel@tonic-gate #define	SC_ENT_SHIFT		(64 - SC_ENTRIES)
92*0Sstevel@tonic-gate 
93*0Sstevel@tonic-gate #ifdef	__cplusplus
94*0Sstevel@tonic-gate }
95*0Sstevel@tonic-gate #endif
96*0Sstevel@tonic-gate 
97*0Sstevel@tonic-gate #endif	/* _SYS_PCI_SC_H */
98