1*0Sstevel@tonic-gate /* 2*0Sstevel@tonic-gate * CDDL HEADER START 3*0Sstevel@tonic-gate * 4*0Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*0Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 6*0Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 7*0Sstevel@tonic-gate * with the License. 8*0Sstevel@tonic-gate * 9*0Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*0Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 11*0Sstevel@tonic-gate * See the License for the specific language governing permissions 12*0Sstevel@tonic-gate * and limitations under the License. 13*0Sstevel@tonic-gate * 14*0Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 15*0Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*0Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 17*0Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 18*0Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 19*0Sstevel@tonic-gate * 20*0Sstevel@tonic-gate * CDDL HEADER END 21*0Sstevel@tonic-gate */ 22*0Sstevel@tonic-gate /* 23*0Sstevel@tonic-gate * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24*0Sstevel@tonic-gate * Use is subject to license terms. 25*0Sstevel@tonic-gate */ 26*0Sstevel@tonic-gate 27*0Sstevel@tonic-gate #ifndef _SYS_DRMACH_H_ 28*0Sstevel@tonic-gate #define _SYS_DRMACH_H_ 29*0Sstevel@tonic-gate 30*0Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 31*0Sstevel@tonic-gate 32*0Sstevel@tonic-gate #include <sys/types.h> 33*0Sstevel@tonic-gate #include <sys/memlist.h> 34*0Sstevel@tonic-gate #include <sys/processor.h> 35*0Sstevel@tonic-gate #include <sys/starfire.h> 36*0Sstevel@tonic-gate #include <sys/sbd_ioctl.h> 37*0Sstevel@tonic-gate #include <sys/sysevent.h> 38*0Sstevel@tonic-gate 39*0Sstevel@tonic-gate #ifdef __cplusplus 40*0Sstevel@tonic-gate extern "C" { 41*0Sstevel@tonic-gate #endif 42*0Sstevel@tonic-gate 43*0Sstevel@tonic-gate #define MAX_BOARDS plat_max_boards() 44*0Sstevel@tonic-gate #define MAX_CPU_UNITS_PER_BOARD plat_max_cpu_units_per_board() 45*0Sstevel@tonic-gate #define MAX_MEM_UNITS_PER_BOARD plat_max_mem_units_per_board() 46*0Sstevel@tonic-gate #define MAX_IO_UNITS_PER_BOARD plat_max_io_units_per_board() 47*0Sstevel@tonic-gate #define MAX_CMP_UNITS_PER_BOARD MAX_CPU_UNITS_PER_BOARD 48*0Sstevel@tonic-gate #define MAX_CORES_PER_CMP 1 49*0Sstevel@tonic-gate 50*0Sstevel@tonic-gate /* flags for drmach_configure() and drmach_unconfigure() */ 51*0Sstevel@tonic-gate #define DRMACH_DEVI_FORCE 1 52*0Sstevel@tonic-gate #define DRMACH_DEVI_REMOVE 2 53*0Sstevel@tonic-gate 54*0Sstevel@tonic-gate /* returned with drmach_board_find_devices callback */ 55*0Sstevel@tonic-gate #define DRMACH_DEVTYPE_CPU "cpu" 56*0Sstevel@tonic-gate #define DRMACH_DEVTYPE_MEM "memory" 57*0Sstevel@tonic-gate #define DRMACH_DEVTYPE_PCI "pci" 58*0Sstevel@tonic-gate #define DRMACH_DEVTYPE_SBUS "sbus" 59*0Sstevel@tonic-gate 60*0Sstevel@tonic-gate /* number of bytes in smallest coherency unit of this machine */ 61*0Sstevel@tonic-gate #define DRMACH_COHERENCY_UNIT 64 62*0Sstevel@tonic-gate 63*0Sstevel@tonic-gate typedef void *drmachid_t; 64*0Sstevel@tonic-gate 65*0Sstevel@tonic-gate typedef struct { 66*0Sstevel@tonic-gate boolean_t assigned; 67*0Sstevel@tonic-gate boolean_t powered; 68*0Sstevel@tonic-gate boolean_t configured; 69*0Sstevel@tonic-gate boolean_t busy; 70*0Sstevel@tonic-gate boolean_t empty; 71*0Sstevel@tonic-gate sbd_cond_t cond; 72*0Sstevel@tonic-gate char type[MAXNAMELEN]; 73*0Sstevel@tonic-gate char info[MAXPATHLEN]; /* TODO: what size? */ 74*0Sstevel@tonic-gate } drmach_status_t; 75*0Sstevel@tonic-gate 76*0Sstevel@tonic-gate typedef struct { 77*0Sstevel@tonic-gate int size; 78*0Sstevel@tonic-gate char *copts; 79*0Sstevel@tonic-gate } drmach_opts_t; 80*0Sstevel@tonic-gate 81*0Sstevel@tonic-gate extern sbd_error_t *drmach_copy_rename_init( 82*0Sstevel@tonic-gate drmachid_t dst_id, uint64_t dst_slice_offset, 83*0Sstevel@tonic-gate drmachid_t src_id, struct memlist *src_copy_ml, 84*0Sstevel@tonic-gate drmachid_t *pgm_id); 85*0Sstevel@tonic-gate extern sbd_error_t *drmach_copy_rename_fini(drmachid_t id); 86*0Sstevel@tonic-gate extern void drmach_copy_rename(drmachid_t id); 87*0Sstevel@tonic-gate 88*0Sstevel@tonic-gate extern sbd_error_t *drmach_pre_op(int cmd, drmachid_t id, 89*0Sstevel@tonic-gate drmach_opts_t *opts); 90*0Sstevel@tonic-gate extern sbd_error_t *drmach_post_op(int cmd, drmachid_t id, 91*0Sstevel@tonic-gate drmach_opts_t *opts); 92*0Sstevel@tonic-gate 93*0Sstevel@tonic-gate extern sbd_error_t *drmach_board_assign(int bnum, drmachid_t *id); 94*0Sstevel@tonic-gate extern sbd_error_t *drmach_board_connect(drmachid_t id, 95*0Sstevel@tonic-gate drmach_opts_t *opts); 96*0Sstevel@tonic-gate extern sbd_error_t *drmach_board_deprobe(drmachid_t id); 97*0Sstevel@tonic-gate extern sbd_error_t *drmach_board_disconnect(drmachid_t id, 98*0Sstevel@tonic-gate drmach_opts_t *opts); 99*0Sstevel@tonic-gate extern sbd_error_t *drmach_board_find_devices(drmachid_t id, void *a, 100*0Sstevel@tonic-gate sbd_error_t *(*found)(void *a, const char *, int, drmachid_t)); 101*0Sstevel@tonic-gate extern int drmach_board_lookup(int bnum, drmachid_t *id); 102*0Sstevel@tonic-gate extern sbd_error_t *drmach_passthru(drmachid_t id, 103*0Sstevel@tonic-gate drmach_opts_t *opts); 104*0Sstevel@tonic-gate 105*0Sstevel@tonic-gate extern sbd_error_t *drmach_board_name(int bnum, char *buf, int buflen); 106*0Sstevel@tonic-gate 107*0Sstevel@tonic-gate extern sbd_error_t *drmach_board_poweroff(drmachid_t id); 108*0Sstevel@tonic-gate extern sbd_error_t *drmach_board_poweron(drmachid_t id); 109*0Sstevel@tonic-gate extern sbd_error_t *drmach_board_test(drmachid_t id, drmach_opts_t *opts, 110*0Sstevel@tonic-gate int force); 111*0Sstevel@tonic-gate 112*0Sstevel@tonic-gate extern sbd_error_t *drmach_board_unassign(drmachid_t id); 113*0Sstevel@tonic-gate 114*0Sstevel@tonic-gate extern sbd_error_t *drmach_configure(drmachid_t id, int flags); 115*0Sstevel@tonic-gate 116*0Sstevel@tonic-gate extern sbd_error_t *drmach_cpu_disconnect(drmachid_t id); 117*0Sstevel@tonic-gate extern sbd_error_t *drmach_cpu_get_id(drmachid_t id, processorid_t *cpuid); 118*0Sstevel@tonic-gate extern sbd_error_t *drmach_cpu_get_impl(drmachid_t id, int *ip); 119*0Sstevel@tonic-gate extern void drmach_cpu_flush_ecache_sync(void); 120*0Sstevel@tonic-gate 121*0Sstevel@tonic-gate extern sbd_error_t *drmach_get_dip(drmachid_t id, dev_info_t **dip); 122*0Sstevel@tonic-gate 123*0Sstevel@tonic-gate extern sbd_error_t *drmach_io_is_attached(drmachid_t id, int *yes); 124*0Sstevel@tonic-gate extern sbd_error_t *drmach_io_post_attach(drmachid_t id); 125*0Sstevel@tonic-gate extern sbd_error_t *drmach_io_post_release(drmachid_t id); 126*0Sstevel@tonic-gate extern sbd_error_t *drmach_io_pre_release(drmachid_t id); 127*0Sstevel@tonic-gate extern sbd_error_t *drmach_io_unrelease(drmachid_t id); 128*0Sstevel@tonic-gate 129*0Sstevel@tonic-gate extern sbd_error_t *drmach_mem_add_span(drmachid_t id, 130*0Sstevel@tonic-gate uint64_t basepa, uint64_t size); 131*0Sstevel@tonic-gate extern sbd_error_t *drmach_mem_del_span(drmachid_t id, 132*0Sstevel@tonic-gate uint64_t basepa, uint64_t size); 133*0Sstevel@tonic-gate extern sbd_error_t *drmach_mem_disable(drmachid_t id); 134*0Sstevel@tonic-gate extern sbd_error_t *drmach_mem_enable(drmachid_t id); 135*0Sstevel@tonic-gate extern sbd_error_t *drmach_mem_get_alignment(drmachid_t id, uint64_t *pa); 136*0Sstevel@tonic-gate extern sbd_error_t *drmach_mem_get_base_physaddr(drmachid_t id, 137*0Sstevel@tonic-gate uint64_t *pa); 138*0Sstevel@tonic-gate extern sbd_error_t *drmach_mem_get_memlist(drmachid_t id, 139*0Sstevel@tonic-gate struct memlist **ml); 140*0Sstevel@tonic-gate extern sbd_error_t *drmach_mem_get_size(drmachid_t id, uint64_t *bytes); 141*0Sstevel@tonic-gate extern sbd_error_t *drmach_mem_get_slice_size(drmachid_t id, 142*0Sstevel@tonic-gate uint64_t *bytes); 143*0Sstevel@tonic-gate extern processorid_t drmach_mem_cpu_affinity(drmachid_t id); 144*0Sstevel@tonic-gate extern int drmach_allow_memrange_modify(drmachid_t id); 145*0Sstevel@tonic-gate 146*0Sstevel@tonic-gate extern sbd_error_t *drmach_release(drmachid_t id); 147*0Sstevel@tonic-gate extern sbd_error_t *drmach_status(drmachid_t id, drmach_status_t *stat); 148*0Sstevel@tonic-gate extern sbd_error_t *drmach_unconfigure(drmachid_t id, int flags); 149*0Sstevel@tonic-gate extern int drmach_log_sysevent(int board, char *hint, int flag, 150*0Sstevel@tonic-gate int verbose); 151*0Sstevel@tonic-gate 152*0Sstevel@tonic-gate extern int drmach_verify_sr(dev_info_t *dip, int sflag); 153*0Sstevel@tonic-gate extern void drmach_suspend_last(); 154*0Sstevel@tonic-gate extern void drmach_resume_first(); 155*0Sstevel@tonic-gate 156*0Sstevel@tonic-gate #ifdef __cplusplus 157*0Sstevel@tonic-gate } 158*0Sstevel@tonic-gate #endif 159*0Sstevel@tonic-gate 160*0Sstevel@tonic-gate #endif /* _SYS_DRMACH_H_ */ 161