1*0Sstevel@tonic-gate/* 2*0Sstevel@tonic-gate * CDDL HEADER START 3*0Sstevel@tonic-gate * 4*0Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*0Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 6*0Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 7*0Sstevel@tonic-gate * with the License. 8*0Sstevel@tonic-gate * 9*0Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*0Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 11*0Sstevel@tonic-gate * See the License for the specific language governing permissions 12*0Sstevel@tonic-gate * and limitations under the License. 13*0Sstevel@tonic-gate * 14*0Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 15*0Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*0Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 17*0Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 18*0Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 19*0Sstevel@tonic-gate * 20*0Sstevel@tonic-gate * CDDL HEADER END 21*0Sstevel@tonic-gate */ 22*0Sstevel@tonic-gate/* 23*0Sstevel@tonic-gate * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24*0Sstevel@tonic-gate * Use is subject to license terms. 25*0Sstevel@tonic-gate */ 26*0Sstevel@tonic-gate 27*0Sstevel@tonic-gate#pragma ident "%Z%%M% %I% %E% SMI" 28*0Sstevel@tonic-gate 29*0Sstevel@tonic-gate/* 30*0Sstevel@tonic-gate * This file is through cpp before being used as 31*0Sstevel@tonic-gate * an inline. It contains support routines used 32*0Sstevel@tonic-gate * only by DR for the copy-rename sequence. 33*0Sstevel@tonic-gate */ 34*0Sstevel@tonic-gate 35*0Sstevel@tonic-gate#if defined(lint) 36*0Sstevel@tonic-gate#include <sys/types.h> 37*0Sstevel@tonic-gate#else 38*0Sstevel@tonic-gate#include "assym.h" 39*0Sstevel@tonic-gate#endif /* lint */ 40*0Sstevel@tonic-gate 41*0Sstevel@tonic-gate#include <sys/asm_linkage.h> 42*0Sstevel@tonic-gate#include <sys/param.h> 43*0Sstevel@tonic-gate#include <sys/privregs.h> 44*0Sstevel@tonic-gate#include <sys/machasi.h> 45*0Sstevel@tonic-gate#include <sys/spitregs.h> 46*0Sstevel@tonic-gate#include <sys/mmu.h> 47*0Sstevel@tonic-gate#include <sys/machthread.h> 48*0Sstevel@tonic-gate#include <sys/pte.h> 49*0Sstevel@tonic-gate#include <sys/stack.h> 50*0Sstevel@tonic-gate#include <sys/vis.h> 51*0Sstevel@tonic-gate 52*0Sstevel@tonic-gate#ifndef lint 53*0Sstevel@tonic-gate 54*0Sstevel@tonic-gate/* 55*0Sstevel@tonic-gate * arg1 = icache_size 56*0Sstevel@tonic-gate * arg2 = icache_linesize 57*0Sstevel@tonic-gate */ 58*0Sstevel@tonic-gate#define ICACHE_FLUSHALL(lbl, arg1, arg2, tmp1) \ 59*0Sstevel@tonic-gate ldxa [%g0]ASI_LSU, tmp1 ;\ 60*0Sstevel@tonic-gate btst LSU_IC, tmp1 ;\ 61*0Sstevel@tonic-gate bz,pn %icc, lbl/**/1 ;\ 62*0Sstevel@tonic-gate sub arg1, arg2, tmp1 ;\ 63*0Sstevel@tonic-gatelbl/**/0: ;\ 64*0Sstevel@tonic-gate stxa %g0, [tmp1]ASI_IC_TAG ;\ 65*0Sstevel@tonic-gate membar #Sync ;\ 66*0Sstevel@tonic-gate cmp %g0, tmp1 ;\ 67*0Sstevel@tonic-gate bne,pt %icc, lbl/**/0 ;\ 68*0Sstevel@tonic-gate sub tmp1, arg2, tmp1 ;\ 69*0Sstevel@tonic-gatelbl/**/1: 70*0Sstevel@tonic-gate 71*0Sstevel@tonic-gate/* 72*0Sstevel@tonic-gate * arg1 = dcache_size 73*0Sstevel@tonic-gate * arg2 = dcache_linesize 74*0Sstevel@tonic-gate */ 75*0Sstevel@tonic-gate#define DCACHE_FLUSHALL(lbl, arg1, arg2, tmp1) \ 76*0Sstevel@tonic-gate ldxa [%g0]ASI_LSU, tmp1 ;\ 77*0Sstevel@tonic-gate btst LSU_DC, tmp1 ;\ 78*0Sstevel@tonic-gate bz,pn %icc, lbl/**/1 ;\ 79*0Sstevel@tonic-gate sub arg1, arg2, tmp1 ;\ 80*0Sstevel@tonic-gatelbl/**/0: ;\ 81*0Sstevel@tonic-gate stxa %g0, [tmp1]ASI_DC_TAG ;\ 82*0Sstevel@tonic-gate membar #Sync ;\ 83*0Sstevel@tonic-gate cmp %g0, tmp1 ;\ 84*0Sstevel@tonic-gate bne,pt %icc, lbl/**/0 ;\ 85*0Sstevel@tonic-gate sub tmp1, arg2, tmp1 ;\ 86*0Sstevel@tonic-gatelbl/**/1: 87*0Sstevel@tonic-gate 88*0Sstevel@tonic-gate/* 89*0Sstevel@tonic-gate * arg1 = ecache flush physaddr 90*0Sstevel@tonic-gate * arg2 = size 91*0Sstevel@tonic-gate * arg3 = ecache_linesize 92*0Sstevel@tonic-gate */ 93*0Sstevel@tonic-gate#define ECACHE_FLUSHALL(lbl, arg1, arg2, arg3, tmp1, tmp2) \ 94*0Sstevel@tonic-gate rdpr %pstate, tmp1 ;\ 95*0Sstevel@tonic-gate andn tmp1, PSTATE_IE | PSTATE_AM, tmp2 ;\ 96*0Sstevel@tonic-gate wrpr %g0, tmp2, %pstate ;\ 97*0Sstevel@tonic-gate b lbl/**/1 ;\ 98*0Sstevel@tonic-gatelbl/**/0: ;\ 99*0Sstevel@tonic-gate sub arg2, arg3, arg2 ;\ 100*0Sstevel@tonic-gatelbl/**/1: ;\ 101*0Sstevel@tonic-gate brgez,a arg2, lbl/**/0 ;\ 102*0Sstevel@tonic-gate ldxa [arg1 + arg2]ASI_MEM, %g0 ;\ 103*0Sstevel@tonic-gate wrpr %g0, tmp1, %pstate 104*0Sstevel@tonic-gate 105*0Sstevel@tonic-gate#ifdef SF_ERRATA_32 106*0Sstevel@tonic-gate#define SF_WORKAROUND(tmp1, tmp2) \ 107*0Sstevel@tonic-gate sethi %hi(FLUSH_ADDR), tmp2 ;\ 108*0Sstevel@tonic-gate set MMU_PCONTEXT, tmp1 ;\ 109*0Sstevel@tonic-gate stxa %g0, [tmp1]ASI_DMMU ;\ 110*0Sstevel@tonic-gate flush tmp2 ; 111*0Sstevel@tonic-gate#else 112*0Sstevel@tonic-gate#define SF_WORKAROUND(tmp1, tmp2) 113*0Sstevel@tonic-gate#endif /* SF_ERRATA_32 */ 114*0Sstevel@tonic-gate 115*0Sstevel@tonic-gate/* 116*0Sstevel@tonic-gate * arg1 = vaddr 117*0Sstevel@tonic-gate * arg2 = ctxnum 118*0Sstevel@tonic-gate * - disable interrupts and clear address mask 119*0Sstevel@tonic-gate * to access 64 bit physaddr 120*0Sstevel@tonic-gate * - Blow out the TLB. 121*0Sstevel@tonic-gate * . If it's kernel context, then use primary context. 122*0Sstevel@tonic-gate * . Otherwise, use secondary. 123*0Sstevel@tonic-gate */ 124*0Sstevel@tonic-gate#define VTAG_FLUSHPAGE(lbl, arg1, arg2, tmp1, tmp2, tmp3, tmp4) \ 125*0Sstevel@tonic-gate rdpr %pstate, tmp1 ;\ 126*0Sstevel@tonic-gate andn tmp1, PSTATE_IE | PSTATE_AM, tmp2 ;\ 127*0Sstevel@tonic-gate wrpr tmp2, 0, %pstate ;\ 128*0Sstevel@tonic-gate brnz,pt arg2, lbl/**/1 ;\ 129*0Sstevel@tonic-gate sethi %hi(FLUSH_ADDR), tmp2 ;\ 130*0Sstevel@tonic-gate stxa %g0, [arg1]ASI_DTLB_DEMAP ;\ 131*0Sstevel@tonic-gate stxa %g0, [arg1]ASI_ITLB_DEMAP ;\ 132*0Sstevel@tonic-gate b lbl/**/5 ;\ 133*0Sstevel@tonic-gate flush tmp2 ;\ 134*0Sstevel@tonic-gatelbl/**/1: ;\ 135*0Sstevel@tonic-gate set MMU_SCONTEXT, tmp3 ;\ 136*0Sstevel@tonic-gate ldxa [tmp3]ASI_DMMU, tmp4 ;\ 137*0Sstevel@tonic-gate or DEMAP_SECOND | DEMAP_PAGE_TYPE, arg1, arg1 ;\ 138*0Sstevel@tonic-gate cmp tmp4, arg2 ;\ 139*0Sstevel@tonic-gate be,a,pt %icc, lbl/**/4 ;\ 140*0Sstevel@tonic-gate nop ;\ 141*0Sstevel@tonic-gate stxa arg2, [tmp3]ASI_DMMU ;\ 142*0Sstevel@tonic-gatelbl/**/4: ;\ 143*0Sstevel@tonic-gate stxa %g0, [arg1]ASI_DTLB_DEMAP ;\ 144*0Sstevel@tonic-gate stxa %g0, [arg1]ASI_ITLB_DEMAP ;\ 145*0Sstevel@tonic-gate flush tmp2 ;\ 146*0Sstevel@tonic-gate be,a,pt %icc, lbl/**/5 ;\ 147*0Sstevel@tonic-gate nop ;\ 148*0Sstevel@tonic-gate stxa tmp4, [tmp3]ASI_DMMU ;\ 149*0Sstevel@tonic-gate flush tmp2 ;\ 150*0Sstevel@tonic-gatelbl/**/5: ;\ 151*0Sstevel@tonic-gate wrpr %g0, tmp1, %pstate 152*0Sstevel@tonic-gate 153*0Sstevel@tonic-gate/* 154*0Sstevel@tonic-gate * arg1 = dtlb entry 155*0Sstevel@tonic-gate * - Before first compare: 156*0Sstevel@tonic-gate * tmp4 = tte 157*0Sstevel@tonic-gate * tmp5 = vaddr 158*0Sstevel@tonic-gate * tmp6 = cntxnum 159*0Sstevel@tonic-gate */ 160*0Sstevel@tonic-gate#define DTLB_FLUSH_UNLOCKED(lbl, arg1, tmp1, tmp2, tmp3, \ 161*0Sstevel@tonic-gate tmp4, tmp5, tmp6) \ 162*0Sstevel@tonic-gatelbl/**/0: ;\ 163*0Sstevel@tonic-gate sllx arg1, 3, tmp3 ;\ 164*0Sstevel@tonic-gate SF_WORKAROUND(tmp1, tmp2) ;\ 165*0Sstevel@tonic-gate ldxa [tmp3]ASI_DTLB_ACCESS, tmp4 ;\ 166*0Sstevel@tonic-gate srlx tmp4, 6, tmp4 ;\ 167*0Sstevel@tonic-gate andcc tmp4, 1, %g0 ;\ 168*0Sstevel@tonic-gate bnz,pn %xcc, lbl/**/1 ;\ 169*0Sstevel@tonic-gate srlx tmp4, 57, tmp4 ;\ 170*0Sstevel@tonic-gate andcc tmp4, 1, %g0 ;\ 171*0Sstevel@tonic-gate beq,pn %xcc, lbl/**/1 ;\ 172*0Sstevel@tonic-gate nop ;\ 173*0Sstevel@tonic-gate set TAGREAD_CTX_MASK, tmp1 ;\ 174*0Sstevel@tonic-gate ldxa [tmp3]ASI_DTLB_TAGREAD, tmp2 ;\ 175*0Sstevel@tonic-gate and tmp2, tmp1, tmp6 ;\ 176*0Sstevel@tonic-gate andn tmp2, tmp1, tmp5 ;\ 177*0Sstevel@tonic-gate VTAG_FLUSHPAGE(VD, tmp5, tmp6, tmp1, tmp2, tmp3, tmp4) ;\ 178*0Sstevel@tonic-gatelbl/**/1: ;\ 179*0Sstevel@tonic-gate brgz,pt arg1, lbl/**/0 ;\ 180*0Sstevel@tonic-gate sub arg1, 1, arg1 181*0Sstevel@tonic-gate 182*0Sstevel@tonic-gate/* 183*0Sstevel@tonic-gate * arg1 = itlb entry 184*0Sstevel@tonic-gate * - Before first compare: 185*0Sstevel@tonic-gate * tmp4 = tte 186*0Sstevel@tonic-gate * tmp5 = vaddr 187*0Sstevel@tonic-gate * tmp6 = cntxnum 188*0Sstevel@tonic-gate */ 189*0Sstevel@tonic-gate#define ITLB_FLUSH_UNLOCKED(lbl, arg1, tmp1, tmp2, tmp3, \ 190*0Sstevel@tonic-gate tmp4, tmp5, tmp6) \ 191*0Sstevel@tonic-gatelbl/**/0: ;\ 192*0Sstevel@tonic-gate sllx arg1, 3, tmp3 ;\ 193*0Sstevel@tonic-gate SF_WORKAROUND(tmp1, tmp2) ;\ 194*0Sstevel@tonic-gate ldxa [tmp3]ASI_ITLB_ACCESS, tmp4 ;\ 195*0Sstevel@tonic-gate srlx tmp4, 6, tmp4 ;\ 196*0Sstevel@tonic-gate andcc tmp4, 1, %g0 ;\ 197*0Sstevel@tonic-gate bnz,pn %xcc, lbl/**/1 ;\ 198*0Sstevel@tonic-gate srlx tmp4, 57, tmp4 ;\ 199*0Sstevel@tonic-gate andcc tmp4, 1, %g0 ;\ 200*0Sstevel@tonic-gate beq,pn %xcc, lbl/**/1 ;\ 201*0Sstevel@tonic-gate nop ;\ 202*0Sstevel@tonic-gate set TAGREAD_CTX_MASK, tmp1 ;\ 203*0Sstevel@tonic-gate ldxa [tmp3]ASI_ITLB_TAGREAD, tmp2 ;\ 204*0Sstevel@tonic-gate and tmp2, tmp1, tmp6 ;\ 205*0Sstevel@tonic-gate andn tmp2, tmp1, tmp5 ;\ 206*0Sstevel@tonic-gate VTAG_FLUSHPAGE(VI, tmp5, tmp6, tmp1, tmp2, tmp3, tmp4) ;\ 207*0Sstevel@tonic-gatelbl/**/1: ;\ 208*0Sstevel@tonic-gate brgz,pt arg1, lbl/**/0 ;\ 209*0Sstevel@tonic-gate sub arg1, 1, arg1 210*0Sstevel@tonic-gate 211*0Sstevel@tonic-gate#define CLEARTL(lvl) \ 212*0Sstevel@tonic-gate wrpr %g0, lvl, %tl ;\ 213*0Sstevel@tonic-gate wrpr %g0, %g0, %tpc ;\ 214*0Sstevel@tonic-gate wrpr %g0, %g0, %tnpc ;\ 215*0Sstevel@tonic-gate wrpr %g0, %g0, %tt 216*0Sstevel@tonic-gate 217*0Sstevel@tonic-gate#define SWITCH_STACK(estk) \ 218*0Sstevel@tonic-gate flushw ;\ 219*0Sstevel@tonic-gate sub estk, SA(KFPUSIZE+GSR_SIZE), estk ;\ 220*0Sstevel@tonic-gate andn estk, 0x3f, estk ;\ 221*0Sstevel@tonic-gate sub estk, SA(MINFRAME) + STACK_BIAS, %sp ;\ 222*0Sstevel@tonic-gate mov estk, %fp 223*0Sstevel@tonic-gate 224*0Sstevel@tonic-gate#endif /* !lint */ 225*0Sstevel@tonic-gate 226*0Sstevel@tonic-gate#if defined(lint) 227*0Sstevel@tonic-gate 228*0Sstevel@tonic-gate/*ARGSUSED*/ 229*0Sstevel@tonic-gatevoid 230*0Sstevel@tonic-gatedrmach_shutdown_asm(uint64_t mbox_addr) 231*0Sstevel@tonic-gate{} 232*0Sstevel@tonic-gate 233*0Sstevel@tonic-gate#else /* lint */ 234*0Sstevel@tonic-gate 235*0Sstevel@tonic-gate ENTRY_NP(drmach_shutdown_asm) 236*0Sstevel@tonic-gate mov %o0, %o5 237*0Sstevel@tonic-gate 238*0Sstevel@tonic-gate ldxa [%o5]ASI_MEM, %o0 ! get 8-byte estack in o0 239*0Sstevel@tonic-gate add %o5, 8, %o5 240*0Sstevel@tonic-gate ldxa [%o5]ASI_MEM, %o1 ! get 8-byte flushaddr in o1 241*0Sstevel@tonic-gate add %o5, 8, %o5 242*0Sstevel@tonic-gate lda [%o5]ASI_MEM, %o2 ! get 4-byte size in o2 243*0Sstevel@tonic-gate srl %o2, 0, %o2 244*0Sstevel@tonic-gate add %o5, 4, %o5 245*0Sstevel@tonic-gate lda [%o5]ASI_MEM, %o3 ! get 4-byte linesize in o3 246*0Sstevel@tonic-gate srl %o3, 0, %o3 247*0Sstevel@tonic-gate add %o5, 4, %o5 248*0Sstevel@tonic-gate ldxa [%o5]ASI_MEM, %o4 ! get 8-byte physaddr in o4 249*0Sstevel@tonic-gate 250*0Sstevel@tonic-gate 251*0Sstevel@tonic-gate ! %o0 = base (va mapping this code in bbsram) 252*0Sstevel@tonic-gate ! %o1 = flushaddr for ecache 253*0Sstevel@tonic-gate ! %o2 = size to use for ecache flush 254*0Sstevel@tonic-gate ! %o3 = ecache linesize 255*0Sstevel@tonic-gate ! %o4 = phys addr of byte to clear when finished 256*0Sstevel@tonic-gate ! 257*0Sstevel@tonic-gate ! output: Stores a zero at [%o4]ASI_MEM 258*0Sstevel@tonic-gate 259*0Sstevel@tonic-gate membar #LoadStore 260*0Sstevel@tonic-gate 261*0Sstevel@tonic-gate ! 262*0Sstevel@tonic-gate ! Switch stack pointer to bbsram 263*0Sstevel@tonic-gate ! 264*0Sstevel@tonic-gate SWITCH_STACK(%o0) 265*0Sstevel@tonic-gate 266*0Sstevel@tonic-gate ! 267*0Sstevel@tonic-gate ! Get some globals 268*0Sstevel@tonic-gate ! 269*0Sstevel@tonic-gate mov %o3, %g1 ! ecache_linesize 270*0Sstevel@tonic-gate mov %o4, %o0 ! physaddr byte to clear 271*0Sstevel@tonic-gate 272*0Sstevel@tonic-gate sethi %hi(dcache_linesize), %g2 273*0Sstevel@tonic-gate ld [%g2 + %lo(dcache_linesize)], %g2 274*0Sstevel@tonic-gate 275*0Sstevel@tonic-gate sethi %hi(dcache_size), %g3 276*0Sstevel@tonic-gate ld [%g3 + %lo(dcache_size)], %g3 277*0Sstevel@tonic-gate 278*0Sstevel@tonic-gate sethi %hi(icache_linesize), %g4 279*0Sstevel@tonic-gate ld [%g4 + %lo(icache_linesize)], %g4 280*0Sstevel@tonic-gate 281*0Sstevel@tonic-gate sethi %hi(icache_size), %g5 282*0Sstevel@tonic-gate ld [%g5 + %lo(icache_size)], %g5 283*0Sstevel@tonic-gate 284*0Sstevel@tonic-gate sethi %hi(dtlb_entries), %o5 285*0Sstevel@tonic-gate ld [%o5 + %lo(dtlb_entries)], %o5 286*0Sstevel@tonic-gate sllx %o5, 32, %o5 287*0Sstevel@tonic-gate srlx %o5, 32, %o5 288*0Sstevel@tonic-gate 289*0Sstevel@tonic-gate sethi %hi(itlb_entries), %o3 290*0Sstevel@tonic-gate ld [%o3 + %lo(itlb_entries)], %o3 291*0Sstevel@tonic-gate ! 292*0Sstevel@tonic-gate ! cram Xtlb_entries into a single register (%o5) 293*0Sstevel@tonic-gate ! %o5 upper 32 = itlb_entries 294*0Sstevel@tonic-gate ! lower 32 = dtlb_entries 295*0Sstevel@tonic-gate ! 296*0Sstevel@tonic-gate sllx %o3, 32, %o3 297*0Sstevel@tonic-gate or %o5, %o3, %o5 298*0Sstevel@tonic-gate 299*0Sstevel@tonic-gate ! 300*0Sstevel@tonic-gate ! Flush E$ 301*0Sstevel@tonic-gate ! 302*0Sstevel@tonic-gate ECACHE_FLUSHALL(EC, %o1, %o2, %g1, %o3, %o4) 303*0Sstevel@tonic-gate ! 304*0Sstevel@tonic-gate ! %o1 & %o2 now available 305*0Sstevel@tonic-gate ! 306*0Sstevel@tonic-gate 307*0Sstevel@tonic-gate membar #Sync 308*0Sstevel@tonic-gate 309*0Sstevel@tonic-gate ! 310*0Sstevel@tonic-gate ! Flush D$ 311*0Sstevel@tonic-gate ! 312*0Sstevel@tonic-gate DCACHE_FLUSHALL(DC, %g3, %g2, %o3) 313*0Sstevel@tonic-gate 314*0Sstevel@tonic-gate ! 315*0Sstevel@tonic-gate ! Flush I$ 316*0Sstevel@tonic-gate ! 317*0Sstevel@tonic-gate ICACHE_FLUSHALL(IC, %g5, %g4, %o3) 318*0Sstevel@tonic-gate 319*0Sstevel@tonic-gate membar #Sync 320*0Sstevel@tonic-gate 321*0Sstevel@tonic-gate ! 322*0Sstevel@tonic-gate ! Flush dtlb's 323*0Sstevel@tonic-gate ! 324*0Sstevel@tonic-gate srlx %o5, 32, %g5 ! %g5 = itlb_entries 325*0Sstevel@tonic-gate sllx %o5, 32, %o5 326*0Sstevel@tonic-gate srlx %o5, 32, %g1 327*0Sstevel@tonic-gate sub %g1, 1, %g1 ! %g1 = dtlb_entries - 1 328*0Sstevel@tonic-gate 329*0Sstevel@tonic-gate DTLB_FLUSH_UNLOCKED(D, %g1, %g3, %g4, %o2, %o3, %o4, %o5) 330*0Sstevel@tonic-gate 331*0Sstevel@tonic-gate ! 332*0Sstevel@tonic-gate ! Flush itlb's 333*0Sstevel@tonic-gate ! 334*0Sstevel@tonic-gate sub %g5, 1, %g1 ! %g1 = itlb_entries - 1 335*0Sstevel@tonic-gate 336*0Sstevel@tonic-gate ITLB_FLUSH_UNLOCKED(I, %g1, %g3, %g4, %o2, %o3, %o4, %o5) 337*0Sstevel@tonic-gate 338*0Sstevel@tonic-gate membar #Sync 339*0Sstevel@tonic-gate 340*0Sstevel@tonic-gate ! 341*0Sstevel@tonic-gate ! Clear byte to signal finished. 342*0Sstevel@tonic-gate ! 343*0Sstevel@tonic-gate stba %g0, [%o0]ASI_MEM 344*0Sstevel@tonic-gate membar #Sync 345*0Sstevel@tonic-gate 346*0Sstevel@tonic-gate ! 347*0Sstevel@tonic-gate ! read ensures that last write completed (has left queue in the PC chip) 348*0Sstevel@tonic-gate ! 349*0Sstevel@tonic-gate lduba [%o0]ASI_MEM, %g0 350*0Sstevel@tonic-gate5: 351*0Sstevel@tonic-gate ba 5b 352*0Sstevel@tonic-gate nop 353*0Sstevel@tonic-gate SET_SIZE(drmach_shutdown_asm) 354*0Sstevel@tonic-gate 355*0Sstevel@tonic-gate .global drmach_shutdown_asm_end 356*0Sstevel@tonic-gate 357*0Sstevel@tonic-gate .skip 2048 358*0Sstevel@tonic-gate 359*0Sstevel@tonic-gatedrmach_shutdown_asm_end: 360*0Sstevel@tonic-gate 361*0Sstevel@tonic-gate#endif /* lint */ 362