xref: /onnv-gate/usr/src/uts/sun4u/starfire/io/portctrl.c (revision 0:68f95e015346)
1*0Sstevel@tonic-gate /*
2*0Sstevel@tonic-gate  * CDDL HEADER START
3*0Sstevel@tonic-gate  *
4*0Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
5*0Sstevel@tonic-gate  * Common Development and Distribution License, Version 1.0 only
6*0Sstevel@tonic-gate  * (the "License").  You may not use this file except in compliance
7*0Sstevel@tonic-gate  * with the License.
8*0Sstevel@tonic-gate  *
9*0Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10*0Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
11*0Sstevel@tonic-gate  * See the License for the specific language governing permissions
12*0Sstevel@tonic-gate  * and limitations under the License.
13*0Sstevel@tonic-gate  *
14*0Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
15*0Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16*0Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
17*0Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
18*0Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
19*0Sstevel@tonic-gate  *
20*0Sstevel@tonic-gate  * CDDL HEADER END
21*0Sstevel@tonic-gate  */
22*0Sstevel@tonic-gate /*
23*0Sstevel@tonic-gate  * Copyright 1990-2002 Sun Microsystems, Inc.  All rights reserved.
24*0Sstevel@tonic-gate  * Use is subject to license terms.
25*0Sstevel@tonic-gate  */
26*0Sstevel@tonic-gate 
27*0Sstevel@tonic-gate #pragma ident	"%Z%%M%	%I%	%E% SMI"
28*0Sstevel@tonic-gate 
29*0Sstevel@tonic-gate #include <sys/types.h>
30*0Sstevel@tonic-gate #include <sys/cmn_err.h>
31*0Sstevel@tonic-gate #include <sys/kmem.h>
32*0Sstevel@tonic-gate #include <sys/debug.h>
33*0Sstevel@tonic-gate #include <sys/machsystm.h>
34*0Sstevel@tonic-gate #include <sys/starfire.h>
35*0Sstevel@tonic-gate 
36*0Sstevel@tonic-gate /*
37*0Sstevel@tonic-gate  * Interrupt target translation data for
38*0Sstevel@tonic-gate  * Starfire's Port controller asics
39*0Sstevel@tonic-gate  */
40*0Sstevel@tonic-gate struct pc_ittrans_data {
41*0Sstevel@tonic-gate 	kmutex_t ittrans_lock;			 /* lock for ITTR array */
42*0Sstevel@tonic-gate 	volatile uint64_t *ittrans_mondovec[32]; /* mondovecreg addr array */
43*0Sstevel@tonic-gate 	uint64_t ittransreg_physaddr[32];	 /* ITTREG physaddr array */
44*0Sstevel@tonic-gate };
45*0Sstevel@tonic-gate 
46*0Sstevel@tonic-gate /*
47*0Sstevel@tonic-gate  * Setup and initialize the soft table that
48*0Sstevel@tonic-gate  * represent the Starfire interrupt target translation
49*0Sstevel@tonic-gate  * registers in the Port controller asics. There is one
50*0Sstevel@tonic-gate  * for each sysio/pci instance.
51*0Sstevel@tonic-gate  */
52*0Sstevel@tonic-gate void
pc_ittrans_init(int upa_id,caddr_t * ittptr_cookie)53*0Sstevel@tonic-gate pc_ittrans_init(int upa_id, caddr_t *ittptr_cookie)
54*0Sstevel@tonic-gate {
55*0Sstevel@tonic-gate 	int i;
56*0Sstevel@tonic-gate 	uint64_t physaddr;
57*0Sstevel@tonic-gate 	struct pc_ittrans_data *tmpptr;
58*0Sstevel@tonic-gate 
59*0Sstevel@tonic-gate 	ASSERT(ittptr_cookie != NULL);
60*0Sstevel@tonic-gate 
61*0Sstevel@tonic-gate 	/*
62*0Sstevel@tonic-gate 	 * Allocate the data structure to support starfire's
63*0Sstevel@tonic-gate 	 * interrupt target translations
64*0Sstevel@tonic-gate 	 */
65*0Sstevel@tonic-gate 	tmpptr = (struct pc_ittrans_data *)
66*0Sstevel@tonic-gate 			kmem_zalloc(sizeof (struct pc_ittrans_data),
67*0Sstevel@tonic-gate 				KM_SLEEP);
68*0Sstevel@tonic-gate 
69*0Sstevel@tonic-gate 	/* Initialize the ittrans lock */
70*0Sstevel@tonic-gate 	mutex_init(&tmpptr->ittrans_lock, NULL, MUTEX_DEFAULT, NULL);
71*0Sstevel@tonic-gate 
72*0Sstevel@tonic-gate 	/*
73*0Sstevel@tonic-gate 	 * Construct the base physical address of the
74*0Sstevel@tonic-gate 	 * ITTR registers associated with this PC asics
75*0Sstevel@tonic-gate 	 */
76*0Sstevel@tonic-gate 	physaddr = STARFIRE_UPAID2UPS(upa_id);
77*0Sstevel@tonic-gate 	physaddr |= (STARFIRE_PSI_BASE | STARFIRE_PSI_PCREG_OFF |
78*0Sstevel@tonic-gate 			STARFIRE_PC_INT_MAP);
79*0Sstevel@tonic-gate 
80*0Sstevel@tonic-gate 	/*
81*0Sstevel@tonic-gate 	 * Initialize the ITTR table
82*0Sstevel@tonic-gate 	 * This soft table is used to represent the interrupt
83*0Sstevel@tonic-gate 	 * target translation hardware registers in the Starfire's
84*0Sstevel@tonic-gate 	 * PC asics. There are 32 slots and each slot consists of
85*0Sstevel@tonic-gate 	 * a mondovec regaddr entry and the physical address of
86*0Sstevel@tonic-gate 	 * the that ITT register. A empty slot is one whose
87*0Sstevel@tonic-gate 	 * mondovec entry is null. To reserve/use a slot for a
88*0Sstevel@tonic-gate 	 * particular intr mapping reg, we simply find
89*0Sstevel@tonic-gate 	 * a empty slot and write in the mondovec mapping
90*0Sstevel@tonic-gate 	 * regaddr into the mondovec field.
91*0Sstevel@tonic-gate 	 */
92*0Sstevel@tonic-gate 	for (i = 0; i < 32; i++) {
93*0Sstevel@tonic-gate 		tmpptr->ittrans_mondovec[i] = NULL;
94*0Sstevel@tonic-gate 		tmpptr->ittransreg_physaddr[i] = physaddr + i*16;
95*0Sstevel@tonic-gate 	}
96*0Sstevel@tonic-gate 
97*0Sstevel@tonic-gate 	*ittptr_cookie = (caddr_t)tmpptr;
98*0Sstevel@tonic-gate }
99*0Sstevel@tonic-gate 
100*0Sstevel@tonic-gate void
pc_ittrans_uninit(caddr_t ittr_cookie)101*0Sstevel@tonic-gate pc_ittrans_uninit(caddr_t ittr_cookie)
102*0Sstevel@tonic-gate {
103*0Sstevel@tonic-gate 	struct pc_ittrans_data *tmpptr;
104*0Sstevel@tonic-gate 
105*0Sstevel@tonic-gate 	ASSERT(ittr_cookie != NULL);
106*0Sstevel@tonic-gate 
107*0Sstevel@tonic-gate 	tmpptr = (struct pc_ittrans_data *)ittr_cookie;
108*0Sstevel@tonic-gate 
109*0Sstevel@tonic-gate 	mutex_destroy(&tmpptr->ittrans_lock);
110*0Sstevel@tonic-gate 	kmem_free((int *)ittr_cookie, sizeof (struct pc_ittrans_data));
111*0Sstevel@tonic-gate }
112*0Sstevel@tonic-gate 
113*0Sstevel@tonic-gate /*
114*0Sstevel@tonic-gate  * This routine searches for a slot in the soft ITTR table
115*0Sstevel@tonic-gate  * that was reserved earlier by matching the mondovec
116*0Sstevel@tonic-gate  * mapping regaddr argument with the corresponding field in
117*0Sstevel@tonic-gate  * the table. Note that the soft ITTR table mirrors the
118*0Sstevel@tonic-gate  * corresponding hw table in the starfire port controller(PC)
119*0Sstevel@tonic-gate  * asics. A new slot will be obtained if the slot cannot
120*0Sstevel@tonic-gate  * be found. (not reserved previously). The routine then programs
121*0Sstevel@tonic-gate  * in the target cpu id into the PC ITTR hardware, updates the
122*0Sstevel@tonic-gate  * soft table  and return the index to this slot as the target
123*0Sstevel@tonic-gate  * id cookie.
124*0Sstevel@tonic-gate  */
125*0Sstevel@tonic-gate int
pc_translate_tgtid(caddr_t ittr_cookie,int cpu_id,volatile uint64_t * mondovec_addr)126*0Sstevel@tonic-gate pc_translate_tgtid(caddr_t ittr_cookie, int cpu_id,
127*0Sstevel@tonic-gate 		volatile uint64_t *mondovec_addr)
128*0Sstevel@tonic-gate {
129*0Sstevel@tonic-gate 	struct pc_ittrans_data *ittptr;
130*0Sstevel@tonic-gate 	int i;
131*0Sstevel@tonic-gate 	int foundslot = -1;
132*0Sstevel@tonic-gate 
133*0Sstevel@tonic-gate 	ASSERT(ittr_cookie != NULL);
134*0Sstevel@tonic-gate 
135*0Sstevel@tonic-gate 	ittptr = (struct pc_ittrans_data *)ittr_cookie;
136*0Sstevel@tonic-gate 
137*0Sstevel@tonic-gate 	mutex_enter(&ittptr->ittrans_lock);
138*0Sstevel@tonic-gate 
139*0Sstevel@tonic-gate 	/*
140*0Sstevel@tonic-gate 	 * Search the mondovec addrlist to see if we
141*0Sstevel@tonic-gate 	 * already reserved/used a slot for this particular
142*0Sstevel@tonic-gate 	 * mondovec mapping regaddr.
143*0Sstevel@tonic-gate 	 */
144*0Sstevel@tonic-gate 	for (i = 0; i < 32; i++) {
145*0Sstevel@tonic-gate 		if (mondovec_addr == ittptr->ittrans_mondovec[i]) {
146*0Sstevel@tonic-gate 			/*
147*0Sstevel@tonic-gate 			 * found the slot that matches the
148*0Sstevel@tonic-gate 			 * mondo vec in question
149*0Sstevel@tonic-gate 			 */
150*0Sstevel@tonic-gate 			foundslot = i;
151*0Sstevel@tonic-gate 			break;
152*0Sstevel@tonic-gate 		}
153*0Sstevel@tonic-gate 		if (foundslot == -1 && ittptr->ittrans_mondovec[i] == NULL)
154*0Sstevel@tonic-gate 			/* keep track of a empty slot */
155*0Sstevel@tonic-gate 			foundslot = i;
156*0Sstevel@tonic-gate 	}
157*0Sstevel@tonic-gate 
158*0Sstevel@tonic-gate 	if (foundslot != -1) {
159*0Sstevel@tonic-gate 		/* We found a slot for this mondo vec, let's use it */
160*0Sstevel@tonic-gate 		stphysio(ittptr->ittransreg_physaddr[foundslot],
161*0Sstevel@tonic-gate 			STARFIRE_UPAID2HWMID(cpu_id));
162*0Sstevel@tonic-gate 		ittptr->ittrans_mondovec[foundslot] = mondovec_addr;
163*0Sstevel@tonic-gate 	} else {
164*0Sstevel@tonic-gate 		cmn_err(CE_PANIC, "No more ITTR slots!!");
165*0Sstevel@tonic-gate 	}
166*0Sstevel@tonic-gate 
167*0Sstevel@tonic-gate 	mutex_exit(&ittptr->ittrans_lock);
168*0Sstevel@tonic-gate 	return (foundslot);
169*0Sstevel@tonic-gate }
170*0Sstevel@tonic-gate 
171*0Sstevel@tonic-gate /*
172*0Sstevel@tonic-gate  * This routine searches the interrupt target translation table
173*0Sstevel@tonic-gate  * (if exists) for a slot that was reserved/used earlier by
174*0Sstevel@tonic-gate  * matching the mondovec_addr input argument with the mondovec
175*0Sstevel@tonic-gate  * field in the table. The routine then free the found slot by
176*0Sstevel@tonic-gate  * resetting it to zero.
177*0Sstevel@tonic-gate  */
178*0Sstevel@tonic-gate void
pc_ittrans_cleanup(caddr_t ittr_cookie,volatile uint64_t * mondovec_addr)179*0Sstevel@tonic-gate pc_ittrans_cleanup(caddr_t ittr_cookie,
180*0Sstevel@tonic-gate 		volatile uint64_t *mondovec_addr)
181*0Sstevel@tonic-gate {
182*0Sstevel@tonic-gate 
183*0Sstevel@tonic-gate 	struct pc_ittrans_data *ittptr;
184*0Sstevel@tonic-gate 	int i;
185*0Sstevel@tonic-gate 	int foundslot = -1;
186*0Sstevel@tonic-gate 
187*0Sstevel@tonic-gate 	ASSERT(ittr_cookie != NULL);
188*0Sstevel@tonic-gate 
189*0Sstevel@tonic-gate 	ittptr = (struct pc_ittrans_data *)ittr_cookie;
190*0Sstevel@tonic-gate 
191*0Sstevel@tonic-gate 	mutex_enter(&ittptr->ittrans_lock);
192*0Sstevel@tonic-gate 
193*0Sstevel@tonic-gate 	/*
194*0Sstevel@tonic-gate 	 * Search the mondovec addrlist for the reserved/used
195*0Sstevel@tonic-gate 	 * slot associated with this particular mondo vector.
196*0Sstevel@tonic-gate 	 */
197*0Sstevel@tonic-gate 	for (i = 0; i < 32; i++) {
198*0Sstevel@tonic-gate 		if (mondovec_addr == ittptr->ittrans_mondovec[i]) {
199*0Sstevel@tonic-gate 			/*
200*0Sstevel@tonic-gate 			 * found the slot that matches the
201*0Sstevel@tonic-gate 			 * mondo vec in question
202*0Sstevel@tonic-gate 			 */
203*0Sstevel@tonic-gate 			foundslot = i;
204*0Sstevel@tonic-gate 			break;
205*0Sstevel@tonic-gate 		}
206*0Sstevel@tonic-gate 	}
207*0Sstevel@tonic-gate 
208*0Sstevel@tonic-gate 	if (foundslot != -1) {
209*0Sstevel@tonic-gate 		/* We found a slot for this mondo vec, clear it */
210*0Sstevel@tonic-gate 		ittptr->ittrans_mondovec[foundslot] = 0;
211*0Sstevel@tonic-gate 	}
212*0Sstevel@tonic-gate 
213*0Sstevel@tonic-gate 	mutex_exit(&ittptr->ittrans_lock);
214*0Sstevel@tonic-gate }
215*0Sstevel@tonic-gate 
216*0Sstevel@tonic-gate int
pc_madr_add(int lboard,int rboard,int proc,uint_t madr)217*0Sstevel@tonic-gate pc_madr_add(int lboard, int rboard, int proc, uint_t madr)
218*0Sstevel@tonic-gate {
219*0Sstevel@tonic-gate 	register int	i;
220*0Sstevel@tonic-gate 	uint_t		madr_rd, madr_off;
221*0Sstevel@tonic-gate 	uint64_t	pc_madr_addr;
222*0Sstevel@tonic-gate 
223*0Sstevel@tonic-gate 	pc_madr_addr = STARFIRE_PC_MADR_ADDR(lboard, rboard, proc);
224*0Sstevel@tonic-gate 
225*0Sstevel@tonic-gate 	/*
226*0Sstevel@tonic-gate 	 * First write with Presence bit disabled
227*0Sstevel@tonic-gate 	 * and then with it enabled.
228*0Sstevel@tonic-gate 	 */
229*0Sstevel@tonic-gate 	madr_off = madr & ~STARFIRE_MC_MEM_PRESENT_MASK;
230*0Sstevel@tonic-gate 	stphysio(pc_madr_addr, madr_off);
231*0Sstevel@tonic-gate 
232*0Sstevel@tonic-gate 	for (i = 0; i < 20; i++) {
233*0Sstevel@tonic-gate 		madr_rd = ldphysio(pc_madr_addr);
234*0Sstevel@tonic-gate 		if (madr_off == madr_rd)
235*0Sstevel@tonic-gate 			break;
236*0Sstevel@tonic-gate 	}
237*0Sstevel@tonic-gate 	if (madr_off != madr_rd) {
238*0Sstevel@tonic-gate 		cmn_err(CE_WARN,
239*0Sstevel@tonic-gate 			"pc_madr_add: (1) failed to update "
240*0Sstevel@tonic-gate 			"PC MADR (%d, %d, %d, 0x%x)\n",
241*0Sstevel@tonic-gate 			lboard, rboard, proc, madr);
242*0Sstevel@tonic-gate 		return (-1);
243*0Sstevel@tonic-gate 	}
244*0Sstevel@tonic-gate 	if (madr == madr_off) {
245*0Sstevel@tonic-gate 		/*
246*0Sstevel@tonic-gate 		 * Caller wanted to write value out there
247*0Sstevel@tonic-gate 		 * with presence bit turned off, which is
248*0Sstevel@tonic-gate 		 * what we just completed.  So, we're finished.
249*0Sstevel@tonic-gate 		 */
250*0Sstevel@tonic-gate 		return (0);
251*0Sstevel@tonic-gate 	}
252*0Sstevel@tonic-gate 	/*
253*0Sstevel@tonic-gate 	 * Now write with Presence bit enabled.
254*0Sstevel@tonic-gate 	 */
255*0Sstevel@tonic-gate 	stphysio(pc_madr_addr, madr);
256*0Sstevel@tonic-gate 
257*0Sstevel@tonic-gate 	for (i = 0; i < 20; i++) {
258*0Sstevel@tonic-gate 		madr_rd = ldphysio(pc_madr_addr);
259*0Sstevel@tonic-gate 		if (madr == madr_rd)
260*0Sstevel@tonic-gate 			break;
261*0Sstevel@tonic-gate 	}
262*0Sstevel@tonic-gate 	if (madr != madr_rd) {
263*0Sstevel@tonic-gate 		cmn_err(CE_WARN,
264*0Sstevel@tonic-gate 			"pc_madr_add: (2) failed to update "
265*0Sstevel@tonic-gate 			"PC MADR (%d, %d, %d, 0x%x)\n",
266*0Sstevel@tonic-gate 			lboard, rboard, proc, madr);
267*0Sstevel@tonic-gate 		return (-1);
268*0Sstevel@tonic-gate 	}
269*0Sstevel@tonic-gate 
270*0Sstevel@tonic-gate 	return (0);
271*0Sstevel@tonic-gate }
272