1*1708Sstevel /* 2*1708Sstevel * CDDL HEADER START 3*1708Sstevel * 4*1708Sstevel * The contents of this file are subject to the terms of the 5*1708Sstevel * Common Development and Distribution License (the "License"). 6*1708Sstevel * You may not use this file except in compliance with the License. 7*1708Sstevel * 8*1708Sstevel * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*1708Sstevel * or http://www.opensolaris.org/os/licensing. 10*1708Sstevel * See the License for the specific language governing permissions 11*1708Sstevel * and limitations under the License. 12*1708Sstevel * 13*1708Sstevel * When distributing Covered Code, include this CDDL HEADER in each 14*1708Sstevel * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*1708Sstevel * If applicable, add the following below this CDDL HEADER, with the 16*1708Sstevel * fields enclosed by brackets "[]" replaced with your own identifying 17*1708Sstevel * information: Portions Copyright [yyyy] [name of copyright owner] 18*1708Sstevel * 19*1708Sstevel * CDDL HEADER END 20*1708Sstevel */ 21*1708Sstevel 22*1708Sstevel /* 23*1708Sstevel * Copyright 2000 Sun Microsystems, Inc. All rights reserved. 24*1708Sstevel * Use is subject to license terms. 25*1708Sstevel */ 26*1708Sstevel 27*1708Sstevel #ifndef _SYS_IOSRAMREG_H 28*1708Sstevel #define _SYS_IOSRAMREG_H 29*1708Sstevel 30*1708Sstevel #pragma ident "%Z%%M% %I% %E% SMI" 31*1708Sstevel 32*1708Sstevel #ifdef __cplusplus 33*1708Sstevel extern "C" { 34*1708Sstevel #endif 35*1708Sstevel 36*1708Sstevel 37*1708Sstevel 38*1708Sstevel /* 39*1708Sstevel * iosram_reg_t property (an array of following tuple/data) 40*1708Sstevel * address format 41*1708Sstevel * hi npt000ss bbbbbbbb dddddfff rrrrrrrr 42*1708Sstevel * mid hhhhhhhh hhhhhhhh hhhhhhhh hhhhhhhh 43*1708Sstevel * low llllllll llllllll llllllll llllllll 44*1708Sstevel * 45*1708Sstevel * size format 46*1708Sstevel * hi hhhhhhhh hhhhhhhh hhhhhhhh hhhhhhhh 47*1708Sstevel * low llllllll llllllll llllllll llllllll 48*1708Sstevel * n=0 if relocatable 49*1708Sstevel * p=1 if addressable region is prefetchable 50*1708Sstevel * t=1 if address region is aliased 51*1708Sstevel * ss=00 Config. space also n,p,t must be 0 52*1708Sstevel * =01 I/O space p must be 0 53*1708Sstevel * =10 32 bit address memory space 54*1708Sstevel * =11 64 bit address memory space 55*1708Sstevel * bbbbbbbb 8 bit bus number 56*1708Sstevel * ddddd 5 bit device number 57*1708Sstevel * fff 3 bit function number 58*1708Sstevel * rrrrrrrr 8 bit register number 59*1708Sstevel * hhhhhhhh 32 bit unsigned number 60*1708Sstevel * llllllll 32 bit unsigned number 61*1708Sstevel * 62*1708Sstevel * address: 64 bits memory space 63*1708Sstevel * hi 00000011 00000000 00000000 00000000 64*1708Sstevel * 0x03000000 65*1708Sstevel * mid 00000000 00000000 00000000 00000000 66*1708Sstevel * 0x00000000 67*1708Sstevel * low 00000000 00010000 00000000 00000000 68*1708Sstevel * 0x00100000 69*1708Sstevel * size 70*1708Sstevel * hi 00000000 00000000 00000000 00000000 71*1708Sstevel * low 00000000 00000011 11111111 11111111 72*1708Sstevel */ 73*1708Sstevel 74*1708Sstevel typedef struct { 75*1708Sstevel uint32_t addr_hi; 76*1708Sstevel uint32_t addr_lo; 77*1708Sstevel uint32_t size; 78*1708Sstevel } iosram_reg_t; 79*1708Sstevel 80*1708Sstevel 81*1708Sstevel /* 82*1708Sstevel * SBBC access structures. Each SBBC register is 32 bits aligned on a 16 83*1708Sstevel * byte boundary. The iosram_sbbc_region structure should be mapped onto 84*1708Sstevel * the SBBC register space starting at 0x1000 to achieve correct alignment 85*1708Sstevel * between structure fields and SBBC registers. 86*1708Sstevel */ 87*1708Sstevel typedef struct iosram_sbbcr { 88*1708Sstevel uint32_t reg; /* 32-bit register */ 89*1708Sstevel uint32_t pad[3]; /* padding to fill out 16 bytes */ 90*1708Sstevel } iosram_sbbcr_t; 91*1708Sstevel 92*1708Sstevel typedef struct iosram_sbbc_region { 93*1708Sstevel iosram_sbbcr_t synch[16]; /* 0x1000 - 10ff - semaphore region */ 94*1708Sstevel iosram_sbbcr_t pad0[240]; /* 0x1100 - 1fff - padding */ 95*1708Sstevel iosram_sbbcr_t p0_int_gen; /* 0x2000 - 200f - PCI port 0 */ 96*1708Sstevel /* interrupt generation */ 97*1708Sstevel iosram_sbbcr_t p1_int_gen; /* 0x2010 - 201f - PCI port 1 */ 98*1708Sstevel /* interrupt generation */ 99*1708Sstevel iosram_sbbcr_t pad1[48]; /* 0x2020 - 231f - padding */ 100*1708Sstevel iosram_sbbcr_t int_status; /* 0x2320 - 232f - interrupt status */ 101*1708Sstevel iosram_sbbcr_t int_enable; /* 0x2330 - 233f - interrupt enables */ 102*1708Sstevel } iosram_sbbc_region_t; 103*1708Sstevel 104*1708Sstevel #define IOSRAM_SBBC_MAP_OFFSET 0x1000 /* offset of SBBC regs to be mapped */ 105*1708Sstevel #define IOSRAM_SBBC_MAP_INDEX 0x1 /* address space set # for SBBC regs */ 106*1708Sstevel #define IOSRAM_SBBC_INT0 0x01 107*1708Sstevel #define IOSRAM_SBBC_INT1 0x10 108*1708Sstevel 109*1708Sstevel /* 110*1708Sstevel * SBBC hardware semaphore access 111*1708Sstevel */ 112*1708Sstevel 113*1708Sstevel /* indices into sbbc_region->synch array */ 114*1708Sstevel #define IOSRAM_SEMA_SMS_IDX 0x1 /* when accessed by SMS */ 115*1708Sstevel #define IOSRAM_SEMA_DOM_IDX 0x8 /* when accessed by domain */ 116*1708Sstevel #define IOSRAM_SEMA_OBP_IDX 0xf /* when accessed by OBP */ 117*1708Sstevel 118*1708Sstevel /* mask for bits used to encode how semaphore was acquired (bits 1-4) */ 119*1708Sstevel #define IOSRAM_SEMA_MASK 0x1e 120*1708Sstevel 121*1708Sstevel /* read an write semaphore values using domain assigned register */ 122*1708Sstevel #define IOSRAM_SEMA_RD(softp) ddi_get32((softp)->sbbc_handle, \ 123*1708Sstevel &(softp->sbbc_region->synch[IOSRAM_SEMA_DOM_IDX].reg)); 124*1708Sstevel #define IOSRAM_SEMA_WR(softp, v) ddi_put32((softp)->sbbc_handle, \ 125*1708Sstevel &(softp->sbbc_region->synch[IOSRAM_SEMA_DOM_IDX].reg), v); 126*1708Sstevel 127*1708Sstevel #define IOSRAM_SEMA_IS_HELD(v) ((v) & 0x1) 128*1708Sstevel #define IOSRAM_SEMA_GET_IDX(v) (((v) & IOSRAM_SEMA_MASK) >> 1) 129*1708Sstevel 130*1708Sstevel #ifdef __cplusplus 131*1708Sstevel } 132*1708Sstevel #endif 133*1708Sstevel 134*1708Sstevel #endif /* _SYS_IOSRAMREG_H */ 135