10Sstevel@tonic-gate /* 20Sstevel@tonic-gate * CDDL HEADER START 30Sstevel@tonic-gate * 40Sstevel@tonic-gate * The contents of this file are subject to the terms of the 52973Sgovinda * Common Development and Distribution License (the "License"). 62973Sgovinda * You may not use this file except in compliance with the License. 70Sstevel@tonic-gate * 80Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 90Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 100Sstevel@tonic-gate * See the License for the specific language governing permissions 110Sstevel@tonic-gate * and limitations under the License. 120Sstevel@tonic-gate * 130Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 140Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 150Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 160Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 170Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 180Sstevel@tonic-gate * 190Sstevel@tonic-gate * CDDL HEADER END 200Sstevel@tonic-gate */ 210Sstevel@tonic-gate /* 228803SJonathan.Haslam@Sun.COM * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 230Sstevel@tonic-gate * Use is subject to license terms. 240Sstevel@tonic-gate */ 250Sstevel@tonic-gate 260Sstevel@tonic-gate /* 270Sstevel@tonic-gate * sun4u common CPC subroutines. 280Sstevel@tonic-gate */ 290Sstevel@tonic-gate 300Sstevel@tonic-gate #include <sys/types.h> 310Sstevel@tonic-gate #include <sys/time.h> 320Sstevel@tonic-gate #include <sys/atomic.h> 330Sstevel@tonic-gate #include <sys/thread.h> 340Sstevel@tonic-gate #include <sys/regset.h> 350Sstevel@tonic-gate #include <sys/archsystm.h> 360Sstevel@tonic-gate #include <sys/machsystm.h> 370Sstevel@tonic-gate #include <sys/cpc_impl.h> 380Sstevel@tonic-gate #include <sys/cpc_ultra.h> 390Sstevel@tonic-gate #include <sys/sunddi.h> 400Sstevel@tonic-gate #include <sys/intr.h> 410Sstevel@tonic-gate #include <sys/ivintr.h> 420Sstevel@tonic-gate #include <sys/x_call.h> 430Sstevel@tonic-gate #include <sys/cpuvar.h> 440Sstevel@tonic-gate #include <sys/machcpuvar.h> 450Sstevel@tonic-gate #include <sys/cpc_pcbe.h> 460Sstevel@tonic-gate #include <sys/modctl.h> 470Sstevel@tonic-gate #include <sys/sdt.h> 48*11389SAlexander.Kolbasov@Sun.COM #include <sys/kcpc.h> 490Sstevel@tonic-gate 508803SJonathan.Haslam@Sun.COM uint64_t cpc_level15_inum; /* used in interrupt.s */ 518803SJonathan.Haslam@Sun.COM int cpc_has_overflow_intr; /* set in cheetah.c */ 520Sstevel@tonic-gate 530Sstevel@tonic-gate extern kcpc_ctx_t *kcpc_overflow_intr(caddr_t arg, uint64_t bitmap); 540Sstevel@tonic-gate extern int kcpc_counts_include_idle; 550Sstevel@tonic-gate 560Sstevel@tonic-gate /* 570Sstevel@tonic-gate * Called on the boot CPU during startup. 580Sstevel@tonic-gate */ 590Sstevel@tonic-gate void 600Sstevel@tonic-gate kcpc_hw_init(void) 610Sstevel@tonic-gate { 620Sstevel@tonic-gate if (cpc_has_overflow_intr) { 630Sstevel@tonic-gate cpc_level15_inum = add_softintr(PIL_15, 642973Sgovinda kcpc_hw_overflow_intr, NULL, SOFTINT_MT); 650Sstevel@tonic-gate } 660Sstevel@tonic-gate 670Sstevel@tonic-gate /* 680Sstevel@tonic-gate * Make sure the boot CPU gets set up. 690Sstevel@tonic-gate */ 700Sstevel@tonic-gate kcpc_hw_startup_cpu(CPU->cpu_flags); 710Sstevel@tonic-gate } 720Sstevel@tonic-gate 730Sstevel@tonic-gate /* 740Sstevel@tonic-gate * Prepare for CPC interrupts and install an idle thread CPC context. 750Sstevel@tonic-gate */ 760Sstevel@tonic-gate void 770Sstevel@tonic-gate kcpc_hw_startup_cpu(ushort_t cpflags) 780Sstevel@tonic-gate { 790Sstevel@tonic-gate cpu_t *cp = CPU; 800Sstevel@tonic-gate kthread_t *t = cp->cpu_idle_thread; 810Sstevel@tonic-gate 820Sstevel@tonic-gate ASSERT(t->t_bound_cpu == cp); 830Sstevel@tonic-gate 840Sstevel@tonic-gate if (cpc_has_overflow_intr && (cpflags & CPU_FROZEN) == 0) { 850Sstevel@tonic-gate int pstate_save = disable_vec_intr(); 860Sstevel@tonic-gate 870Sstevel@tonic-gate ASSERT(cpc_level15_inum != 0); 880Sstevel@tonic-gate 890Sstevel@tonic-gate intr_enqueue_req(PIL_15, cpc_level15_inum); 900Sstevel@tonic-gate enable_vec_intr(pstate_save); 910Sstevel@tonic-gate } 920Sstevel@tonic-gate 930Sstevel@tonic-gate mutex_init(&cp->cpu_cpc_ctxlock, "cpu_cpc_ctxlock", MUTEX_DEFAULT, 0); 940Sstevel@tonic-gate 950Sstevel@tonic-gate if (kcpc_counts_include_idle) 960Sstevel@tonic-gate return; 970Sstevel@tonic-gate 980Sstevel@tonic-gate installctx(t, cp, kcpc_idle_save, kcpc_idle_restore, NULL, NULL, 990Sstevel@tonic-gate NULL, NULL); 1000Sstevel@tonic-gate } 1010Sstevel@tonic-gate 1020Sstevel@tonic-gate /* 1030Sstevel@tonic-gate * Examine the processor and load an appropriate PCBE. 1040Sstevel@tonic-gate */ 1050Sstevel@tonic-gate int 1060Sstevel@tonic-gate kcpc_hw_load_pcbe(void) 1070Sstevel@tonic-gate { 1080Sstevel@tonic-gate uint64_t ver = ultra_getver(); 1090Sstevel@tonic-gate 1100Sstevel@tonic-gate return (kcpc_pcbe_tryload(NULL, ULTRA_VER_MANUF(ver), 1110Sstevel@tonic-gate ULTRA_VER_IMPL(ver), ULTRA_VER_MASK(ver))); 1120Sstevel@tonic-gate } 1130Sstevel@tonic-gate 1140Sstevel@tonic-gate /*ARGSUSED*/ 1150Sstevel@tonic-gate int 1160Sstevel@tonic-gate kcpc_hw_cpu_hook(processorid_t cpuid, ulong_t *kcpc_cpumap) 1170Sstevel@tonic-gate { 1180Sstevel@tonic-gate return (0); 1190Sstevel@tonic-gate } 1200Sstevel@tonic-gate 1210Sstevel@tonic-gate int 1220Sstevel@tonic-gate kcpc_hw_lwp_hook(void) 1230Sstevel@tonic-gate { 1240Sstevel@tonic-gate return (0); 1250Sstevel@tonic-gate } 126