xref: /onnv-gate/usr/src/uts/sun4u/os/cpc_subr.c (revision 0:68f95e015346)
1*0Sstevel@tonic-gate /*
2*0Sstevel@tonic-gate  * CDDL HEADER START
3*0Sstevel@tonic-gate  *
4*0Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
5*0Sstevel@tonic-gate  * Common Development and Distribution License, Version 1.0 only
6*0Sstevel@tonic-gate  * (the "License").  You may not use this file except in compliance
7*0Sstevel@tonic-gate  * with the License.
8*0Sstevel@tonic-gate  *
9*0Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10*0Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
11*0Sstevel@tonic-gate  * See the License for the specific language governing permissions
12*0Sstevel@tonic-gate  * and limitations under the License.
13*0Sstevel@tonic-gate  *
14*0Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
15*0Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16*0Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
17*0Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
18*0Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
19*0Sstevel@tonic-gate  *
20*0Sstevel@tonic-gate  * CDDL HEADER END
21*0Sstevel@tonic-gate  */
22*0Sstevel@tonic-gate /*
23*0Sstevel@tonic-gate  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24*0Sstevel@tonic-gate  * Use is subject to license terms.
25*0Sstevel@tonic-gate  */
26*0Sstevel@tonic-gate 
27*0Sstevel@tonic-gate #pragma ident	"%Z%%M%	%I%	%E% SMI"
28*0Sstevel@tonic-gate 
29*0Sstevel@tonic-gate /*
30*0Sstevel@tonic-gate  * sun4u common CPC subroutines.
31*0Sstevel@tonic-gate  */
32*0Sstevel@tonic-gate 
33*0Sstevel@tonic-gate #include <sys/types.h>
34*0Sstevel@tonic-gate #include <sys/time.h>
35*0Sstevel@tonic-gate #include <sys/atomic.h>
36*0Sstevel@tonic-gate #include <sys/thread.h>
37*0Sstevel@tonic-gate #include <sys/regset.h>
38*0Sstevel@tonic-gate #include <sys/archsystm.h>
39*0Sstevel@tonic-gate #include <sys/machsystm.h>
40*0Sstevel@tonic-gate #include <sys/cpc_impl.h>
41*0Sstevel@tonic-gate #include <sys/cpc_ultra.h>
42*0Sstevel@tonic-gate #include <sys/sunddi.h>
43*0Sstevel@tonic-gate #include <sys/intr.h>
44*0Sstevel@tonic-gate #include <sys/ivintr.h>
45*0Sstevel@tonic-gate #include <sys/x_call.h>
46*0Sstevel@tonic-gate #include <sys/cpuvar.h>
47*0Sstevel@tonic-gate #include <sys/machcpuvar.h>
48*0Sstevel@tonic-gate #include <sys/cpc_pcbe.h>
49*0Sstevel@tonic-gate #include <sys/modctl.h>
50*0Sstevel@tonic-gate #include <sys/sdt.h>
51*0Sstevel@tonic-gate 
52*0Sstevel@tonic-gate uint32_t		cpc_level15_inum;	/* used in interrupt.s */
53*0Sstevel@tonic-gate int			cpc_has_overflow_intr;	/* set in cheetah.c */
54*0Sstevel@tonic-gate 
55*0Sstevel@tonic-gate extern kcpc_ctx_t *kcpc_overflow_intr(caddr_t arg, uint64_t bitmap);
56*0Sstevel@tonic-gate extern int kcpc_counts_include_idle;
57*0Sstevel@tonic-gate 
58*0Sstevel@tonic-gate /*
59*0Sstevel@tonic-gate  * Called on the boot CPU during startup.
60*0Sstevel@tonic-gate  */
61*0Sstevel@tonic-gate void
62*0Sstevel@tonic-gate kcpc_hw_init(void)
63*0Sstevel@tonic-gate {
64*0Sstevel@tonic-gate 	if (cpc_has_overflow_intr) {
65*0Sstevel@tonic-gate 		cpc_level15_inum = add_softintr(PIL_15,
66*0Sstevel@tonic-gate 		    kcpc_hw_overflow_intr, NULL);
67*0Sstevel@tonic-gate 	}
68*0Sstevel@tonic-gate 
69*0Sstevel@tonic-gate 	/*
70*0Sstevel@tonic-gate 	 * Make sure the boot CPU gets set up.
71*0Sstevel@tonic-gate 	 */
72*0Sstevel@tonic-gate 	kcpc_hw_startup_cpu(CPU->cpu_flags);
73*0Sstevel@tonic-gate }
74*0Sstevel@tonic-gate 
75*0Sstevel@tonic-gate /*
76*0Sstevel@tonic-gate  * Prepare for CPC interrupts and install an idle thread CPC context.
77*0Sstevel@tonic-gate  */
78*0Sstevel@tonic-gate void
79*0Sstevel@tonic-gate kcpc_hw_startup_cpu(ushort_t cpflags)
80*0Sstevel@tonic-gate {
81*0Sstevel@tonic-gate 	cpu_t		*cp = CPU;
82*0Sstevel@tonic-gate 	kthread_t	*t = cp->cpu_idle_thread;
83*0Sstevel@tonic-gate 
84*0Sstevel@tonic-gate 	ASSERT(t->t_bound_cpu == cp);
85*0Sstevel@tonic-gate 
86*0Sstevel@tonic-gate 	if (cpc_has_overflow_intr && (cpflags & CPU_FROZEN) == 0) {
87*0Sstevel@tonic-gate 		int pstate_save = disable_vec_intr();
88*0Sstevel@tonic-gate 
89*0Sstevel@tonic-gate 		ASSERT(cpc_level15_inum != 0);
90*0Sstevel@tonic-gate 
91*0Sstevel@tonic-gate 		intr_enqueue_req(PIL_15, cpc_level15_inum);
92*0Sstevel@tonic-gate 		enable_vec_intr(pstate_save);
93*0Sstevel@tonic-gate 	}
94*0Sstevel@tonic-gate 
95*0Sstevel@tonic-gate 	mutex_init(&cp->cpu_cpc_ctxlock, "cpu_cpc_ctxlock", MUTEX_DEFAULT, 0);
96*0Sstevel@tonic-gate 
97*0Sstevel@tonic-gate 	if (kcpc_counts_include_idle)
98*0Sstevel@tonic-gate 		return;
99*0Sstevel@tonic-gate 
100*0Sstevel@tonic-gate 	installctx(t, cp, kcpc_idle_save, kcpc_idle_restore, NULL, NULL,
101*0Sstevel@tonic-gate 	    NULL, NULL);
102*0Sstevel@tonic-gate }
103*0Sstevel@tonic-gate 
104*0Sstevel@tonic-gate /*
105*0Sstevel@tonic-gate  * Examine the processor and load an appropriate PCBE.
106*0Sstevel@tonic-gate  */
107*0Sstevel@tonic-gate int
108*0Sstevel@tonic-gate kcpc_hw_load_pcbe(void)
109*0Sstevel@tonic-gate {
110*0Sstevel@tonic-gate 	uint64_t	ver = ultra_getver();
111*0Sstevel@tonic-gate 
112*0Sstevel@tonic-gate 	return (kcpc_pcbe_tryload(NULL, ULTRA_VER_MANUF(ver),
113*0Sstevel@tonic-gate 	    ULTRA_VER_IMPL(ver), ULTRA_VER_MASK(ver)));
114*0Sstevel@tonic-gate }
115*0Sstevel@tonic-gate 
116*0Sstevel@tonic-gate /*ARGSUSED*/
117*0Sstevel@tonic-gate static void
118*0Sstevel@tonic-gate kcpc_remotestop_func(uint64_t arg1, uint64_t arg2)
119*0Sstevel@tonic-gate {
120*0Sstevel@tonic-gate 	ASSERT(CPU->cpu_cpc_ctx != NULL);
121*0Sstevel@tonic-gate 	pcbe_ops->pcbe_allstop();
122*0Sstevel@tonic-gate 	atomic_or_uint(&CPU->cpu_cpc_ctx->kc_flags, KCPC_CTX_INVALID_STOPPED);
123*0Sstevel@tonic-gate }
124*0Sstevel@tonic-gate 
125*0Sstevel@tonic-gate /*
126*0Sstevel@tonic-gate  * Ensure the counters are stopped on the given processor.
127*0Sstevel@tonic-gate  *
128*0Sstevel@tonic-gate  * Callers must ensure kernel preemption is disabled.
129*0Sstevel@tonic-gate  */
130*0Sstevel@tonic-gate void
131*0Sstevel@tonic-gate kcpc_remote_stop(cpu_t *cp)
132*0Sstevel@tonic-gate {
133*0Sstevel@tonic-gate 	xc_one(cp->cpu_id, kcpc_remotestop_func, 0, 0);
134*0Sstevel@tonic-gate }
135*0Sstevel@tonic-gate 
136*0Sstevel@tonic-gate /*ARGSUSED*/
137*0Sstevel@tonic-gate int
138*0Sstevel@tonic-gate kcpc_hw_cpu_hook(processorid_t cpuid, ulong_t *kcpc_cpumap)
139*0Sstevel@tonic-gate {
140*0Sstevel@tonic-gate 	return (0);
141*0Sstevel@tonic-gate }
142*0Sstevel@tonic-gate 
143*0Sstevel@tonic-gate int
144*0Sstevel@tonic-gate kcpc_hw_lwp_hook(void)
145*0Sstevel@tonic-gate {
146*0Sstevel@tonic-gate 	return (0);
147*0Sstevel@tonic-gate }
148