xref: /onnv-gate/usr/src/uts/sun4u/opl/sys/pcicmu/pcmu_cb.h (revision 1772:78cca3d2cc4b)
1*1772Sjl139090 /*
2*1772Sjl139090  * CDDL HEADER START
3*1772Sjl139090  *
4*1772Sjl139090  * The contents of this file are subject to the terms of the
5*1772Sjl139090  * Common Development and Distribution License (the "License").
6*1772Sjl139090  * You may not use this file except in compliance with the License.
7*1772Sjl139090  *
8*1772Sjl139090  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9*1772Sjl139090  * or http://www.opensolaris.org/os/licensing.
10*1772Sjl139090  * See the License for the specific language governing permissions
11*1772Sjl139090  * and limitations under the License.
12*1772Sjl139090  *
13*1772Sjl139090  * When distributing Covered Code, include this CDDL HEADER in each
14*1772Sjl139090  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15*1772Sjl139090  * If applicable, add the following below this CDDL HEADER, with the
16*1772Sjl139090  * fields enclosed by brackets "[]" replaced with your own identifying
17*1772Sjl139090  * information: Portions Copyright [yyyy] [name of copyright owner]
18*1772Sjl139090  *
19*1772Sjl139090  * CDDL HEADER END
20*1772Sjl139090  */
21*1772Sjl139090 /*
22*1772Sjl139090  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
23*1772Sjl139090  * Use is subject to license terms.
24*1772Sjl139090  */
25*1772Sjl139090 
26*1772Sjl139090 #ifndef	_SYS_PCMU_CB_H
27*1772Sjl139090 #define	_SYS_PCMU_CB_H
28*1772Sjl139090 
29*1772Sjl139090 #pragma ident	"%Z%%M%	%I%	%E% SMI"
30*1772Sjl139090 
31*1772Sjl139090 #ifdef	__cplusplus
32*1772Sjl139090 extern "C" {
33*1772Sjl139090 #endif
34*1772Sjl139090 
35*1772Sjl139090 enum pcmu_cb_nintr_index {
36*1772Sjl139090 	CBNINTR_PBM = 0,		/* not shared */
37*1772Sjl139090 	CBNINTR_UE = 1,			/* shared */
38*1772Sjl139090 	CBNINTR_CE = 2,			/* shared */
39*1772Sjl139090 	CBNINTR_POWER_FAIL	= 3,	/* shared */
40*1772Sjl139090 	CBNINTR_THERMAL		= 4,	/* shared */
41*1772Sjl139090 	CBNINTR_MAX			/* max */
42*1772Sjl139090 };
43*1772Sjl139090 
44*1772Sjl139090 /*
45*1772Sjl139090  * control block soft state structure:
46*1772Sjl139090  */
47*1772Sjl139090 struct pcmu_cb {
48*1772Sjl139090 	pcmu_t *pcb_pcmu_p;
49*1772Sjl139090 	pcmu_ign_t pcb_ign;		/* interrupt grp# */
50*1772Sjl139090 	kmutex_t pcb_intr_lock;		/* guards add/rem intr and intr dist */
51*1772Sjl139090 	uint32_t pcb_no_of_inos;	/* # of actual inos, including PBM */
52*1772Sjl139090 	uint32_t pcb_inos[CBNINTR_MAX];	/* subset of pcmu_p->pcmu_inos array */
53*1772Sjl139090 	uint64_t pcb_base_pa;		/* PA of CSR bank, 2nd "reg" */
54*1772Sjl139090 	uint64_t pcb_map_pa;		/* map reg base PA */
55*1772Sjl139090 	uint64_t pcb_clr_pa;		/* clr reg base PA */
56*1772Sjl139090 	uint64_t pcb_obsta_pa;		/* sta reg base PA */
57*1772Sjl139090 	uint64_t *pcb_imr_save;
58*1772Sjl139090 	caddr_t pcb_ittrans_cookie;	/* intr tgt translation */
59*1772Sjl139090 };
60*1772Sjl139090 
61*1772Sjl139090 #define	PCMU_CB_INO_TO_MONDO(pcb_p, ino)			\
62*1772Sjl139090 	    ((pcb_p)->pcb_ign << PCMU_INO_BITS |  (ino))
63*1772Sjl139090 
64*1772Sjl139090 /*
65*1772Sjl139090  * Prototypes.
66*1772Sjl139090  */
67*1772Sjl139090 extern void pcmu_cb_create(pcmu_t *pcmu_p);
68*1772Sjl139090 extern void pcmu_cb_destroy(pcmu_t *pcmu_p);
69*1772Sjl139090 extern void pcmu_cb_suspend(pcmu_cb_t *cb_p);
70*1772Sjl139090 extern void pcmu_cb_resume(pcmu_cb_t *cb_p);
71*1772Sjl139090 extern void pcmu_cb_enable_nintr(pcmu_t *pcmu_p, pcmu_cb_nintr_index_t idx);
72*1772Sjl139090 extern void pcmu_cb_disable_nintr(pcmu_cb_t *cb_p,
73*1772Sjl139090     pcmu_cb_nintr_index_t idx, int wait);
74*1772Sjl139090 extern void pcmu_cb_clear_nintr(pcmu_cb_t *cb_p, pcmu_cb_nintr_index_t idx);
75*1772Sjl139090 extern void pcmu_cb_intr_dist(void *arg);
76*1772Sjl139090 
77*1772Sjl139090 #ifdef	__cplusplus
78*1772Sjl139090 }
79*1772Sjl139090 #endif
80*1772Sjl139090 
81*1772Sjl139090 #endif	/* _SYS_PCMU_CB_H */
82