1*0Sstevel@tonic-gate/* 2*0Sstevel@tonic-gate * CDDL HEADER START 3*0Sstevel@tonic-gate * 4*0Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*0Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 6*0Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 7*0Sstevel@tonic-gate * with the License. 8*0Sstevel@tonic-gate * 9*0Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*0Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 11*0Sstevel@tonic-gate * See the License for the specific language governing permissions 12*0Sstevel@tonic-gate * and limitations under the License. 13*0Sstevel@tonic-gate * 14*0Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 15*0Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*0Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 17*0Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 18*0Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 19*0Sstevel@tonic-gate * 20*0Sstevel@tonic-gate * CDDL HEADER END 21*0Sstevel@tonic-gate */ 22*0Sstevel@tonic-gate/* 23*0Sstevel@tonic-gate * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24*0Sstevel@tonic-gate * Use is subject to license terms. 25*0Sstevel@tonic-gate */ 26*0Sstevel@tonic-gate 27*0Sstevel@tonic-gate#pragma ident "%Z%%M% %I% %E% SMI" 28*0Sstevel@tonic-gate 29*0Sstevel@tonic-gate#if defined(lint) 30*0Sstevel@tonic-gate#include <sys/types.h> 31*0Sstevel@tonic-gate#else /* lint */ 32*0Sstevel@tonic-gate#include "assym.h" 33*0Sstevel@tonic-gate#endif /* lint */ 34*0Sstevel@tonic-gate 35*0Sstevel@tonic-gate#include <sys/asm_linkage.h> 36*0Sstevel@tonic-gate#include <sys/machthread.h> /* for reg definition */ 37*0Sstevel@tonic-gate 38*0Sstevel@tonic-gate#include <sys/machasi.h> /* sun4u ASI */ 39*0Sstevel@tonic-gate#include <sys/mmu.h> 40*0Sstevel@tonic-gate#include <sys/privregs.h> 41*0Sstevel@tonic-gate#include <sys/machparam.h> 42*0Sstevel@tonic-gate#include <vm/hat_sfmmu.h> 43*0Sstevel@tonic-gate#include <sys/cpr_impl.h> 44*0Sstevel@tonic-gate#include <sys/intreg.h> 45*0Sstevel@tonic-gate#include <sys/clock.h> 46*0Sstevel@tonic-gate 47*0Sstevel@tonic-gate/* 48*0Sstevel@tonic-gate * resume kernel entry point from cprboot 49*0Sstevel@tonic-gate * 1. restore I/D TSB registers 50*0Sstevel@tonic-gate * 2. restore primary and secondary context registers 51*0Sstevel@tonic-gate * 3. initialize cpu state registers 52*0Sstevel@tonic-gate * 4. set up the thread and lwp registers for the cpr process 53*0Sstevel@tonic-gate * 5. switch to kernel trap 54*0Sstevel@tonic-gate * 6. restore checkpoint pc and stack pointer 55*0Sstevel@tonic-gate * 7. longjmp back to kernel 56*0Sstevel@tonic-gate * 57*0Sstevel@tonic-gate * registers from cprboot:exit_to_kernel() 58*0Sstevel@tonic-gate * %o0 prom cookie 59*0Sstevel@tonic-gate * %o1 struct sun4u_machdep *mdp 60*0Sstevel@tonic-gate * 61*0Sstevel@tonic-gate * Any change to this register assignment 62*0Sstevel@tonic-gate * require changes to cprboot_srt0.s 63*0Sstevel@tonic-gate */ 64*0Sstevel@tonic-gate 65*0Sstevel@tonic-gate#if defined(lint) 66*0Sstevel@tonic-gate 67*0Sstevel@tonic-gate/* ARGSUSED */ 68*0Sstevel@tonic-gatevoid 69*0Sstevel@tonic-gatei_cpr_resume_setup(void *cookie, csu_md_t *mdp) 70*0Sstevel@tonic-gate{} 71*0Sstevel@tonic-gate 72*0Sstevel@tonic-gate/* ARGSUSED */ 73*0Sstevel@tonic-gateint 74*0Sstevel@tonic-gatei_cpr_cif_wrapper(void *args) 75*0Sstevel@tonic-gate{ return (0); } 76*0Sstevel@tonic-gate 77*0Sstevel@tonic-gate/* ARGSUSED */ 78*0Sstevel@tonic-gatevoid 79*0Sstevel@tonic-gatedtlb_wr_entry(uint_t index, tte_t *tte, uint64_t *va_tag) 80*0Sstevel@tonic-gate{} 81*0Sstevel@tonic-gate 82*0Sstevel@tonic-gate/* ARGSUSED */ 83*0Sstevel@tonic-gatevoid 84*0Sstevel@tonic-gateitlb_wr_entry(uint_t index, tte_t *tte, uint64_t *va_tag) 85*0Sstevel@tonic-gate{} 86*0Sstevel@tonic-gate 87*0Sstevel@tonic-gate#else /* lint */ 88*0Sstevel@tonic-gate 89*0Sstevel@tonic-gate ! 90*0Sstevel@tonic-gate ! reserve 4k for cpr tmp stack; tstack should be first, 91*0Sstevel@tonic-gate ! any new data symbols should be added after tstack. 92*0Sstevel@tonic-gate ! 93*0Sstevel@tonic-gate .seg ".data" 94*0Sstevel@tonic-gate .global i_cpr_data_page, i_cpr_tstack_size 95*0Sstevel@tonic-gate .global i_cpr_orig_cif 96*0Sstevel@tonic-gate 97*0Sstevel@tonic-gate .align MMU_PAGESIZE 98*0Sstevel@tonic-gatei_cpr_data_page: 99*0Sstevel@tonic-gate .skip 4096 100*0Sstevel@tonic-gatei_cpr_tstack: 101*0Sstevel@tonic-gate .word 0 102*0Sstevel@tonic-gatei_cpr_tstack_size: 103*0Sstevel@tonic-gate .word 4096 104*0Sstevel@tonic-gate 105*0Sstevel@tonic-gate .align 8 106*0Sstevel@tonic-gateprom_tba: 107*0Sstevel@tonic-gate .word 0, 0 108*0Sstevel@tonic-gatei_cpr_orig_cif: 109*0Sstevel@tonic-gate .nword 0 110*0Sstevel@tonic-gatei_cpr_tmp_cif: 111*0Sstevel@tonic-gate .nword 0 112*0Sstevel@tonic-gate 113*0Sstevel@tonic-gate 114*0Sstevel@tonic-gate ! 115*0Sstevel@tonic-gate ! set text to begin at a page boundary so we can 116*0Sstevel@tonic-gate ! map this one page and jump to it from cprboot 117*0Sstevel@tonic-gate ! 118*0Sstevel@tonic-gate .seg ".text" 119*0Sstevel@tonic-gate .align MMU_PAGESIZE 120*0Sstevel@tonic-gate 121*0Sstevel@tonic-gate ENTRY(i_cpr_resume_setup) 122*0Sstevel@tonic-gate ! 123*0Sstevel@tonic-gate ! save %o args to locals 124*0Sstevel@tonic-gate ! 125*0Sstevel@tonic-gate mov %o0, %l4 126*0Sstevel@tonic-gate mov %o1, %l5 127*0Sstevel@tonic-gate 128*0Sstevel@tonic-gate ! 129*0Sstevel@tonic-gate ! Restore PCONTEXT 130*0Sstevel@tonic-gate ! 131*0Sstevel@tonic-gate sethi %hi(FLUSH_ADDR), %g3 132*0Sstevel@tonic-gate ld [%l5 + CPR_MD_PRI], %g1 ! mdp->mmu_ctx_pri 133*0Sstevel@tonic-gate set MMU_PCONTEXT, %g2 134*0Sstevel@tonic-gate stxa %g1, [%g2]ASI_DMMU 135*0Sstevel@tonic-gate flush %g3 136*0Sstevel@tonic-gate 137*0Sstevel@tonic-gate ! 138*0Sstevel@tonic-gate ! Restore SCONTEXT. We do not need to set up the TSB 139*0Sstevel@tonic-gate ! registers. Since we are restoring INVALID_CONTEXT into 140*0Sstevel@tonic-gate ! the secondary context the HAT will do that for us. 141*0Sstevel@tonic-gate ! 142*0Sstevel@tonic-gate ld [%l5 + CPR_MD_SEC], %g1 ! mdp->mmu_ctx_sec 143*0Sstevel@tonic-gate set MMU_SCONTEXT, %g2 144*0Sstevel@tonic-gate stxa %g1, [%g2]ASI_DMMU 145*0Sstevel@tonic-gate flush %g3 146*0Sstevel@tonic-gate 147*0Sstevel@tonic-gate ! 148*0Sstevel@tonic-gate ! Allow user rdtick, and rdstick if applicable 149*0Sstevel@tonic-gate ! 150*0Sstevel@tonic-gate CLEARTICKNPT 151*0Sstevel@tonic-gate 152*0Sstevel@tonic-gate ! 153*0Sstevel@tonic-gate ! copy saved thread pointer to %g7 154*0Sstevel@tonic-gate ! 155*0Sstevel@tonic-gate ldx [%l5 + CPR_MD_THRP], THREAD_REG ! mdp->thrp 156*0Sstevel@tonic-gate 157*0Sstevel@tonic-gate ! 158*0Sstevel@tonic-gate ! since csu_md_t lives in a cprboot data page, 159*0Sstevel@tonic-gate ! copy select data to registers for later use 160*0Sstevel@tonic-gate ! before freeing cprboot text/data pages 161*0Sstevel@tonic-gate ! 162*0Sstevel@tonic-gate ldx [%l5 + CPR_MD_QSAV_PC], %l7 ! l7 = mdp->qsav_pc 163*0Sstevel@tonic-gate ldx [%l5 + CPR_MD_QSAV_SP], %l6 ! l6 = mdp->qsav_sp 164*0Sstevel@tonic-gate 165*0Sstevel@tonic-gate ! 166*0Sstevel@tonic-gate ! save cookie from the new/tmp prom 167*0Sstevel@tonic-gate ! 168*0Sstevel@tonic-gate set i_cpr_tmp_cif, %g1 169*0Sstevel@tonic-gate stn %l4, [%g1] 170*0Sstevel@tonic-gate 171*0Sstevel@tonic-gate ! 172*0Sstevel@tonic-gate ! save prom tba 173*0Sstevel@tonic-gate ! 174*0Sstevel@tonic-gate set prom_tba, %g1 175*0Sstevel@tonic-gate rdpr %tba, %g2 176*0Sstevel@tonic-gate stx %g2, [%g1] 177*0Sstevel@tonic-gate 178*0Sstevel@tonic-gate ! 179*0Sstevel@tonic-gate ! start slave cpus, pause them within kernel text, 180*0Sstevel@tonic-gate ! and restore the original prom pages 181*0Sstevel@tonic-gate ! 182*0Sstevel@tonic-gate call i_cpr_mp_setup 183*0Sstevel@tonic-gate nop 184*0Sstevel@tonic-gate 185*0Sstevel@tonic-gate ! 186*0Sstevel@tonic-gate ! since this routine is entered only by a jmp from cprboot, 187*0Sstevel@tonic-gate ! we can set cpr_suspend_succeeded here 188*0Sstevel@tonic-gate ! 189*0Sstevel@tonic-gate set cpr_suspend_succeeded, %l0 190*0Sstevel@tonic-gate mov 1, %l1 191*0Sstevel@tonic-gate st %l1, [%l0] 192*0Sstevel@tonic-gate 193*0Sstevel@tonic-gate ! 194*0Sstevel@tonic-gate ! special shortened version of longjmp 195*0Sstevel@tonic-gate ! Don't need to flushw 196*0Sstevel@tonic-gate ! 197*0Sstevel@tonic-gate mov %l7, %i7 ! i7 = saved pc 198*0Sstevel@tonic-gate mov %l6, %fp ! i6 = saved sp 199*0Sstevel@tonic-gate ret ! return 1 200*0Sstevel@tonic-gate restore %g0, 1, %o0 ! takes underflow, switches stack 201*0Sstevel@tonic-gate SET_SIZE(i_cpr_resume_setup) 202*0Sstevel@tonic-gate 203*0Sstevel@tonic-gate 204*0Sstevel@tonic-gate ! 205*0Sstevel@tonic-gate ! while running on the new/tmp prom, the prom's trap table 206*0Sstevel@tonic-gate ! must be used to handle translations within prom space 207*0Sstevel@tonic-gate ! since the kernel's mappings may not match this prom. 208*0Sstevel@tonic-gate ! 209*0Sstevel@tonic-gate ! always set %tba to the prom's trap table before calling 210*0Sstevel@tonic-gate ! any prom service; after returning, read %tba again; 211*0Sstevel@tonic-gate ! if the %tba wasn't changed by the prom service, 212*0Sstevel@tonic-gate ! restore the original %tba. 213*0Sstevel@tonic-gate ! 214*0Sstevel@tonic-gate ! a call stack looks like this: 215*0Sstevel@tonic-gate ! 216*0Sstevel@tonic-gate ! current prom cookie 217*0Sstevel@tonic-gate ! [i_cpr_cif_wrapper] 218*0Sstevel@tonic-gate ! client_handler 219*0Sstevel@tonic-gate ! p1275_sparc_cif_handler 220*0Sstevel@tonic-gate ! prom_xxx 221*0Sstevel@tonic-gate ! 222*0Sstevel@tonic-gate ENTRY(i_cpr_cif_wrapper) 223*0Sstevel@tonic-gate save %sp, -SA64(MINFRAME64 + 8), %sp 224*0Sstevel@tonic-gate rdpr %tba, %o5 ! read original %tba 225*0Sstevel@tonic-gate stx %o5, [%fp + V9BIAS64 - 8] 226*0Sstevel@tonic-gate set prom_tba, %l4 227*0Sstevel@tonic-gate ldx [%l4], %o4 ! read prom_tba 228*0Sstevel@tonic-gate wrpr %o4, %tba ! switch to prom trap table 229*0Sstevel@tonic-gate 230*0Sstevel@tonic-gate set i_cpr_tmp_cif, %g3 ! cookie for new/tmp prom 231*0Sstevel@tonic-gate ldn [%g3], %g4 232*0Sstevel@tonic-gate jmpl %g4, %o7 ! call prom service 233*0Sstevel@tonic-gate mov %i0, %o0 234*0Sstevel@tonic-gate 235*0Sstevel@tonic-gate ldx [%l4], %o4 ! read prom_tba 236*0Sstevel@tonic-gate rdpr %tba, %o3 ! read current %tba 237*0Sstevel@tonic-gate cmp %o3, %o4 ! did prom change %tba ? 238*0Sstevel@tonic-gate bne,pn %xcc, 1f ! yes, dont reset %tba 239*0Sstevel@tonic-gate nop 240*0Sstevel@tonic-gate ldx [%fp + V9BIAS64 - 8], %o5 241*0Sstevel@tonic-gate wrpr %o5, %tba ! no change, restore orignal 242*0Sstevel@tonic-gate1: 243*0Sstevel@tonic-gate ret 244*0Sstevel@tonic-gate restore %g0, %o0, %o0 245*0Sstevel@tonic-gate SET_SIZE(i_cpr_cif_wrapper) 246*0Sstevel@tonic-gate 247*0Sstevel@tonic-gate 248*0Sstevel@tonic-gate ! 249*0Sstevel@tonic-gate ! write dtlb entry at index 250*0Sstevel@tonic-gate ! 251*0Sstevel@tonic-gate ENTRY(dtlb_wr_entry) 252*0Sstevel@tonic-gate sllx %o0, 3, %o0 ! index << 3 253*0Sstevel@tonic-gate ldx [%o1], %o5 ! o5 = tte.ll 254*0Sstevel@tonic-gate ldx [%o2], %o4 ! o4 = va_tag 255*0Sstevel@tonic-gate srlx %o4, MMU_PAGESHIFT, %o4 ! clear any page offset 256*0Sstevel@tonic-gate sllx %o4, MMU_PAGESHIFT, %o4 ! o4 = va_tag & PAGEMASK 257*0Sstevel@tonic-gate set MMU_TAG_ACCESS, %o3 258*0Sstevel@tonic-gate stxa %o4, [%o3]ASI_DMMU 259*0Sstevel@tonic-gate stxa %o5, [%o0]ASI_DTLB_ACCESS 260*0Sstevel@tonic-gate membar #Sync 261*0Sstevel@tonic-gate retl 262*0Sstevel@tonic-gate nop 263*0Sstevel@tonic-gate SET_SIZE(dtlb_wr_entry) 264*0Sstevel@tonic-gate 265*0Sstevel@tonic-gate 266*0Sstevel@tonic-gate ! 267*0Sstevel@tonic-gate ! write itlb entry at index 268*0Sstevel@tonic-gate ! 269*0Sstevel@tonic-gate ENTRY(itlb_wr_entry) 270*0Sstevel@tonic-gate sllx %o0, 3, %o0 ! index << 3 271*0Sstevel@tonic-gate ldx [%o1], %o5 ! o5 = tte.ll 272*0Sstevel@tonic-gate ldx [%o2], %o4 ! o4 = va_tag 273*0Sstevel@tonic-gate srlx %o4, MMU_PAGESHIFT, %o4 ! clear any page offset 274*0Sstevel@tonic-gate sllx %o4, MMU_PAGESHIFT, %o4 ! o4 = va_tag & PAGEMASK 275*0Sstevel@tonic-gate set MMU_TAG_ACCESS, %o3 276*0Sstevel@tonic-gate stxa %o4, [%o3]ASI_IMMU 277*0Sstevel@tonic-gate stxa %o5, [%o0]ASI_ITLB_ACCESS 278*0Sstevel@tonic-gate membar #Sync 279*0Sstevel@tonic-gate retl 280*0Sstevel@tonic-gate nop 281*0Sstevel@tonic-gate SET_SIZE(itlb_wr_entry) 282*0Sstevel@tonic-gate 283*0Sstevel@tonic-gate#endif /* !lint */ 284