1*0Sstevel@tonic-gate /* 2*0Sstevel@tonic-gate * CDDL HEADER START 3*0Sstevel@tonic-gate * 4*0Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*0Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 6*0Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 7*0Sstevel@tonic-gate * with the License. 8*0Sstevel@tonic-gate * 9*0Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*0Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 11*0Sstevel@tonic-gate * See the License for the specific language governing permissions 12*0Sstevel@tonic-gate * and limitations under the License. 13*0Sstevel@tonic-gate * 14*0Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 15*0Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*0Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 17*0Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 18*0Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 19*0Sstevel@tonic-gate * 20*0Sstevel@tonic-gate * CDDL HEADER END 21*0Sstevel@tonic-gate */ 22*0Sstevel@tonic-gate /* 23*0Sstevel@tonic-gate * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24*0Sstevel@tonic-gate * Use is subject to license terms. 25*0Sstevel@tonic-gate */ 26*0Sstevel@tonic-gate 27*0Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 28*0Sstevel@tonic-gate 29*0Sstevel@tonic-gate /* 30*0Sstevel@tonic-gate * Internal PCI Fast DVMA implementation 31*0Sstevel@tonic-gate */ 32*0Sstevel@tonic-gate #include <sys/types.h> 33*0Sstevel@tonic-gate #include <sys/kmem.h> 34*0Sstevel@tonic-gate #include <sys/async.h> 35*0Sstevel@tonic-gate #include <sys/sysmacros.h> 36*0Sstevel@tonic-gate #include <sys/sunddi.h> 37*0Sstevel@tonic-gate #include <sys/ddi_impldefs.h> 38*0Sstevel@tonic-gate #include <sys/dvma.h> 39*0Sstevel@tonic-gate #include <vm/hat.h> 40*0Sstevel@tonic-gate #include <sys/pci/pci_obj.h> 41*0Sstevel@tonic-gate 42*0Sstevel@tonic-gate /*LINTLIBRARY*/ 43*0Sstevel@tonic-gate 44*0Sstevel@tonic-gate static struct dvma_ops fdvma_ops; 45*0Sstevel@tonic-gate 46*0Sstevel@tonic-gate /* 47*0Sstevel@tonic-gate * The following routines are used to implement the sun4u fast dvma 48*0Sstevel@tonic-gate * routines on this bus. 49*0Sstevel@tonic-gate */ 50*0Sstevel@tonic-gate 51*0Sstevel@tonic-gate /*ARGSUSED*/ 52*0Sstevel@tonic-gate static void 53*0Sstevel@tonic-gate pci_fdvma_load(ddi_dma_handle_t h, caddr_t a, uint_t len, uint_t index, 54*0Sstevel@tonic-gate ddi_dma_cookie_t *cp) 55*0Sstevel@tonic-gate { 56*0Sstevel@tonic-gate ddi_dma_impl_t *mp = (ddi_dma_impl_t *)h; 57*0Sstevel@tonic-gate fdvma_t *fdvma_p = (fdvma_t *)mp->dmai_fdvma; 58*0Sstevel@tonic-gate pci_t *pci_p = (pci_t *)fdvma_p->softsp; 59*0Sstevel@tonic-gate iommu_t *iommu_p = pci_p->pci_iommu_p; 60*0Sstevel@tonic-gate dev_info_t *dip = pci_p->pci_dip; 61*0Sstevel@tonic-gate dvma_addr_t dvma_addr, dvma_pg; 62*0Sstevel@tonic-gate caddr_t baseaddr = (caddr_t)((uintptr_t)a & PAGEMASK); 63*0Sstevel@tonic-gate uint32_t offset; 64*0Sstevel@tonic-gate size_t npages, pg_index; 65*0Sstevel@tonic-gate pfn_t pfn; 66*0Sstevel@tonic-gate int i; 67*0Sstevel@tonic-gate uint64_t tte; 68*0Sstevel@tonic-gate 69*0Sstevel@tonic-gate offset = (uint32_t)a & IOMMU_PAGE_OFFSET; 70*0Sstevel@tonic-gate npages = IOMMU_BTOPR(len + offset); 71*0Sstevel@tonic-gate if (!npages) 72*0Sstevel@tonic-gate return; 73*0Sstevel@tonic-gate 74*0Sstevel@tonic-gate /* make sure we don't exceed reserved boundary */ 75*0Sstevel@tonic-gate DEBUG3(DBG_FAST_DVMA, dip, "load index=%x: %p+%x ", index, a, len); 76*0Sstevel@tonic-gate if (index + npages > mp->dmai_ndvmapages) { 77*0Sstevel@tonic-gate cmn_err(pci_panic_on_fatal_errors ? CE_PANIC : CE_WARN, 78*0Sstevel@tonic-gate "%s%d: kaddr_load index(%x)+pgs(%x) exceeds limit\n", 79*0Sstevel@tonic-gate ddi_driver_name(dip), ddi_get_instance(dip), 80*0Sstevel@tonic-gate index, npages); 81*0Sstevel@tonic-gate return; 82*0Sstevel@tonic-gate } 83*0Sstevel@tonic-gate 84*0Sstevel@tonic-gate /* better have not already loaded something at this address */ 85*0Sstevel@tonic-gate ASSERT(fdvma_p->kvbase[index] == NULL); 86*0Sstevel@tonic-gate ASSERT(fdvma_p->pagecnt[index] == 0); 87*0Sstevel@tonic-gate 88*0Sstevel@tonic-gate dvma_addr = mp->dmai_mapping + IOMMU_PTOB(index); 89*0Sstevel@tonic-gate dvma_pg = IOMMU_BTOP(dvma_addr); 90*0Sstevel@tonic-gate pg_index = dvma_pg - iommu_p->dvma_base_pg; 91*0Sstevel@tonic-gate 92*0Sstevel@tonic-gate /* construct the dma cookie to be returned */ 93*0Sstevel@tonic-gate MAKE_DMA_COOKIE(cp, dvma_addr | offset, len); 94*0Sstevel@tonic-gate DEBUG2(DBG_FAST_DVMA | DBG_CONT, dip, "cookie: %x+%x\n", 95*0Sstevel@tonic-gate cp->dmac_address, cp->dmac_size); 96*0Sstevel@tonic-gate 97*0Sstevel@tonic-gate for (i = 0, a = baseaddr; i < npages; i++, a += IOMMU_PAGE_SIZE) { 98*0Sstevel@tonic-gate if (pci_dvma_remap_enabled) { 99*0Sstevel@tonic-gate uint_t flags = HAC_NOSLEEP | HAC_PAGELOCK; 100*0Sstevel@tonic-gate 101*0Sstevel@tonic-gate (void) hat_add_callback(pci_fast_dvma_cbid, a, 102*0Sstevel@tonic-gate IOMMU_PAGE_SIZE, flags, mp, &pfn); 103*0Sstevel@tonic-gate 104*0Sstevel@tonic-gate mp->dmai_flags |= DMAI_FLAGS_RELOC; 105*0Sstevel@tonic-gate } else { 106*0Sstevel@tonic-gate pfn = hat_getpfnum(kas.a_hat, a); 107*0Sstevel@tonic-gate } 108*0Sstevel@tonic-gate if (pfn == PFN_INVALID) 109*0Sstevel@tonic-gate goto bad_pfn; 110*0Sstevel@tonic-gate 111*0Sstevel@tonic-gate if (i == 0) /* setup template, all bits except pfn value */ 112*0Sstevel@tonic-gate tte = MAKE_TTE_TEMPLATE((iopfn_t)pfn, mp); 113*0Sstevel@tonic-gate 114*0Sstevel@tonic-gate /* XXX assumes iommu and mmu has same page size */ 115*0Sstevel@tonic-gate iommu_p->iommu_tsb_vaddr[pg_index + i] = tte | IOMMU_PTOB(pfn); 116*0Sstevel@tonic-gate IOMMU_PAGE_FLUSH(iommu_p, (dvma_pg + i)); 117*0Sstevel@tonic-gate } 118*0Sstevel@tonic-gate 119*0Sstevel@tonic-gate mp->dmai_flags |= DMAI_FLAGS_MAPPED; 120*0Sstevel@tonic-gate fdvma_p->kvbase[index] = baseaddr; 121*0Sstevel@tonic-gate fdvma_p->pagecnt[index] = npages; 122*0Sstevel@tonic-gate 123*0Sstevel@tonic-gate return; 124*0Sstevel@tonic-gate bad_pfn: 125*0Sstevel@tonic-gate cmn_err(CE_WARN, "%s%d: kaddr_load can't get page frame for vaddr %x", 126*0Sstevel@tonic-gate ddi_driver_name(dip), ddi_get_instance(dip), (int)a); 127*0Sstevel@tonic-gate } 128*0Sstevel@tonic-gate 129*0Sstevel@tonic-gate /*ARGSUSED*/ 130*0Sstevel@tonic-gate static void 131*0Sstevel@tonic-gate pci_fdvma_unload(ddi_dma_handle_t h, uint_t index, uint_t sync_flags) 132*0Sstevel@tonic-gate { 133*0Sstevel@tonic-gate ddi_dma_impl_t *mp = (ddi_dma_impl_t *)h; 134*0Sstevel@tonic-gate fdvma_t *fdvma_p = (fdvma_t *)mp->dmai_fdvma; 135*0Sstevel@tonic-gate pci_t *pci_p = (pci_t *)fdvma_p->softsp; 136*0Sstevel@tonic-gate size_t npg = fdvma_p->pagecnt[index]; 137*0Sstevel@tonic-gate 138*0Sstevel@tonic-gate dvma_addr_t dvma_pg = IOMMU_BTOP(mp->dmai_mapping + IOMMU_PTOB(index)); 139*0Sstevel@tonic-gate 140*0Sstevel@tonic-gate DEBUG5(DBG_FAST_DVMA, pci_p->pci_dip, 141*0Sstevel@tonic-gate "unload index=%x flags=%x %x+%x+%x\n", index, sync_flags, 142*0Sstevel@tonic-gate mp->dmai_mapping, IOMMU_PTOB(index), IOMMU_PTOB(npg)); 143*0Sstevel@tonic-gate 144*0Sstevel@tonic-gate if (!pci_dvma_sync_before_unmap) { 145*0Sstevel@tonic-gate if (PCI_DMA_CANRELOC(mp)) 146*0Sstevel@tonic-gate pci_fdvma_unregister_callbacks(pci_p, fdvma_p, mp, 147*0Sstevel@tonic-gate index); 148*0Sstevel@tonic-gate fdvma_p->kvbase[index] = NULL; 149*0Sstevel@tonic-gate iommu_unmap_pages(pci_p->pci_iommu_p, dvma_pg, npg); 150*0Sstevel@tonic-gate } 151*0Sstevel@tonic-gate if (sync_flags != -1) 152*0Sstevel@tonic-gate pci_dma_sync(pci_p->pci_dip, mp->dmai_rdip, h, 153*0Sstevel@tonic-gate IOMMU_PTOB(index), IOMMU_PTOB(npg), sync_flags); 154*0Sstevel@tonic-gate if (pci_dvma_sync_before_unmap) { 155*0Sstevel@tonic-gate if (PCI_DMA_CANRELOC(mp)) 156*0Sstevel@tonic-gate pci_fdvma_unregister_callbacks(pci_p, fdvma_p, mp, 157*0Sstevel@tonic-gate index); 158*0Sstevel@tonic-gate fdvma_p->kvbase[index] = NULL; 159*0Sstevel@tonic-gate iommu_unmap_pages(pci_p->pci_iommu_p, dvma_pg, npg); 160*0Sstevel@tonic-gate } 161*0Sstevel@tonic-gate fdvma_p->pagecnt[index] = 0; 162*0Sstevel@tonic-gate } 163*0Sstevel@tonic-gate 164*0Sstevel@tonic-gate /*ARGSUSED*/ 165*0Sstevel@tonic-gate static void 166*0Sstevel@tonic-gate pci_fdvma_sync(ddi_dma_handle_t h, uint_t index, uint_t sync_flags) 167*0Sstevel@tonic-gate { 168*0Sstevel@tonic-gate ddi_dma_impl_t *mp = (ddi_dma_impl_t *)h; 169*0Sstevel@tonic-gate fdvma_t *fdvma_p = (fdvma_t *)mp->dmai_fdvma; 170*0Sstevel@tonic-gate pci_t *pci_p = (pci_t *)fdvma_p->softsp; 171*0Sstevel@tonic-gate size_t npg = fdvma_p->pagecnt[index]; 172*0Sstevel@tonic-gate 173*0Sstevel@tonic-gate DEBUG5(DBG_FAST_DVMA, pci_p->pci_dip, 174*0Sstevel@tonic-gate "sync index=%x flags=%x %x+%x+%x\n", index, sync_flags, 175*0Sstevel@tonic-gate mp->dmai_mapping, IOMMU_PTOB(index), IOMMU_PTOB(npg)); 176*0Sstevel@tonic-gate pci_dma_sync(pci_p->pci_dip, mp->dmai_rdip, h, IOMMU_PTOB(index), 177*0Sstevel@tonic-gate IOMMU_PTOB(npg), sync_flags); 178*0Sstevel@tonic-gate } 179*0Sstevel@tonic-gate 180*0Sstevel@tonic-gate int 181*0Sstevel@tonic-gate pci_fdvma_reserve(dev_info_t *dip, dev_info_t *rdip, pci_t *pci_p, 182*0Sstevel@tonic-gate ddi_dma_req_t *dmareq, ddi_dma_handle_t *handlep) 183*0Sstevel@tonic-gate { 184*0Sstevel@tonic-gate fdvma_t *fdvma_p; 185*0Sstevel@tonic-gate dvma_addr_t dvma_pg; 186*0Sstevel@tonic-gate iommu_t *iommu_p = pci_p->pci_iommu_p; 187*0Sstevel@tonic-gate size_t npages; 188*0Sstevel@tonic-gate ddi_dma_impl_t *mp; 189*0Sstevel@tonic-gate ddi_dma_lim_t *lim_p = dmareq->dmar_limits; 190*0Sstevel@tonic-gate ulong_t hi = lim_p->dlim_addr_hi; 191*0Sstevel@tonic-gate ulong_t lo = lim_p->dlim_addr_lo; 192*0Sstevel@tonic-gate size_t counter_max = (lim_p->dlim_cntr_max + 1) & IOMMU_PAGE_MASK; 193*0Sstevel@tonic-gate 194*0Sstevel@tonic-gate if (pci_disable_fdvma) 195*0Sstevel@tonic-gate return (DDI_FAILURE); 196*0Sstevel@tonic-gate 197*0Sstevel@tonic-gate DEBUG2(DBG_DMA_CTL, dip, "DDI_DMA_RESERVE: rdip=%s%d\n", 198*0Sstevel@tonic-gate ddi_driver_name(rdip), ddi_get_instance(rdip)); 199*0Sstevel@tonic-gate 200*0Sstevel@tonic-gate /* 201*0Sstevel@tonic-gate * Check the limit structure. 202*0Sstevel@tonic-gate */ 203*0Sstevel@tonic-gate if ((lo >= hi) || (hi < iommu_p->iommu_dvma_base)) 204*0Sstevel@tonic-gate return (DDI_DMA_BADLIMITS); 205*0Sstevel@tonic-gate 206*0Sstevel@tonic-gate /* 207*0Sstevel@tonic-gate * Check the size of the request. 208*0Sstevel@tonic-gate */ 209*0Sstevel@tonic-gate npages = dmareq->dmar_object.dmao_size; 210*0Sstevel@tonic-gate if (npages > iommu_p->iommu_dvma_reserve) 211*0Sstevel@tonic-gate return (DDI_DMA_NORESOURCES); 212*0Sstevel@tonic-gate 213*0Sstevel@tonic-gate /* 214*0Sstevel@tonic-gate * Allocate the dma handle. 215*0Sstevel@tonic-gate */ 216*0Sstevel@tonic-gate mp = kmem_zalloc(sizeof (pci_dma_hdl_t), KM_SLEEP); 217*0Sstevel@tonic-gate 218*0Sstevel@tonic-gate /* 219*0Sstevel@tonic-gate * Get entries from dvma space map. 220*0Sstevel@tonic-gate * (vmem_t *vmp, 221*0Sstevel@tonic-gate * size_t size, size_t align, size_t phase, 222*0Sstevel@tonic-gate * size_t nocross, void *minaddr, void *maxaddr, int vmflag) 223*0Sstevel@tonic-gate */ 224*0Sstevel@tonic-gate dvma_pg = IOMMU_BTOP((ulong_t)vmem_xalloc(iommu_p->iommu_dvma_map, 225*0Sstevel@tonic-gate IOMMU_PTOB(npages), IOMMU_PAGE_SIZE, 0, 226*0Sstevel@tonic-gate counter_max, (void *)lo, (void *)(hi + 1), 227*0Sstevel@tonic-gate dmareq->dmar_fp == DDI_DMA_SLEEP ? VM_SLEEP : VM_NOSLEEP)); 228*0Sstevel@tonic-gate if (dvma_pg == 0) { 229*0Sstevel@tonic-gate kmem_free(mp, sizeof (pci_dma_hdl_t)); 230*0Sstevel@tonic-gate return (DDI_DMA_NOMAPPING); 231*0Sstevel@tonic-gate } 232*0Sstevel@tonic-gate iommu_p->iommu_dvma_reserve -= npages; 233*0Sstevel@tonic-gate 234*0Sstevel@tonic-gate /* 235*0Sstevel@tonic-gate * Create the fast dvma request structure. 236*0Sstevel@tonic-gate */ 237*0Sstevel@tonic-gate fdvma_p = kmem_alloc(sizeof (fdvma_t), KM_SLEEP); 238*0Sstevel@tonic-gate fdvma_p->kvbase = kmem_zalloc(npages * sizeof (caddr_t), KM_SLEEP); 239*0Sstevel@tonic-gate fdvma_p->pagecnt = kmem_zalloc(npages * sizeof (uint_t), KM_SLEEP); 240*0Sstevel@tonic-gate fdvma_p->ops = &fdvma_ops; 241*0Sstevel@tonic-gate fdvma_p->softsp = (caddr_t)pci_p; 242*0Sstevel@tonic-gate fdvma_p->sync_flag = NULL; 243*0Sstevel@tonic-gate 244*0Sstevel@tonic-gate /* 245*0Sstevel@tonic-gate * Initialize the handle. 246*0Sstevel@tonic-gate */ 247*0Sstevel@tonic-gate mp->dmai_rdip = rdip; 248*0Sstevel@tonic-gate mp->dmai_rflags = DMP_BYPASSNEXUS | 249*0Sstevel@tonic-gate pci_dma_consist_check(dmareq->dmar_flags, pci_p->pci_pbm_p); 250*0Sstevel@tonic-gate if (!(dmareq->dmar_flags & DDI_DMA_RDWR)) 251*0Sstevel@tonic-gate mp->dmai_rflags |= DDI_DMA_READ; 252*0Sstevel@tonic-gate mp->dmai_flags = DMAI_FLAGS_INUSE | 253*0Sstevel@tonic-gate (mp->dmai_rflags & DMP_NOSYNC ? DMAI_FLAGS_NOSYNC : 0); 254*0Sstevel@tonic-gate mp->dmai_minxfer = dmareq->dmar_limits->dlim_minxfer; 255*0Sstevel@tonic-gate mp->dmai_burstsizes = dmareq->dmar_limits->dlim_burstsizes; 256*0Sstevel@tonic-gate mp->dmai_mapping = IOMMU_PTOB(dvma_pg); 257*0Sstevel@tonic-gate mp->dmai_ndvmapages = npages; 258*0Sstevel@tonic-gate mp->dmai_size = npages * IOMMU_PAGE_SIZE; 259*0Sstevel@tonic-gate mp->dmai_nwin = 0; 260*0Sstevel@tonic-gate mp->dmai_fdvma = (caddr_t)fdvma_p; 261*0Sstevel@tonic-gate 262*0Sstevel@tonic-gate DEBUG4(DBG_DMA_CTL, dip, 263*0Sstevel@tonic-gate "PCI_DVMA_RESERVE: mp=%p dvma=%x npages=%x private=%p\n", 264*0Sstevel@tonic-gate mp, mp->dmai_mapping, npages, fdvma_p); 265*0Sstevel@tonic-gate *handlep = (ddi_dma_handle_t)mp; 266*0Sstevel@tonic-gate return (DDI_SUCCESS); 267*0Sstevel@tonic-gate } 268*0Sstevel@tonic-gate 269*0Sstevel@tonic-gate int 270*0Sstevel@tonic-gate pci_fdvma_release(dev_info_t *dip, pci_t *pci_p, ddi_dma_impl_t *mp) 271*0Sstevel@tonic-gate { 272*0Sstevel@tonic-gate iommu_t *iommu_p = pci_p->pci_iommu_p; 273*0Sstevel@tonic-gate size_t npages; 274*0Sstevel@tonic-gate fdvma_t *fdvma_p = (fdvma_t *)mp->dmai_fdvma; 275*0Sstevel@tonic-gate 276*0Sstevel@tonic-gate if (pci_disable_fdvma) 277*0Sstevel@tonic-gate return (DDI_FAILURE); 278*0Sstevel@tonic-gate 279*0Sstevel@tonic-gate /* validate fdvma handle */ 280*0Sstevel@tonic-gate if (!(mp->dmai_rflags & DMP_BYPASSNEXUS)) { 281*0Sstevel@tonic-gate DEBUG0(DBG_DMA_CTL, dip, "DDI_DMA_RELEASE: not fast dma\n"); 282*0Sstevel@tonic-gate return (DDI_FAILURE); 283*0Sstevel@tonic-gate } 284*0Sstevel@tonic-gate 285*0Sstevel@tonic-gate /* flush all reserved dvma addresses from iommu */ 286*0Sstevel@tonic-gate pci_dma_sync_unmap(dip, mp->dmai_rdip, mp); 287*0Sstevel@tonic-gate 288*0Sstevel@tonic-gate npages = mp->dmai_ndvmapages; 289*0Sstevel@tonic-gate pci_vmem_free(iommu_p, mp, (void *)mp->dmai_mapping, npages); 290*0Sstevel@tonic-gate 291*0Sstevel@tonic-gate iommu_p->iommu_dvma_reserve += npages; 292*0Sstevel@tonic-gate mp->dmai_ndvmapages = 0; 293*0Sstevel@tonic-gate 294*0Sstevel@tonic-gate /* see if there is anyone waiting for dvma space */ 295*0Sstevel@tonic-gate if (iommu_p->iommu_dvma_clid != 0) { 296*0Sstevel@tonic-gate DEBUG0(DBG_DMA_CTL, dip, "run dvma callback\n"); 297*0Sstevel@tonic-gate ddi_run_callback(&iommu_p->iommu_dvma_clid); 298*0Sstevel@tonic-gate } 299*0Sstevel@tonic-gate 300*0Sstevel@tonic-gate /* free data structures */ 301*0Sstevel@tonic-gate kmem_free(fdvma_p->kvbase, npages * sizeof (caddr_t)); 302*0Sstevel@tonic-gate kmem_free(fdvma_p->pagecnt, npages * sizeof (uint_t)); 303*0Sstevel@tonic-gate kmem_free(fdvma_p, sizeof (fdvma_t)); 304*0Sstevel@tonic-gate kmem_free(mp, sizeof (pci_dma_hdl_t)); 305*0Sstevel@tonic-gate 306*0Sstevel@tonic-gate /* see if there is anyone waiting for kmem */ 307*0Sstevel@tonic-gate if (pci_kmem_clid != 0) { 308*0Sstevel@tonic-gate DEBUG0(DBG_DMA_CTL, dip, "run handle callback\n"); 309*0Sstevel@tonic-gate ddi_run_callback(&pci_kmem_clid); 310*0Sstevel@tonic-gate } 311*0Sstevel@tonic-gate return (DDI_SUCCESS); 312*0Sstevel@tonic-gate } 313*0Sstevel@tonic-gate 314*0Sstevel@tonic-gate /* 315*0Sstevel@tonic-gate * fast dvma ops structure: 316*0Sstevel@tonic-gate */ 317*0Sstevel@tonic-gate static struct dvma_ops fdvma_ops = { 318*0Sstevel@tonic-gate DVMAO_REV, 319*0Sstevel@tonic-gate pci_fdvma_load, 320*0Sstevel@tonic-gate pci_fdvma_unload, 321*0Sstevel@tonic-gate pci_fdvma_sync 322*0Sstevel@tonic-gate }; 323