1*0Sstevel@tonic-gate /* 2*0Sstevel@tonic-gate * CDDL HEADER START 3*0Sstevel@tonic-gate * 4*0Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*0Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 6*0Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 7*0Sstevel@tonic-gate * with the License. 8*0Sstevel@tonic-gate * 9*0Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*0Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 11*0Sstevel@tonic-gate * See the License for the specific language governing permissions 12*0Sstevel@tonic-gate * and limitations under the License. 13*0Sstevel@tonic-gate * 14*0Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 15*0Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*0Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 17*0Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 18*0Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 19*0Sstevel@tonic-gate * 20*0Sstevel@tonic-gate * CDDL HEADER END 21*0Sstevel@tonic-gate */ 22*0Sstevel@tonic-gate /* 23*0Sstevel@tonic-gate * Copyright 2000-2001, 2003 Sun Microsystems, Inc. All rights reserved. 24*0Sstevel@tonic-gate * Use is subject to license terms. 25*0Sstevel@tonic-gate */ 26*0Sstevel@tonic-gate 27*0Sstevel@tonic-gate #ifndef _SYS_HPC3130_DAK_H 28*0Sstevel@tonic-gate #define _SYS_HPC3130_DAK_H 29*0Sstevel@tonic-gate 30*0Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 31*0Sstevel@tonic-gate 32*0Sstevel@tonic-gate #ifdef __cplusplus 33*0Sstevel@tonic-gate extern "C" { 34*0Sstevel@tonic-gate #endif 35*0Sstevel@tonic-gate 36*0Sstevel@tonic-gate #if defined(_KERNEL) 37*0Sstevel@tonic-gate 38*0Sstevel@tonic-gate #include <sys/i2c/clients/i2c_client.h> 39*0Sstevel@tonic-gate 40*0Sstevel@tonic-gate /* masks */ 41*0Sstevel@tonic-gate 42*0Sstevel@tonic-gate #define HPC3130_PROTECT_ON 0x01 /* (R/W) protection enable mechanism */ 43*0Sstevel@tonic-gate #define HPC3130_SYSM66STAT 0x02 /* (R) indicates bus runs at 66Mhz */ 44*0Sstevel@tonic-gate #define HPC3130_SEQUENCING 0x0c /* (R/W) hotplug sequencing mode */ 45*0Sstevel@tonic-gate #define HPC3130_MANUAL_SEQ 0x00 /* controle with idividual register calls */ 46*0Sstevel@tonic-gate #define HPC3130_AUTO1_SEQ 0x04 /* enable CBT before disable RST# */ 47*0Sstevel@tonic-gate #define HPC3130_AUTO2_SEQ 0x08 /* enable CBT after disable RST# */ 48*0Sstevel@tonic-gate 49*0Sstevel@tonic-gate #define HPC3130_GCR 0x00 50*0Sstevel@tonic-gate #define HPC3130_STATUS 0x01 51*0Sstevel@tonic-gate #define HPC3130_CONTROL 0x02 52*0Sstevel@tonic-gate #define HPC3130_ATTEN 0x03 53*0Sstevel@tonic-gate #define HPC3130_EVENT_STATUS 0x06 54*0Sstevel@tonic-gate #define HPC3130_INTERRUPT 0x07 55*0Sstevel@tonic-gate #define HPC3130_NO_REGISTER 0xff 56*0Sstevel@tonic-gate 57*0Sstevel@tonic-gate /* 58*0Sstevel@tonic-gate * masks 59*0Sstevel@tonic-gate */ 60*0Sstevel@tonic-gate #define HPC3130_PRSNT1 0x01 /* (R) Logic level of PRSNT1# signal */ 61*0Sstevel@tonic-gate #define HPC3130_PRSNT2 0x02 /* (R) Logic level of PRSNT2# signal */ 62*0Sstevel@tonic-gate #define HPC3130_DETECT0 0x04 /* (R) Logic level of DETECT0# signal */ 63*0Sstevel@tonic-gate #define HPC3130_DETECT1 0x08 /* (R) Logic level of DETECT1# signal */ 64*0Sstevel@tonic-gate #define HPC3130_PWRFAULT 0x10 /* (R) Logic level of PWRFAULT# signal */ 65*0Sstevel@tonic-gate #define HPC3130_PWRGOOD 0x20 /* (R) Logic level of PWRGOOD# signal */ 66*0Sstevel@tonic-gate #define HPC3130_M66EN 0x40 /* (R) Logic level of M66EN terminal */ 67*0Sstevel@tonic-gate #define HPC3130_BUSON 0x80 /* (R) Logic level of BUSON# signal */ 68*0Sstevel@tonic-gate 69*0Sstevel@tonic-gate 70*0Sstevel@tonic-gate /* 71*0Sstevel@tonic-gate * more masks 72*0Sstevel@tonic-gate */ 73*0Sstevel@tonic-gate /* (R/W) Logical level of SLOTRST# (used to reset a slot) */ 74*0Sstevel@tonic-gate #define HPC3130_SLOTRST 0x01 75*0Sstevel@tonic-gate /* (R/W) Logical level of CLKON# (used to control clock signal) */ 76*0Sstevel@tonic-gate #define HPC3130_CLKON 0x02 77*0Sstevel@tonic-gate /* (R/W) Logical level of REQ64ON# signal */ 78*0Sstevel@tonic-gate #define HPC3130_REQ64 0x04 79*0Sstevel@tonic-gate /* (R/W) Logical level of SLOTREQ64# signal */ 80*0Sstevel@tonic-gate #define HPC3130_SLOTREQ64 0x08 81*0Sstevel@tonic-gate /* (R/W) Bus control (for auto sequence level==1?disconnect:connect */ 82*0Sstevel@tonic-gate #define HPC3130_BUS_CTL 0x10 83*0Sstevel@tonic-gate /* (R/W) Logical level of power control on the slot */ 84*0Sstevel@tonic-gate #define HPC3130_SLTPWRCTL 0x20 85*0Sstevel@tonic-gate 86*0Sstevel@tonic-gate 87*0Sstevel@tonic-gate #define HPC3130_ATTN0 0x00 88*0Sstevel@tonic-gate #define HPC3130_ATTN1 0x01 89*0Sstevel@tonic-gate 90*0Sstevel@tonic-gate #define HPC3130_LED_FAULT HPC3130_ATTN1 91*0Sstevel@tonic-gate #define HPC3130_LED_OK2REM HPC3130_ATTN0 92*0Sstevel@tonic-gate 93*0Sstevel@tonic-gate #define HPC3130_ATTN_MASK(led) (3<<(HPC3130_ATTN_SHIFT(led))) /* 3 or c */ 94*0Sstevel@tonic-gate #define HPC3130_ATTN_SHIFT(led) (led<<1) /* 0 or 2 */ 95*0Sstevel@tonic-gate 96*0Sstevel@tonic-gate #define HPC3130_ATTN_OFF 0x00 97*0Sstevel@tonic-gate #define HPC3130_ATTN_SLO 0x01 /* not used by Daktari */ 98*0Sstevel@tonic-gate #define HPC3130_ATTN_FST 0x02 99*0Sstevel@tonic-gate #define HPC3130_ATTN_ON 0x03 100*0Sstevel@tonic-gate 101*0Sstevel@tonic-gate /* 102*0Sstevel@tonic-gate * These two macros map between the Hot Plug Services LED constants 103*0Sstevel@tonic-gate * (cf. uts/common/sys/hotplug/hpctrl.h) and the values used by the 104*0Sstevel@tonic-gate * HPC3130 hardware. 105*0Sstevel@tonic-gate */ 106*0Sstevel@tonic-gate 107*0Sstevel@tonic-gate static char hpc3130_to_hpc_led_map[] = { 108*0Sstevel@tonic-gate HPC_LED_OFF, HPC_LED_BLINK, HPC_LED_BLINK, HPC_LED_ON 109*0Sstevel@tonic-gate }; 110*0Sstevel@tonic-gate static char hpc3130_from_hpc_led_map[] = { 111*0Sstevel@tonic-gate HPC3130_ATTN_OFF, HPC3130_ATTN_ON, HPC3130_ATTN_FST 112*0Sstevel@tonic-gate }; 113*0Sstevel@tonic-gate #define HPC3130_TO_HPC_LED(val) (hpc3130_to_hpc_led_map[val]) 114*0Sstevel@tonic-gate #define HPC3130_FROM_HPC_LED(val) (hpc3130_from_hpc_led_map[val]) 115*0Sstevel@tonic-gate 116*0Sstevel@tonic-gate #define HPC3130_MAX_SLOT 0x4 117*0Sstevel@tonic-gate 118*0Sstevel@tonic-gate #define HPC3130_TABLE_COLUMNS 3 /* number of colums in slot-table property */ 119*0Sstevel@tonic-gate #define HPC3130_DEBOUNCE_COUNT 2 /* consecutive equal readings == debounced */ 120*0Sstevel@tonic-gate #define HPC3130_DEBOUNCE_LIMIT 1000 /* hard upper limit on debouce code */ 121*0Sstevel@tonic-gate #define HPC3130_POWER_TRIES 3 /* Try this may times to connect/disconnect */ 122*0Sstevel@tonic-gate #define HPC3130_ADEQUATE_PAUSE 25000 /* usec delay for connect sequence */ 123*0Sstevel@tonic-gate 124*0Sstevel@tonic-gate /* 125*0Sstevel@tonic-gate * This structure defines an element of the controller's 126*0Sstevel@tonic-gate * slot table array 127*0Sstevel@tonic-gate */ 128*0Sstevel@tonic-gate 129*0Sstevel@tonic-gate typedef struct hpc3130_slot_table_entry hpc3130_slot_table_entry_t; 130*0Sstevel@tonic-gate typedef struct hpc3130_callback_arg hpc3130_callback_arg_t; 131*0Sstevel@tonic-gate 132*0Sstevel@tonic-gate struct hpc3130_callback_arg { 133*0Sstevel@tonic-gate caddr_t handle; 134*0Sstevel@tonic-gate caddr_t statep; 135*0Sstevel@tonic-gate uint8_t offset; 136*0Sstevel@tonic-gate }; 137*0Sstevel@tonic-gate 138*0Sstevel@tonic-gate struct hpc3130_slot_table_entry { 139*0Sstevel@tonic-gate hpc_slot_info_t hpc3130_slot_info; 140*0Sstevel@tonic-gate hpc_slot_t hpc3130_slot_handle; 141*0Sstevel@tonic-gate char nexus[MAXNAMELEN]; 142*0Sstevel@tonic-gate hpc3130_callback_arg_t callback_info; 143*0Sstevel@tonic-gate }; 144*0Sstevel@tonic-gate 145*0Sstevel@tonic-gate /* 146*0Sstevel@tonic-gate * The soft state structure 147*0Sstevel@tonic-gate */ 148*0Sstevel@tonic-gate struct hpc3130_unit { 149*0Sstevel@tonic-gate 150*0Sstevel@tonic-gate dev_info_t *dip; 151*0Sstevel@tonic-gate 152*0Sstevel@tonic-gate hpc_slot_ops_t *hpc3130_slot_ops; 153*0Sstevel@tonic-gate 154*0Sstevel@tonic-gate /* 155*0Sstevel@tonic-gate * the following fields hold the value of the "slot-table" 156*0Sstevel@tonic-gate * property for this controller 157*0Sstevel@tonic-gate */ 158*0Sstevel@tonic-gate caddr_t hpc3130_slot_table_data; 159*0Sstevel@tonic-gate int hpc3130_slot_table_size; 160*0Sstevel@tonic-gate 161*0Sstevel@tonic-gate /* 162*0Sstevel@tonic-gate * the following fields represent the array of hot-plug 163*0Sstevel@tonic-gate * slots derived from the "slot-table" property 164*0Sstevel@tonic-gate */ 165*0Sstevel@tonic-gate hpc3130_slot_table_entry_t *hpc3130_slot_table; 166*0Sstevel@tonic-gate int hpc3130_slot_table_length; 167*0Sstevel@tonic-gate 168*0Sstevel@tonic-gate /* 169*0Sstevel@tonic-gate * Mutex associated with this structure 170*0Sstevel@tonic-gate */ 171*0Sstevel@tonic-gate kmutex_t hpc3130_mutex; 172*0Sstevel@tonic-gate 173*0Sstevel@tonic-gate /* 174*0Sstevel@tonic-gate * Trap interrupt cookie 175*0Sstevel@tonic-gate */ 176*0Sstevel@tonic-gate ddi_iblock_cookie_t ic_trap_cookie; 177*0Sstevel@tonic-gate 178*0Sstevel@tonic-gate /* 179*0Sstevel@tonic-gate * Open flag 180*0Sstevel@tonic-gate */ 181*0Sstevel@tonic-gate int hpc3130_oflag; 182*0Sstevel@tonic-gate 183*0Sstevel@tonic-gate /* 184*0Sstevel@tonic-gate * An integer field describing the type 185*0Sstevel@tonic-gate * of slots (PCI/SBD). 186*0Sstevel@tonic-gate */ 187*0Sstevel@tonic-gate hpc3130_slot_type_t slots_are; 188*0Sstevel@tonic-gate 189*0Sstevel@tonic-gate /* 190*0Sstevel@tonic-gate * A place to put the name of this driver 191*0Sstevel@tonic-gate * What gets put here is "hpc3130n" - where 192*0Sstevel@tonic-gate * n is the instance number. 193*0Sstevel@tonic-gate */ 194*0Sstevel@tonic-gate char hpc3130_name[16]; 195*0Sstevel@tonic-gate 196*0Sstevel@tonic-gate /* 197*0Sstevel@tonic-gate * The handle within the I2C nexus that this instance 198*0Sstevel@tonic-gate * represents. 199*0Sstevel@tonic-gate */ 200*0Sstevel@tonic-gate i2c_client_hdl_t hpc3130_hdl; 201*0Sstevel@tonic-gate 202*0Sstevel@tonic-gate /* 203*0Sstevel@tonic-gate * condition variable used to throttle power OK signal 204*0Sstevel@tonic-gate */ 205*0Sstevel@tonic-gate kcondvar_t hpc3130_cond; 206*0Sstevel@tonic-gate 207*0Sstevel@tonic-gate /* 208*0Sstevel@tonic-gate * Present vector - if B_TRUE there is a card in the corresponding 209*0Sstevel@tonic-gate * slot. 210*0Sstevel@tonic-gate */ 211*0Sstevel@tonic-gate boolean_t present[HPC3130_MAX_SLOT]; 212*0Sstevel@tonic-gate 213*0Sstevel@tonic-gate /* 214*0Sstevel@tonic-gate * Power vector - if B_TRUE, then power is applied to the slot 215*0Sstevel@tonic-gate */ 216*0Sstevel@tonic-gate boolean_t power[HPC3130_MAX_SLOT]; 217*0Sstevel@tonic-gate 218*0Sstevel@tonic-gate /* 219*0Sstevel@tonic-gate * Enable vector - if B_TRUE the slot is enabled. 220*0Sstevel@tonic-gate */ 221*0Sstevel@tonic-gate boolean_t enabled[HPC3130_MAX_SLOT]; 222*0Sstevel@tonic-gate 223*0Sstevel@tonic-gate /* 224*0Sstevel@tonic-gate * LED state indicators. 225*0Sstevel@tonic-gate */ 226*0Sstevel@tonic-gate char fault_led[HPC3130_MAX_SLOT]; 227*0Sstevel@tonic-gate char ok2rem_led[HPC3130_MAX_SLOT]; 228*0Sstevel@tonic-gate 229*0Sstevel@tonic-gate /* For poll(9e)/ioctl(HPC3130_GET_SOFT_EVENT */ 230*0Sstevel@tonic-gate uint_t events[HPC3130_MAX_SLOT]; 231*0Sstevel@tonic-gate pollhead_t pollhead[HPC3130_MAX_SLOT]; 232*0Sstevel@tonic-gate }; 233*0Sstevel@tonic-gate 234*0Sstevel@tonic-gate typedef struct hpc3130_unit hpc3130_unit_t; 235*0Sstevel@tonic-gate 236*0Sstevel@tonic-gate #endif /* _KERNEL */ 237*0Sstevel@tonic-gate 238*0Sstevel@tonic-gate #ifdef __cplusplus 239*0Sstevel@tonic-gate } 240*0Sstevel@tonic-gate #endif 241*0Sstevel@tonic-gate 242*0Sstevel@tonic-gate #endif /* _SYS_HPC3130_DAK_H */ 243