xref: /onnv-gate/usr/src/uts/sun4/sys/sudev.h (revision 52:ae9d7b7b47b4)
1*52Sdf157793 /*
2*52Sdf157793  * CDDL HEADER START
3*52Sdf157793  *
4*52Sdf157793  * The contents of this file are subject to the terms of the
5*52Sdf157793  * Common Development and Distribution License, Version 1.0 only
6*52Sdf157793  * (the "License").  You may not use this file except in compliance
7*52Sdf157793  * with the License.
8*52Sdf157793  *
9*52Sdf157793  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10*52Sdf157793  * or http://www.opensolaris.org/os/licensing.
11*52Sdf157793  * See the License for the specific language governing permissions
12*52Sdf157793  * and limitations under the License.
13*52Sdf157793  *
14*52Sdf157793  * When distributing Covered Code, include this CDDL HEADER in each
15*52Sdf157793  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16*52Sdf157793  * If applicable, add the following below this CDDL HEADER, with the
17*52Sdf157793  * fields enclosed by brackets "[]" replaced with your own identifying
18*52Sdf157793  * information: Portions Copyright [yyyy] [name of copyright owner]
19*52Sdf157793  *
20*52Sdf157793  * CDDL HEADER END
21*52Sdf157793  */
22*52Sdf157793 /*	Copyright (c) 1990, 1991 UNIX System Laboratories, Inc.	*/
23*52Sdf157793 /*	Copyright (c) 1984, 1986, 1987, 1988, 1989, 1990 AT&T	*/
24*52Sdf157793 /*	  All Rights Reserved 	*/
25*52Sdf157793 
26*52Sdf157793 /*
27*52Sdf157793  * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
28*52Sdf157793  * Use is subject to license terms.
29*52Sdf157793  */
30*52Sdf157793 
31*52Sdf157793 #ifndef	_SYS_SUDEV_H
32*52Sdf157793 #define	_SYS_SUDEV_H
33*52Sdf157793 
34*52Sdf157793 #pragma ident	"%Z%%M%	%I%	%E% SMI"
35*52Sdf157793 
36*52Sdf157793 #ifdef __cplusplus
37*52Sdf157793 extern "C" {
38*52Sdf157793 #endif
39*52Sdf157793 
40*52Sdf157793 #include <sys/tty.h>
41*52Sdf157793 #include <sys/ksynch.h>
42*52Sdf157793 #include <sys/dditypes.h>
43*52Sdf157793 #include <sys/types.h>
44*52Sdf157793 #include <sys/kstat.h>
45*52Sdf157793 
46*52Sdf157793 /*
47*52Sdf157793  * Definitions for INS8250 / 16550  chips
48*52Sdf157793  */
49*52Sdf157793 
50*52Sdf157793 /* defined as offsets from the data register */
51*52Sdf157793 #define	DAT		0 	/* receive/transmit data */
52*52Sdf157793 #define	ICR		1  	/* interrupt control register */
53*52Sdf157793 #define	ISR		2   	/* interrupt status register */
54*52Sdf157793 #define	LCR		3   	/* line control register */
55*52Sdf157793 #define	MCR		4   	/* modem control register */
56*52Sdf157793 #define	LSR		5   	/* line status register */
57*52Sdf157793 #define	MSR		6   	/* modem status register */
58*52Sdf157793 #define	DLL		0   	/* divisor latch (lsb) */
59*52Sdf157793 #define	DLH		1   	/* divisor latch (msb) */
60*52Sdf157793 #define	FIFOR		ISR	/* FIFO register for 16550 */
61*52Sdf157793 #define	OUTB(offset, value)	ddi_put8(asy->asy_handle, \
62*52Sdf157793 				    asy->asy_ioaddr+offset, value)
63*52Sdf157793 #define	INB(offset)	ddi_get8(asy->asy_handle, asy->asy_ioaddr+offset)
64*52Sdf157793 
65*52Sdf157793 /*
66*52Sdf157793  * INTEL 8210-A/B & 16450/16550 Registers Structure.
67*52Sdf157793  */
68*52Sdf157793 
69*52Sdf157793 /* Line Control Register */
70*52Sdf157793 #define	WLS0		0x01	/* word length select bit 0 */
71*52Sdf157793 #define	WLS1		0x02	/* word length select bit 2 */
72*52Sdf157793 #define	STB		0x04	/* number of stop bits */
73*52Sdf157793 #define	PEN		0x08	/* parity enable */
74*52Sdf157793 #define	EPS		0x10	/* even parity select */
75*52Sdf157793 #define	SETBREAK 	0x40	/* break key */
76*52Sdf157793 #define	DLAB		0x80	/* divisor latch access bit */
77*52Sdf157793 #define	RXLEN   	0x03   	/* # of data bits per received/xmitted char */
78*52Sdf157793 #define	STOP1   	0x00
79*52Sdf157793 #define	STOP2   	0x04
80*52Sdf157793 #define	PAREN   	0x08
81*52Sdf157793 #define	PAREVN  	0x10
82*52Sdf157793 #define	PARMARK 	0x20
83*52Sdf157793 #define	SNDBRK  	0x40
84*52Sdf157793 
85*52Sdf157793 
86*52Sdf157793 #define	BITS5		0x00	/* 5 bits per char */
87*52Sdf157793 #define	BITS6		0x01	/* 6 bits per char */
88*52Sdf157793 #define	BITS7		0x02	/* 7 bits per char */
89*52Sdf157793 #define	BITS8		0x03	/* 8 bits per char */
90*52Sdf157793 
91*52Sdf157793 /* baud rate definitions */
92*52Sdf157793 #define	ASY110		1047	/* 110 baud rate for serial console */
93*52Sdf157793 #define	ASY150		768	/* 150 baud rate for serial console */
94*52Sdf157793 #define	ASY300		384	/* 300 baud rate for serial console */
95*52Sdf157793 #define	ASY600		192	/* 600 baud rate for serial console */
96*52Sdf157793 #define	ASY1200		96	/* 1200 baud rate for serial console */
97*52Sdf157793 #define	ASY2400		48	/* 2400 baud rate for serial console */
98*52Sdf157793 #define	ASY4800		24	/* 4800 baud rate for serial console */
99*52Sdf157793 #define	ASY9600		12	/* 9600 baud rate for serial console */
100*52Sdf157793 
101*52Sdf157793 /* Line Status Register */
102*52Sdf157793 #define	RCA		0x01	/* data ready */
103*52Sdf157793 #define	OVRRUN		0x02	/* overrun error */
104*52Sdf157793 #define	PARERR		0x04	/* parity error */
105*52Sdf157793 #define	FRMERR		0x08	/* framing error */
106*52Sdf157793 #define	BRKDET  	0x10	/* a break has arrived */
107*52Sdf157793 #define	XHRE		0x20	/* tx hold reg is now empty */
108*52Sdf157793 #define	XSRE		0x40	/* tx shift reg is now empty */
109*52Sdf157793 #define	RFBE		0x80	/* rx FIFO Buffer error */
110*52Sdf157793 
111*52Sdf157793 /* Interrupt Id Regisger */
112*52Sdf157793 #define	MSTATUS		0x00	/* modem status changed */
113*52Sdf157793 #define	NOINTERRUPT	0x01	/* no interrupt pending */
114*52Sdf157793 #define	TxRDY		0x02	/* Transmitter Holding Register Empty */
115*52Sdf157793 #define	RxRDY		0x04	/* Receiver Data Available */
116*52Sdf157793 #define	FFTMOUT 	0x0c	/* FIFO timeout - 16550AF */
117*52Sdf157793 #define	RSTATUS 	0x06	/* Receiver Line Status */
118*52Sdf157793 
119*52Sdf157793 /* Interrupt Enable Register */
120*52Sdf157793 #define	RIEN		0x01	/* Received Data Ready */
121*52Sdf157793 #define	TIEN		0x02	/* Tx Hold Register Empty */
122*52Sdf157793 #define	SIEN		0x04	/* Receiver Line Status */
123*52Sdf157793 #define	MIEN		0x08	/* Modem Status */
124*52Sdf157793 
125*52Sdf157793 /* Modem Control Register */
126*52Sdf157793 #define	DTR		0x01	/* Data Terminal Ready */
127*52Sdf157793 #define	RTS		0x02	/* Request To Send */
128*52Sdf157793 #define	OUT1		0x04	/* Aux output - not used */
129*52Sdf157793 #define	OUT2		0x08	/* dis/enable int per INO on ALI1535D+ */
130*52Sdf157793 #define	ASY_LOOP	0x10	/* loopback for diagnostics */
131*52Sdf157793 
132*52Sdf157793 /* Modem Status Register */
133*52Sdf157793 #define	DCTS		0x01	/* Delta Clear To Send */
134*52Sdf157793 #define	DDSR		0x02	/* Delta Data Set Ready */
135*52Sdf157793 #define	DRI		0x04	/* Trail Edge Ring Indicator */
136*52Sdf157793 #define	DDCD		0x08	/* Delta Data Carrier Detect */
137*52Sdf157793 #define	CTS		0x10	/* Clear To Send */
138*52Sdf157793 #define	DSR		0x20	/* Data Set Ready */
139*52Sdf157793 #define	RI		0x40	/* Ring Indicator */
140*52Sdf157793 #define	DCD		0x80	/* Data Carrier Detect */
141*52Sdf157793 
142*52Sdf157793 #define	DELTAS(x)	((x)&(DCTS|DDSR|DRI|DDCD))
143*52Sdf157793 #define	STATES(x)	((x)(CTS|DSR|RI|DCD))
144*52Sdf157793 
145*52Sdf157793 /* flags for FCR (FIFO Control register) */
146*52Sdf157793 #define	FIFO_OFF	0x00	/* fifo disabled */
147*52Sdf157793 #define	FIFO_ON		0x01	/* fifo enabled */
148*52Sdf157793 #define	FIFOEN		0x8f	/* fifo enabled, w/ 8 byte trigger */
149*52Sdf157793 #define	FIFORCLR	0x8b	/* Clear receiver FIFO only */
150*52Sdf157793 
151*52Sdf157793 #define	FIFORXFLSH	0x02	/* flush receiver FIFO */
152*52Sdf157793 #define	FIFOTXFLSH	0x04	/* flush transmitter FIFO */
153*52Sdf157793 #define	FIFODMA		0x08	/* DMA mode 1 */
154*52Sdf157793 #define	FIFO_TRIG_1	0x00	/* 1 byte trigger level */
155*52Sdf157793 #define	FIFO_TRIG_4	0x40	/* 4 byte trigger level */
156*52Sdf157793 #define	FIFO_TRIG_8	0x80	/* 8 byte trigger level */
157*52Sdf157793 #define	FIFO_TRIG_14	0xC0	/* 14 byte trigger level */
158*52Sdf157793 
159*52Sdf157793 /*
160*52Sdf157793  * Defines for ioctl calls (VP/ix)
161*52Sdf157793  */
162*52Sdf157793 
163*52Sdf157793 #define	AIOC		('A'<<8)
164*52Sdf157793 #define	AIOCINTTYPE	(AIOC|60)	/* set interrupt type */
165*52Sdf157793 #define	AIOCDOSMODE	(AIOC|61)	/* set DOS mode */
166*52Sdf157793 #define	AIOCNONDOSMODE	(AIOC|62)	/* reset DOS mode */
167*52Sdf157793 #define	AIOCSERIALOUT	(AIOC|63)	/* serial device data write */
168*52Sdf157793 #define	AIOCSERIALIN	(AIOC|64)	/* serial device data read */
169*52Sdf157793 #define	AIOCSETSS	(AIOC|65)	/* set start/stop chars */
170*52Sdf157793 #define	AIOCINFO	(AIOC|66)	/* tell usr what device we are */
171*52Sdf157793 
172*52Sdf157793 /* Ioctl alternate names used by VP/ix */
173*52Sdf157793 #define	VPC_SERIAL_DOS		AIOCDOSMODE
174*52Sdf157793 #define	VPC_SERIAL_NONDOS	AIOCNONDOSMODE
175*52Sdf157793 #define	VPC_SERIAL_INFO		AIOCINFO
176*52Sdf157793 #define	VPC_SERIAL_OUT		AIOCSERIALOUT
177*52Sdf157793 #define	VPC_SERIAL_IN		AIOCSERIALIN
178*52Sdf157793 
179*52Sdf157793 /* Serial in/out requests */
180*52Sdf157793 #define	SO_DIVLLSB	1
181*52Sdf157793 #define	SO_DIVLMSB	2
182*52Sdf157793 #define	SO_LCR		3
183*52Sdf157793 #define	SO_MCR		4
184*52Sdf157793 #define	SI_MSR		1
185*52Sdf157793 #define	SIO_MASK(elem)		(1<<((elem)-1))
186*52Sdf157793 
187*52Sdf157793 #define	OVERRUN		040000
188*52Sdf157793 #define	FRERROR		020000
189*52Sdf157793 #define	PERROR		010000
190*52Sdf157793 #define	S_ERRORS	(PERROR|OVERRUN|FRERROR)
191*52Sdf157793 
192*52Sdf157793 /*
193*52Sdf157793  * Ring buffer and async line management definitions.
194*52Sdf157793  */
195*52Sdf157793 #define	RINGBITS	16		/* # of bits in ring ptrs */
196*52Sdf157793 #define	RINGSIZE	(1<<RINGBITS)   /* size of ring */
197*52Sdf157793 #define	RINGMASK	(RINGSIZE-1)
198*52Sdf157793 #define	RINGFRAC	12		/* fraction of ring to force flush */
199*52Sdf157793 
200*52Sdf157793 #define	RING_INIT(ap)  ((ap)->async_rput = (ap)->async_rget = 0)
201*52Sdf157793 #define	RING_CNT(ap)   (((ap)->async_rput - (ap)->async_rget) & RINGMASK)
202*52Sdf157793 #define	RING_FRAC(ap)  ((int)RING_CNT(ap) >= (int)(RINGSIZE/RINGFRAC))
203*52Sdf157793 #define	RING_POK(ap, n) ((int)RING_CNT(ap) < (int)(RINGSIZE-(n)))
204*52Sdf157793 #define	RING_PUT(ap, c) \
205*52Sdf157793 	((ap)->async_ring[(ap)->async_rput++ & RINGMASK] =  (uchar_t)(c))
206*52Sdf157793 #define	RING_UNPUT(ap) ((ap)->async_rput--)
207*52Sdf157793 #define	RING_GOK(ap, n) ((int)RING_CNT(ap) >= (int)(n))
208*52Sdf157793 #define	RING_GET(ap)   ((ap)->async_ring[(ap)->async_rget++ & RINGMASK])
209*52Sdf157793 #define	RING_EAT(ap, n) ((ap)->async_rget += (n))
210*52Sdf157793 #define	RING_MARK(ap, c, s) \
211*52Sdf157793 	((ap)->async_ring[(ap)->async_rput++ & RINGMASK] = ((uchar_t)(c)|(s)))
212*52Sdf157793 #define	RING_UNMARK(ap) \
213*52Sdf157793 	((ap)->async_ring[((ap)->async_rget) & RINGMASK] &= ~S_ERRORS)
214*52Sdf157793 #define	RING_ERR(ap, c) \
215*52Sdf157793 	((ap)->async_ring[((ap)->async_rget) & RINGMASK] & (c))
216*52Sdf157793 
217*52Sdf157793 /*
218*52Sdf157793  * Serial kstats structure and macro to increment an individual kstat
219*52Sdf157793  */
220*52Sdf157793 struct serial_kstats {
221*52Sdf157793 		kstat_named_t	ringover;	/* ring buffer overflow */
222*52Sdf157793 		kstat_named_t	siloover;	/* silo overflow */
223*52Sdf157793 };
224*52Sdf157793 
225*52Sdf157793 #define	INC64_KSTAT(asy, stat) (asy)->kstats.stat.value.ui64++;
226*52Sdf157793 
227*52Sdf157793 /*
228*52Sdf157793  * Hardware channel common data. One structure per port.
229*52Sdf157793  * Each of the fields in this structure is required to be protected by a
230*52Sdf157793  * mutex lock at the highest priority at which it can be altered.
231*52Sdf157793  * The asy_flags, and asy_next fields can be altered by interrupt
232*52Sdf157793  * handling code that must be protected by the mutex whose handle is
233*52Sdf157793  * stored in asy_excl_hi.  All others can be protected by the asy_excl
234*52Sdf157793  * mutex, which is lower priority and adaptive.
235*52Sdf157793  */
236*52Sdf157793 struct asycom {
237*52Sdf157793 	int		asy_flags;	/* random flags  */
238*52Sdf157793 					/* protected by asy_excl_hi lock */
239*52Sdf157793 	uint_t		asy_hwtype;	/* HW type: ASY82510, etc. */
240*52Sdf157793 	uint_t		asy_use_fifo;	/* HW FIFO use it or not ?? */
241*52Sdf157793 	uint_t		asy_fifo_buf;	/* With FIFO = 16, otherwise = 1 */
242*52Sdf157793 	uchar_t		*asy_ioaddr;	/* i/o address of ASY port */
243*52Sdf157793 	uint_t		asy_vect;	/* IRQ number */
244*52Sdf157793 	boolean_t	suspended;	/* TRUE if driver suspended */
245*52Sdf157793 	caddr_t		asy_priv;	/* protocol private data */
246*52Sdf157793 	dev_info_t	*asy_dip;	/* dev_info */
247*52Sdf157793 	long		asy_unit;	/* which port */
248*52Sdf157793 	ddi_iblock_cookie_t asy_iblock;
249*52Sdf157793 	kmutex_t	*asy_excl;	/* asy adaptive mutex */
250*52Sdf157793 	kmutex_t	*asy_excl_hi;	/* asy spinlock mutex */
251*52Sdf157793 	ddi_acc_handle_t asy_handle;    /* ddi_get/put handle */
252*52Sdf157793 	ushort_t	asy_rsc_console;	/* RSC console port */
253*52Sdf157793 	ushort_t	asy_rsc_control;	/* RSC control port */
254*52Sdf157793 	ushort_t	asy_lom_console;	/* LOM console port */
255*52Sdf157793 	uint_t		asy_xmit_count;	/* Count the no of xmits in one intr */
256*52Sdf157793 	uint_t		asy_out_of_band_xmit; /* Out of band xmission */
257*52Sdf157793 	uint_t		asy_rx_count;	/* No. of bytes rx'eved in one intr */
258*52Sdf157793 	uchar_t		asy_device_type; /* Currently used for this device */
259*52Sdf157793 	uchar_t		asy_trig_level;	/* Receive FIFO trig level */
260*52Sdf157793 	kmutex_t	*asy_soft_lock;	/* soft lock for gaurding softpend. */
261*52Sdf157793 	int		asysoftpend;	/* Flag indicating soft int pending. */
262*52Sdf157793 	ddi_softintr_t asy_softintr_id;
263*52Sdf157793 	ddi_iblock_cookie_t asy_soft_iblock;
264*52Sdf157793 	int		asy_baud_divisor_factor; /* for different chips */
265*52Sdf157793 	int		asy_ocflags; /* old cflags used in asy_program() */
266*52Sdf157793 	uint_t		asy_cached_msr; /* a cache for the MSR register */
267*52Sdf157793 	int		asy_speed_cap; /* maximum baud rate */
268*52Sdf157793 	kstat_t		*sukstat;	/* ptr to serial kstats */
269*52Sdf157793 	struct serial_kstats kstats;	/* serial kstats structure */
270*52Sdf157793 	boolean_t	inperim;	/* in streams q perimeter */
271*52Sdf157793 };
272*52Sdf157793 
273*52Sdf157793 /*
274*52Sdf157793  * Asychronous protocol private data structure for ASY.
275*52Sdf157793  * Each of the fields in the structure is required to be protected by
276*52Sdf157793  * the lower priority lock except the fields that are set only at
277*52Sdf157793  * base level but cleared (with out lock) at interrupt level.
278*52Sdf157793  */
279*52Sdf157793 struct asyncline {
280*52Sdf157793 	int		async_flags;	/* random flags */
281*52Sdf157793 	kcondvar_t	async_flags_cv; /* condition variable for flags */
282*52Sdf157793 	dev_t		async_dev;	/* device major/minor numbers */
283*52Sdf157793 	mblk_t		*async_xmitblk;	/* transmit: active msg block */
284*52Sdf157793 	struct asycom	*async_common;	/* device common data */
285*52Sdf157793 	tty_common_t 	async_ttycommon; /* tty driver common data */
286*52Sdf157793 	bufcall_id_t	async_wbufcid;	/* id for pending write-side bufcall */
287*52Sdf157793 	timeout_id_t	async_polltid;	/* softint poll timeout id */
288*52Sdf157793 
289*52Sdf157793 	/*
290*52Sdf157793 	 * The following fields are protected by the asy_excl_hi lock.
291*52Sdf157793 	 * Some, such as async_flowc, are set only at the base level and
292*52Sdf157793 	 * cleared (without the lock) only by the interrupt level.
293*52Sdf157793 	 */
294*52Sdf157793 	uchar_t		*async_optr;	/* output pointer */
295*52Sdf157793 	int		async_ocnt;	/* output count */
296*52Sdf157793 	uint_t		async_rput;	/* producing pointer for input */
297*52Sdf157793 	uint_t		async_rget;	/* consuming pointer for input */
298*52Sdf157793 	uchar_t		async_flowc;	/* flow control char to send */
299*52Sdf157793 
300*52Sdf157793 	/*
301*52Sdf157793 	 * Each character stuffed into the ring has two bytes associated
302*52Sdf157793 	 * with it.  The first byte is used to indicate special conditions
303*52Sdf157793 	 * and the second byte is the actual data.  The ring buffer
304*52Sdf157793 	 * needs to be defined as ushort_t to accomodate this.
305*52Sdf157793 	 */
306*52Sdf157793 	ushort_t	async_ring[RINGSIZE];
307*52Sdf157793 
308*52Sdf157793 	short		async_break;	/* break count */
309*52Sdf157793 
310*52Sdf157793 	union {
311*52Sdf157793 		struct {
312*52Sdf157793 			uchar_t _hw;	/* overrun (hw) */
313*52Sdf157793 			uchar_t _sw;	/* overrun (sw) */
314*52Sdf157793 		} _a;
315*52Sdf157793 		ushort_t uover_overrun;
316*52Sdf157793 	} async_uover;
317*52Sdf157793 #define	async_overrun		async_uover._a.uover_overrun
318*52Sdf157793 #define	async_hw_overrun	async_uover._a._hw
319*52Sdf157793 #define	async_sw_overrun	async_uover._a._sw
320*52Sdf157793 	short		async_ext;	/* modem status change count */
321*52Sdf157793 	short		async_work;	/* work to do flag */
322*52Sdf157793 	uchar_t		async_queue_full; /* Streams Queue Full */
323*52Sdf157793 	uchar_t		async_ringbuf_overflow; /* when ring buffer overflows */
324*52Sdf157793 	timeout_id_t	async_timer;	/* close drain progress timer */
325*52Sdf157793 };
326*52Sdf157793 
327*52Sdf157793 /* definitions for async_flags field */
328*52Sdf157793 #define	ASYNC_EXCL_OPEN	 0x10000000	/* exclusive open */
329*52Sdf157793 #define	ASYNC_WOPEN	 0x00000001	/* waiting for open to complete */
330*52Sdf157793 #define	ASYNC_ISOPEN	 0x00000002	/* open is complete */
331*52Sdf157793 #define	ASYNC_OUT	 0x00000004	/* line being used for dialout */
332*52Sdf157793 #define	ASYNC_CARR_ON	 0x00000008	/* carrier on last time we looked */
333*52Sdf157793 #define	ASYNC_STOPPED	 0x00000010	/* output is stopped */
334*52Sdf157793 #define	ASYNC_DELAY	 0x00000020	/* waiting for delay to finish */
335*52Sdf157793 #define	ASYNC_BREAK	 0x00000040	/* waiting for break to finish */
336*52Sdf157793 #define	ASYNC_BUSY	 0x00000080	/* waiting for transmission to finish */
337*52Sdf157793 #define	ASYNC_DRAINING	 0x00000100	/* waiting for output to drain */
338*52Sdf157793 #define	ASYNC_SERVICEIMM 0x00000200	/* queue soft interrupt as soon as */
339*52Sdf157793 #define	ASYNC_HW_IN_FLOW 0x00000400	/* input flow control in effect */
340*52Sdf157793 #define	ASYNC_HW_OUT_FLW 0x00000800	/* output flow control in effect */
341*52Sdf157793 #define	ASYNC_PROGRESS	 0x00001000	/* made progress on output effort */
342*52Sdf157793 #define	ASYNC_CLOSING	 0x00002000	/* closing the stream */
343*52Sdf157793 
344*52Sdf157793 /* asy_hwtype definitions */
345*52Sdf157793 #define	ASY82510	0x1
346*52Sdf157793 #define	ASY16550AF	0x2
347*52Sdf157793 #define	ASY8250		0x3		/* 8250 or 16450 or 16550 */
348*52Sdf157793 
349*52Sdf157793 /* definitions for asy_flags field */
350*52Sdf157793 #define	ASY_NEEDSOFT	0x00000001
351*52Sdf157793 #define	ASY_DOINGSOFT	0x00000002
352*52Sdf157793 #define	ASY_PPS		0x00000004
353*52Sdf157793 #define	ASY_PPS_EDGE	0x00000008
354*52Sdf157793 #define	ASY_IGNORE_CD	0x00000040
355*52Sdf157793 
356*52Sdf157793 /*
357*52Sdf157793  * Different devices this driver supports and what it is used to drive
358*52Sdf157793  * currently
359*52Sdf157793  */
360*52Sdf157793 #define	ASY_KEYBOARD 	0x01
361*52Sdf157793 #define	ASY_MOUSE	0x02
362*52Sdf157793 #define	ASY_SERIAL	0x03
363*52Sdf157793 
364*52Sdf157793 /*
365*52Sdf157793  * RSC_DEVICE defines the bit in the minor device number that specifies
366*52Sdf157793  * the tty line is to be used for console/controlling a RSC device.
367*52Sdf157793  */
368*52Sdf157793 #define	RSC_DEVICE	(1 << (NBITSMINOR32 - 4))
369*52Sdf157793 
370*52Sdf157793 /*
371*52Sdf157793  * OUTLINE defines the high-order flag bit in the minor device number that
372*52Sdf157793  * controls use of a tty line for dialin and dialout simultaneously.
373*52Sdf157793  */
374*52Sdf157793 #define	OUTLINE		(1 << (NBITSMINOR32 - 1))
375*52Sdf157793 #define	UNIT(x)		(getminor(x) & ~(OUTLINE | RSC_DEVICE))
376*52Sdf157793 
377*52Sdf157793 /* suggested number of soft state instances */
378*52Sdf157793 #define	SU_INITIAL_SOFT_ITEMS	0x02
379*52Sdf157793 
380*52Sdf157793 /*
381*52Sdf157793  * ASYSETSOFT macro to pend a soft interrupt if one isn't already pending.
382*52Sdf157793  */
383*52Sdf157793 
384*52Sdf157793 #define	ASYSETSOFT(asy)	{		\
385*52Sdf157793 	if (mutex_tryenter(asy->asy_soft_lock)) {	\
386*52Sdf157793 		asy->asy_flags |= ASY_NEEDSOFT;	\
387*52Sdf157793 		if (!asy->asysoftpend) {		\
388*52Sdf157793 			asy->asysoftpend = 1;	\
389*52Sdf157793 			mutex_exit(asy->asy_soft_lock);\
390*52Sdf157793 			ddi_trigger_softintr(asy->asy_softintr_id);\
391*52Sdf157793 		} else					\
392*52Sdf157793 			mutex_exit(asy->asy_soft_lock);\
393*52Sdf157793 	}						\
394*52Sdf157793 }
395*52Sdf157793 
396*52Sdf157793 #ifdef __cplusplus
397*52Sdf157793 }
398*52Sdf157793 #endif
399*52Sdf157793 
400*52Sdf157793 #endif	/* _SYS_SUDEV_H */
401