10Sstevel@tonic-gate /* 20Sstevel@tonic-gate * CDDL HEADER START 30Sstevel@tonic-gate * 40Sstevel@tonic-gate * The contents of this file are subject to the terms of the 50Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 60Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 70Sstevel@tonic-gate * with the License. 80Sstevel@tonic-gate * 90Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 100Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 110Sstevel@tonic-gate * See the License for the specific language governing permissions 120Sstevel@tonic-gate * and limitations under the License. 130Sstevel@tonic-gate * 140Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 150Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 160Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 170Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 180Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 190Sstevel@tonic-gate * 200Sstevel@tonic-gate * CDDL HEADER END 210Sstevel@tonic-gate */ 220Sstevel@tonic-gate /* 230Sstevel@tonic-gate * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 240Sstevel@tonic-gate * Use is subject to license terms. 250Sstevel@tonic-gate */ 260Sstevel@tonic-gate 270Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 280Sstevel@tonic-gate 290Sstevel@tonic-gate #include <sys/types.h> 300Sstevel@tonic-gate #include <sys/kstat.h> 310Sstevel@tonic-gate #include <sys/param.h> 320Sstevel@tonic-gate #include <sys/stack.h> 330Sstevel@tonic-gate #include <sys/regset.h> 340Sstevel@tonic-gate #include <sys/thread.h> 350Sstevel@tonic-gate #include <sys/proc.h> 360Sstevel@tonic-gate #include <sys/procfs_isa.h> 370Sstevel@tonic-gate #include <sys/kmem.h> 380Sstevel@tonic-gate #include <sys/cpuvar.h> 390Sstevel@tonic-gate #include <sys/systm.h> 400Sstevel@tonic-gate #include <sys/machpcb.h> 410Sstevel@tonic-gate #include <sys/machasi.h> 420Sstevel@tonic-gate #include <sys/vis.h> 430Sstevel@tonic-gate #include <sys/fpu/fpusystm.h> 440Sstevel@tonic-gate #include <sys/cpu_module.h> 450Sstevel@tonic-gate #include <sys/privregs.h> 460Sstevel@tonic-gate #include <sys/archsystm.h> 470Sstevel@tonic-gate #include <sys/atomic.h> 480Sstevel@tonic-gate #include <sys/cmn_err.h> 490Sstevel@tonic-gate #include <sys/time.h> 500Sstevel@tonic-gate #include <sys/clock.h> 510Sstevel@tonic-gate #include <sys/chip.h> 520Sstevel@tonic-gate #include <sys/cmp.h> 530Sstevel@tonic-gate #include <sys/platform_module.h> 540Sstevel@tonic-gate #include <sys/bl.h> 550Sstevel@tonic-gate #include <sys/nvpair.h> 560Sstevel@tonic-gate #include <sys/kdi_impl.h> 570Sstevel@tonic-gate #include <sys/machsystm.h> 580Sstevel@tonic-gate #include <sys/sysmacros.h> 590Sstevel@tonic-gate #include <sys/promif.h> 600Sstevel@tonic-gate #include <sys/pool_pset.h> 610Sstevel@tonic-gate 620Sstevel@tonic-gate int maxphys = MMU_PAGESIZE * 16; /* 128k */ 630Sstevel@tonic-gate int klustsize = MMU_PAGESIZE * 16; /* 128k */ 640Sstevel@tonic-gate 650Sstevel@tonic-gate /* 660Sstevel@tonic-gate * Initialize kernel thread's stack. 670Sstevel@tonic-gate */ 680Sstevel@tonic-gate caddr_t 690Sstevel@tonic-gate thread_stk_init(caddr_t stk) 700Sstevel@tonic-gate { 710Sstevel@tonic-gate kfpu_t *fp; 720Sstevel@tonic-gate ulong_t align; 730Sstevel@tonic-gate 740Sstevel@tonic-gate /* allocate extra space for floating point state */ 750Sstevel@tonic-gate stk -= SA(sizeof (kfpu_t) + GSR_SIZE); 760Sstevel@tonic-gate align = (uintptr_t)stk & 0x3f; 770Sstevel@tonic-gate stk -= align; /* force v9_fpu to be 16 byte aligned */ 780Sstevel@tonic-gate fp = (kfpu_t *)stk; 790Sstevel@tonic-gate fp->fpu_fprs = 0; 800Sstevel@tonic-gate 810Sstevel@tonic-gate stk -= SA(MINFRAME); 820Sstevel@tonic-gate return (stk); 830Sstevel@tonic-gate } 840Sstevel@tonic-gate 850Sstevel@tonic-gate /* 860Sstevel@tonic-gate * Initialize lwp's kernel stack. 870Sstevel@tonic-gate * Note that now that the floating point register save area (kfpu_t) 880Sstevel@tonic-gate * has been broken out from machpcb and aligned on a 64 byte boundary so that 890Sstevel@tonic-gate * we can do block load/stores to/from it, there are a couple of potential 900Sstevel@tonic-gate * optimizations to save stack space. 1. The floating point register save 910Sstevel@tonic-gate * area could be aligned on a 16 byte boundary, and the floating point code 920Sstevel@tonic-gate * changed to (a) check the alignment and (b) use different save/restore 930Sstevel@tonic-gate * macros depending upon the alignment. 2. The lwp_stk_init code below 940Sstevel@tonic-gate * could be changed to calculate if less space would be wasted if machpcb 950Sstevel@tonic-gate * was first instead of second. However there is a REGOFF macro used in 960Sstevel@tonic-gate * locore, syscall_trap, machdep and mlsetup that assumes that the saved 970Sstevel@tonic-gate * register area is a fixed distance from the %sp, and would have to be 980Sstevel@tonic-gate * changed to a pointer or something...JJ said later. 990Sstevel@tonic-gate */ 1000Sstevel@tonic-gate caddr_t 1010Sstevel@tonic-gate lwp_stk_init(klwp_t *lwp, caddr_t stk) 1020Sstevel@tonic-gate { 1030Sstevel@tonic-gate struct machpcb *mpcb; 1040Sstevel@tonic-gate kfpu_t *fp; 1050Sstevel@tonic-gate uintptr_t aln; 1060Sstevel@tonic-gate 1070Sstevel@tonic-gate stk -= SA(sizeof (kfpu_t) + GSR_SIZE); 1080Sstevel@tonic-gate aln = (uintptr_t)stk & 0x3F; 1090Sstevel@tonic-gate stk -= aln; 1100Sstevel@tonic-gate fp = (kfpu_t *)stk; 1110Sstevel@tonic-gate stk -= SA(sizeof (struct machpcb)); 1120Sstevel@tonic-gate mpcb = (struct machpcb *)stk; 1130Sstevel@tonic-gate bzero(mpcb, sizeof (struct machpcb)); 1140Sstevel@tonic-gate bzero(fp, sizeof (kfpu_t) + GSR_SIZE); 1150Sstevel@tonic-gate lwp->lwp_regs = (void *)&mpcb->mpcb_regs; 1160Sstevel@tonic-gate lwp->lwp_fpu = (void *)fp; 1170Sstevel@tonic-gate mpcb->mpcb_fpu = fp; 1180Sstevel@tonic-gate mpcb->mpcb_fpu->fpu_q = mpcb->mpcb_fpu_q; 1190Sstevel@tonic-gate mpcb->mpcb_thread = lwp->lwp_thread; 1200Sstevel@tonic-gate mpcb->mpcb_wbcnt = 0; 1210Sstevel@tonic-gate if (lwp->lwp_procp->p_model == DATAMODEL_ILP32) { 1220Sstevel@tonic-gate mpcb->mpcb_wstate = WSTATE_USER32; 1230Sstevel@tonic-gate mpcb->mpcb_wbuf = kmem_alloc(MAXWIN * sizeof (struct rwindow32), 1240Sstevel@tonic-gate KM_SLEEP); 1250Sstevel@tonic-gate } else { 1260Sstevel@tonic-gate mpcb->mpcb_wstate = WSTATE_USER64; 1270Sstevel@tonic-gate mpcb->mpcb_wbuf = kmem_alloc(MAXWIN * sizeof (struct rwindow64), 1280Sstevel@tonic-gate KM_SLEEP); 1290Sstevel@tonic-gate } 1300Sstevel@tonic-gate ASSERT(((uintptr_t)mpcb->mpcb_wbuf & 7) == 0); 1310Sstevel@tonic-gate mpcb->mpcb_wbuf_pa = va_to_pa(mpcb->mpcb_wbuf); 1320Sstevel@tonic-gate mpcb->mpcb_pa = va_to_pa(mpcb); 1330Sstevel@tonic-gate return (stk); 1340Sstevel@tonic-gate } 1350Sstevel@tonic-gate 1360Sstevel@tonic-gate void 1370Sstevel@tonic-gate lwp_stk_fini(klwp_t *lwp) 1380Sstevel@tonic-gate { 1390Sstevel@tonic-gate struct machpcb *mpcb = lwptompcb(lwp); 1400Sstevel@tonic-gate 1410Sstevel@tonic-gate /* 1420Sstevel@tonic-gate * there might be windows still in the wbuf due to unmapped 1430Sstevel@tonic-gate * stack, misaligned stack pointer, etc. We just free it. 1440Sstevel@tonic-gate */ 1450Sstevel@tonic-gate mpcb->mpcb_wbcnt = 0; 1460Sstevel@tonic-gate if (mpcb->mpcb_wstate == WSTATE_USER32) 1470Sstevel@tonic-gate kmem_free(mpcb->mpcb_wbuf, MAXWIN * sizeof (struct rwindow32)); 1480Sstevel@tonic-gate else 1490Sstevel@tonic-gate kmem_free(mpcb->mpcb_wbuf, MAXWIN * sizeof (struct rwindow64)); 1500Sstevel@tonic-gate mpcb->mpcb_wbuf = NULL; 1510Sstevel@tonic-gate mpcb->mpcb_wbuf_pa = -1; 1520Sstevel@tonic-gate } 1530Sstevel@tonic-gate 1540Sstevel@tonic-gate 1550Sstevel@tonic-gate /* 1560Sstevel@tonic-gate * Copy regs from parent to child. 1570Sstevel@tonic-gate */ 1580Sstevel@tonic-gate void 1590Sstevel@tonic-gate lwp_forkregs(klwp_t *lwp, klwp_t *clwp) 1600Sstevel@tonic-gate { 1610Sstevel@tonic-gate kthread_t *t, *pt = lwptot(lwp); 1620Sstevel@tonic-gate struct machpcb *mpcb = lwptompcb(clwp); 1630Sstevel@tonic-gate struct machpcb *pmpcb = lwptompcb(lwp); 1640Sstevel@tonic-gate kfpu_t *fp, *pfp = lwptofpu(lwp); 1650Sstevel@tonic-gate caddr_t wbuf; 1660Sstevel@tonic-gate uint_t wstate; 1670Sstevel@tonic-gate 1680Sstevel@tonic-gate t = mpcb->mpcb_thread; 1690Sstevel@tonic-gate /* 1700Sstevel@tonic-gate * remember child's fp and wbuf since they will get erased during 1710Sstevel@tonic-gate * the bcopy. 1720Sstevel@tonic-gate */ 1730Sstevel@tonic-gate fp = mpcb->mpcb_fpu; 1740Sstevel@tonic-gate wbuf = mpcb->mpcb_wbuf; 1750Sstevel@tonic-gate wstate = mpcb->mpcb_wstate; 1760Sstevel@tonic-gate /* 1770Sstevel@tonic-gate * Don't copy mpcb_frame since we hand-crafted it 1780Sstevel@tonic-gate * in thread_load(). 1790Sstevel@tonic-gate */ 1800Sstevel@tonic-gate bcopy(lwp->lwp_regs, clwp->lwp_regs, sizeof (struct machpcb) - REGOFF); 1810Sstevel@tonic-gate mpcb->mpcb_thread = t; 1820Sstevel@tonic-gate mpcb->mpcb_fpu = fp; 1830Sstevel@tonic-gate fp->fpu_q = mpcb->mpcb_fpu_q; 1840Sstevel@tonic-gate 1850Sstevel@tonic-gate /* 1860Sstevel@tonic-gate * It is theoretically possibly for the lwp's wstate to 1870Sstevel@tonic-gate * be different from its value assigned in lwp_stk_init, 1880Sstevel@tonic-gate * since lwp_stk_init assumed the data model of the process. 1890Sstevel@tonic-gate * Here, we took on the data model of the cloned lwp. 1900Sstevel@tonic-gate */ 1910Sstevel@tonic-gate if (mpcb->mpcb_wstate != wstate) { 1920Sstevel@tonic-gate size_t osize, size; 1930Sstevel@tonic-gate 1940Sstevel@tonic-gate if (wstate == WSTATE_USER32) { 1950Sstevel@tonic-gate osize = MAXWIN * sizeof (struct rwindow32); 1960Sstevel@tonic-gate size = MAXWIN * sizeof (struct rwindow64); 1970Sstevel@tonic-gate wstate = WSTATE_USER64; 1980Sstevel@tonic-gate } else { 1990Sstevel@tonic-gate osize = MAXWIN * sizeof (struct rwindow64); 2000Sstevel@tonic-gate size = MAXWIN * sizeof (struct rwindow32); 2010Sstevel@tonic-gate wstate = WSTATE_USER32; 2020Sstevel@tonic-gate } 2030Sstevel@tonic-gate kmem_free(wbuf, osize); 2040Sstevel@tonic-gate wbuf = kmem_alloc(size, KM_SLEEP); 2050Sstevel@tonic-gate } 2060Sstevel@tonic-gate 2070Sstevel@tonic-gate mpcb->mpcb_pa = va_to_pa(mpcb); 2080Sstevel@tonic-gate mpcb->mpcb_wbuf = wbuf; 2090Sstevel@tonic-gate mpcb->mpcb_wbuf_pa = va_to_pa(wbuf); 2100Sstevel@tonic-gate 2110Sstevel@tonic-gate ASSERT(mpcb->mpcb_wstate == wstate); 2120Sstevel@tonic-gate 2130Sstevel@tonic-gate if (mpcb->mpcb_wbcnt != 0) { 2140Sstevel@tonic-gate bcopy(pmpcb->mpcb_wbuf, mpcb->mpcb_wbuf, 2150Sstevel@tonic-gate mpcb->mpcb_wbcnt * ((mpcb->mpcb_wstate == WSTATE_USER32) ? 2160Sstevel@tonic-gate sizeof (struct rwindow32) : sizeof (struct rwindow64))); 2170Sstevel@tonic-gate } 2180Sstevel@tonic-gate 2190Sstevel@tonic-gate if (pt == curthread) 2200Sstevel@tonic-gate pfp->fpu_fprs = _fp_read_fprs(); 2210Sstevel@tonic-gate if ((pfp->fpu_en) || (pfp->fpu_fprs & FPRS_FEF)) { 2220Sstevel@tonic-gate if (pt == curthread && fpu_exists) { 2230Sstevel@tonic-gate save_gsr(clwp->lwp_fpu); 2240Sstevel@tonic-gate } else { 2250Sstevel@tonic-gate uint64_t gsr; 2260Sstevel@tonic-gate gsr = get_gsr(lwp->lwp_fpu); 2270Sstevel@tonic-gate set_gsr(gsr, clwp->lwp_fpu); 2280Sstevel@tonic-gate } 2290Sstevel@tonic-gate fp_fork(lwp, clwp); 2300Sstevel@tonic-gate } 2310Sstevel@tonic-gate } 2320Sstevel@tonic-gate 2330Sstevel@tonic-gate /* 2340Sstevel@tonic-gate * Free lwp fpu regs. 2350Sstevel@tonic-gate */ 2360Sstevel@tonic-gate void 2370Sstevel@tonic-gate lwp_freeregs(klwp_t *lwp, int isexec) 2380Sstevel@tonic-gate { 2390Sstevel@tonic-gate kfpu_t *fp = lwptofpu(lwp); 2400Sstevel@tonic-gate 2410Sstevel@tonic-gate if (lwptot(lwp) == curthread) 2420Sstevel@tonic-gate fp->fpu_fprs = _fp_read_fprs(); 2430Sstevel@tonic-gate if ((fp->fpu_en) || (fp->fpu_fprs & FPRS_FEF)) 2440Sstevel@tonic-gate fp_free(fp, isexec); 2450Sstevel@tonic-gate } 2460Sstevel@tonic-gate 2470Sstevel@tonic-gate /* 2480Sstevel@tonic-gate * fill in the extra register state area specified with the 2490Sstevel@tonic-gate * specified lwp's platform-dependent non-floating-point extra 2500Sstevel@tonic-gate * register state information 2510Sstevel@tonic-gate */ 2520Sstevel@tonic-gate /* ARGSUSED */ 2530Sstevel@tonic-gate void 2540Sstevel@tonic-gate xregs_getgfiller(klwp_id_t lwp, caddr_t xrp) 2550Sstevel@tonic-gate { 2560Sstevel@tonic-gate /* for sun4u nothing to do here, added for symmetry */ 2570Sstevel@tonic-gate } 2580Sstevel@tonic-gate 2590Sstevel@tonic-gate /* 2600Sstevel@tonic-gate * fill in the extra register state area specified with the specified lwp's 2610Sstevel@tonic-gate * platform-dependent floating-point extra register state information. 2620Sstevel@tonic-gate * NOTE: 'lwp' might not correspond to 'curthread' since this is 2630Sstevel@tonic-gate * called from code in /proc to get the registers of another lwp. 2640Sstevel@tonic-gate */ 2650Sstevel@tonic-gate void 2660Sstevel@tonic-gate xregs_getfpfiller(klwp_id_t lwp, caddr_t xrp) 2670Sstevel@tonic-gate { 2680Sstevel@tonic-gate prxregset_t *xregs = (prxregset_t *)xrp; 2690Sstevel@tonic-gate kfpu_t *fp = lwptofpu(lwp); 2700Sstevel@tonic-gate uint32_t fprs = (FPRS_FEF|FPRS_DU|FPRS_DL); 2710Sstevel@tonic-gate uint64_t gsr; 2720Sstevel@tonic-gate 2730Sstevel@tonic-gate /* 2740Sstevel@tonic-gate * fp_fksave() does not flush the GSR register into 2750Sstevel@tonic-gate * the lwp area, so do it now 2760Sstevel@tonic-gate */ 2770Sstevel@tonic-gate kpreempt_disable(); 2780Sstevel@tonic-gate if (ttolwp(curthread) == lwp && fpu_exists) { 2790Sstevel@tonic-gate fp->fpu_fprs = _fp_read_fprs(); 2800Sstevel@tonic-gate if ((fp->fpu_fprs & FPRS_FEF) != FPRS_FEF) { 2810Sstevel@tonic-gate _fp_write_fprs(fprs); 2820Sstevel@tonic-gate fp->fpu_fprs = (V9_FPU_FPRS_TYPE)fprs; 2830Sstevel@tonic-gate } 2840Sstevel@tonic-gate save_gsr(fp); 2850Sstevel@tonic-gate } 2860Sstevel@tonic-gate gsr = get_gsr(fp); 2870Sstevel@tonic-gate kpreempt_enable(); 2880Sstevel@tonic-gate PRXREG_GSR(xregs) = gsr; 2890Sstevel@tonic-gate } 2900Sstevel@tonic-gate 2910Sstevel@tonic-gate /* 2920Sstevel@tonic-gate * set the specified lwp's platform-dependent non-floating-point 2930Sstevel@tonic-gate * extra register state based on the specified input 2940Sstevel@tonic-gate */ 2950Sstevel@tonic-gate /* ARGSUSED */ 2960Sstevel@tonic-gate void 2970Sstevel@tonic-gate xregs_setgfiller(klwp_id_t lwp, caddr_t xrp) 2980Sstevel@tonic-gate { 2990Sstevel@tonic-gate /* for sun4u nothing to do here, added for symmetry */ 3000Sstevel@tonic-gate } 3010Sstevel@tonic-gate 3020Sstevel@tonic-gate /* 3030Sstevel@tonic-gate * set the specified lwp's platform-dependent floating-point 3040Sstevel@tonic-gate * extra register state based on the specified input 3050Sstevel@tonic-gate */ 3060Sstevel@tonic-gate void 3070Sstevel@tonic-gate xregs_setfpfiller(klwp_id_t lwp, caddr_t xrp) 3080Sstevel@tonic-gate { 3090Sstevel@tonic-gate prxregset_t *xregs = (prxregset_t *)xrp; 3100Sstevel@tonic-gate kfpu_t *fp = lwptofpu(lwp); 3110Sstevel@tonic-gate uint32_t fprs = (FPRS_FEF|FPRS_DU|FPRS_DL); 3120Sstevel@tonic-gate uint64_t gsr = PRXREG_GSR(xregs); 3130Sstevel@tonic-gate 3140Sstevel@tonic-gate kpreempt_disable(); 3150Sstevel@tonic-gate set_gsr(gsr, lwptofpu(lwp)); 3160Sstevel@tonic-gate 3170Sstevel@tonic-gate if ((lwp == ttolwp(curthread)) && fpu_exists) { 3180Sstevel@tonic-gate fp->fpu_fprs = _fp_read_fprs(); 3190Sstevel@tonic-gate if ((fp->fpu_fprs & FPRS_FEF) != FPRS_FEF) { 3200Sstevel@tonic-gate _fp_write_fprs(fprs); 3210Sstevel@tonic-gate fp->fpu_fprs = (V9_FPU_FPRS_TYPE)fprs; 3220Sstevel@tonic-gate } 3230Sstevel@tonic-gate restore_gsr(lwptofpu(lwp)); 3240Sstevel@tonic-gate } 3250Sstevel@tonic-gate kpreempt_enable(); 3260Sstevel@tonic-gate } 3270Sstevel@tonic-gate 3280Sstevel@tonic-gate /* 3290Sstevel@tonic-gate * fill in the sun4u asrs, ie, the lwp's platform-dependent 3300Sstevel@tonic-gate * non-floating-point extra register state information 3310Sstevel@tonic-gate */ 3320Sstevel@tonic-gate /* ARGSUSED */ 3330Sstevel@tonic-gate void 3340Sstevel@tonic-gate getasrs(klwp_t *lwp, asrset_t asr) 3350Sstevel@tonic-gate { 3360Sstevel@tonic-gate /* for sun4u nothing to do here, added for symmetry */ 3370Sstevel@tonic-gate } 3380Sstevel@tonic-gate 3390Sstevel@tonic-gate /* 3400Sstevel@tonic-gate * fill in the sun4u asrs, ie, the lwp's platform-dependent 3410Sstevel@tonic-gate * floating-point extra register state information 3420Sstevel@tonic-gate */ 3430Sstevel@tonic-gate void 3440Sstevel@tonic-gate getfpasrs(klwp_t *lwp, asrset_t asr) 3450Sstevel@tonic-gate { 3460Sstevel@tonic-gate kfpu_t *fp = lwptofpu(lwp); 3470Sstevel@tonic-gate uint32_t fprs = (FPRS_FEF|FPRS_DU|FPRS_DL); 3480Sstevel@tonic-gate 3490Sstevel@tonic-gate kpreempt_disable(); 3500Sstevel@tonic-gate if (ttolwp(curthread) == lwp) 3510Sstevel@tonic-gate fp->fpu_fprs = _fp_read_fprs(); 3520Sstevel@tonic-gate if ((fp->fpu_en) || (fp->fpu_fprs & FPRS_FEF)) { 3530Sstevel@tonic-gate if (fpu_exists && ttolwp(curthread) == lwp) { 3540Sstevel@tonic-gate if ((fp->fpu_fprs & FPRS_FEF) != FPRS_FEF) { 3550Sstevel@tonic-gate _fp_write_fprs(fprs); 3560Sstevel@tonic-gate fp->fpu_fprs = (V9_FPU_FPRS_TYPE)fprs; 3570Sstevel@tonic-gate } 3580Sstevel@tonic-gate save_gsr(fp); 3590Sstevel@tonic-gate } 3600Sstevel@tonic-gate asr[ASR_GSR] = (int64_t)get_gsr(fp); 3610Sstevel@tonic-gate } 3620Sstevel@tonic-gate kpreempt_enable(); 3630Sstevel@tonic-gate } 3640Sstevel@tonic-gate 3650Sstevel@tonic-gate /* 3660Sstevel@tonic-gate * set the sun4u asrs, ie, the lwp's platform-dependent 3670Sstevel@tonic-gate * non-floating-point extra register state information 3680Sstevel@tonic-gate */ 3690Sstevel@tonic-gate /* ARGSUSED */ 3700Sstevel@tonic-gate void 3710Sstevel@tonic-gate setasrs(klwp_t *lwp, asrset_t asr) 3720Sstevel@tonic-gate { 3730Sstevel@tonic-gate /* for sun4u nothing to do here, added for symmetry */ 3740Sstevel@tonic-gate } 3750Sstevel@tonic-gate 3760Sstevel@tonic-gate void 3770Sstevel@tonic-gate setfpasrs(klwp_t *lwp, asrset_t asr) 3780Sstevel@tonic-gate { 3790Sstevel@tonic-gate kfpu_t *fp = lwptofpu(lwp); 3800Sstevel@tonic-gate uint32_t fprs = (FPRS_FEF|FPRS_DU|FPRS_DL); 3810Sstevel@tonic-gate 3820Sstevel@tonic-gate kpreempt_disable(); 3830Sstevel@tonic-gate if (ttolwp(curthread) == lwp) 3840Sstevel@tonic-gate fp->fpu_fprs = _fp_read_fprs(); 3850Sstevel@tonic-gate if ((fp->fpu_en) || (fp->fpu_fprs & FPRS_FEF)) { 3860Sstevel@tonic-gate set_gsr(asr[ASR_GSR], fp); 3870Sstevel@tonic-gate if (fpu_exists && ttolwp(curthread) == lwp) { 3880Sstevel@tonic-gate if ((fp->fpu_fprs & FPRS_FEF) != FPRS_FEF) { 3890Sstevel@tonic-gate _fp_write_fprs(fprs); 3900Sstevel@tonic-gate fp->fpu_fprs = (V9_FPU_FPRS_TYPE)fprs; 3910Sstevel@tonic-gate } 3920Sstevel@tonic-gate restore_gsr(fp); 3930Sstevel@tonic-gate } 3940Sstevel@tonic-gate } 3950Sstevel@tonic-gate kpreempt_enable(); 3960Sstevel@tonic-gate } 3970Sstevel@tonic-gate 3980Sstevel@tonic-gate /* 3990Sstevel@tonic-gate * Create interrupt kstats for this CPU. 4000Sstevel@tonic-gate */ 4010Sstevel@tonic-gate void 4020Sstevel@tonic-gate cpu_create_intrstat(cpu_t *cp) 4030Sstevel@tonic-gate { 4040Sstevel@tonic-gate int i; 4050Sstevel@tonic-gate kstat_t *intr_ksp; 4060Sstevel@tonic-gate kstat_named_t *knp; 4070Sstevel@tonic-gate char name[KSTAT_STRLEN]; 4080Sstevel@tonic-gate zoneid_t zoneid; 4090Sstevel@tonic-gate 4100Sstevel@tonic-gate ASSERT(MUTEX_HELD(&cpu_lock)); 4110Sstevel@tonic-gate 4120Sstevel@tonic-gate if (pool_pset_enabled()) 4130Sstevel@tonic-gate zoneid = GLOBAL_ZONEID; 4140Sstevel@tonic-gate else 4150Sstevel@tonic-gate zoneid = ALL_ZONES; 4160Sstevel@tonic-gate 4170Sstevel@tonic-gate intr_ksp = kstat_create_zone("cpu", cp->cpu_id, "intrstat", "misc", 4180Sstevel@tonic-gate KSTAT_TYPE_NAMED, PIL_MAX * 2, NULL, zoneid); 4190Sstevel@tonic-gate 4200Sstevel@tonic-gate /* 4210Sstevel@tonic-gate * Initialize each PIL's named kstat 4220Sstevel@tonic-gate */ 4230Sstevel@tonic-gate if (intr_ksp != NULL) { 4240Sstevel@tonic-gate intr_ksp->ks_update = cpu_kstat_intrstat_update; 4250Sstevel@tonic-gate knp = (kstat_named_t *)intr_ksp->ks_data; 4260Sstevel@tonic-gate intr_ksp->ks_private = cp; 4270Sstevel@tonic-gate for (i = 0; i < PIL_MAX; i++) { 4280Sstevel@tonic-gate (void) snprintf(name, KSTAT_STRLEN, "level-%d-time", 4290Sstevel@tonic-gate i + 1); 4300Sstevel@tonic-gate kstat_named_init(&knp[i * 2], name, KSTAT_DATA_UINT64); 4310Sstevel@tonic-gate (void) snprintf(name, KSTAT_STRLEN, "level-%d-count", 4320Sstevel@tonic-gate i + 1); 4330Sstevel@tonic-gate kstat_named_init(&knp[(i * 2) + 1], name, 4340Sstevel@tonic-gate KSTAT_DATA_UINT64); 4350Sstevel@tonic-gate } 4360Sstevel@tonic-gate kstat_install(intr_ksp); 4370Sstevel@tonic-gate } 4380Sstevel@tonic-gate } 4390Sstevel@tonic-gate 4400Sstevel@tonic-gate /* 4410Sstevel@tonic-gate * Delete interrupt kstats for this CPU. 4420Sstevel@tonic-gate */ 4430Sstevel@tonic-gate void 4440Sstevel@tonic-gate cpu_delete_intrstat(cpu_t *cp) 4450Sstevel@tonic-gate { 4460Sstevel@tonic-gate kstat_delete_byname_zone("cpu", cp->cpu_id, "intrstat", ALL_ZONES); 4470Sstevel@tonic-gate } 4480Sstevel@tonic-gate 4490Sstevel@tonic-gate /* 4500Sstevel@tonic-gate * Convert interrupt statistics from CPU ticks to nanoseconds and 4510Sstevel@tonic-gate * update kstat. 4520Sstevel@tonic-gate */ 4530Sstevel@tonic-gate int 4540Sstevel@tonic-gate cpu_kstat_intrstat_update(kstat_t *ksp, int rw) 4550Sstevel@tonic-gate { 4560Sstevel@tonic-gate kstat_named_t *knp = ksp->ks_data; 4570Sstevel@tonic-gate cpu_t *cpup = (cpu_t *)ksp->ks_private; 4580Sstevel@tonic-gate int i; 4590Sstevel@tonic-gate 4600Sstevel@tonic-gate if (rw == KSTAT_WRITE) 4610Sstevel@tonic-gate return (EACCES); 4620Sstevel@tonic-gate 4630Sstevel@tonic-gate /* 4640Sstevel@tonic-gate * We use separate passes to copy and convert the statistics to 4650Sstevel@tonic-gate * nanoseconds. This assures that the snapshot of the data is as 4660Sstevel@tonic-gate * self-consistent as possible. 4670Sstevel@tonic-gate */ 4680Sstevel@tonic-gate 4690Sstevel@tonic-gate for (i = 0; i < PIL_MAX; i++) { 4700Sstevel@tonic-gate knp[i * 2].value.ui64 = cpup->cpu_m.intrstat[i + 1][0]; 4710Sstevel@tonic-gate knp[(i * 2) + 1].value.ui64 = cpup->cpu_stats.sys.intr[i]; 4720Sstevel@tonic-gate } 4730Sstevel@tonic-gate 4740Sstevel@tonic-gate for (i = 0; i < PIL_MAX; i++) { 4750Sstevel@tonic-gate knp[i * 2].value.ui64 = 4760Sstevel@tonic-gate (uint64_t)tick2ns((hrtime_t)knp[i * 2].value.ui64, 4770Sstevel@tonic-gate cpup->cpu_id); 4780Sstevel@tonic-gate } 4790Sstevel@tonic-gate 4800Sstevel@tonic-gate return (0); 4810Sstevel@tonic-gate } 4820Sstevel@tonic-gate 4830Sstevel@tonic-gate /* 4840Sstevel@tonic-gate * Called by common/os/cpu.c for psrinfo(1m) kstats 4850Sstevel@tonic-gate */ 4860Sstevel@tonic-gate char * 4870Sstevel@tonic-gate cpu_fru_fmri(cpu_t *cp) 4880Sstevel@tonic-gate { 4890Sstevel@tonic-gate return (cpunodes[cp->cpu_id].fru_fmri); 4900Sstevel@tonic-gate } 4910Sstevel@tonic-gate 4920Sstevel@tonic-gate /* 4930Sstevel@tonic-gate * An interrupt thread is ending a time slice, so compute the interval it 4940Sstevel@tonic-gate * ran for and update the statistic for its PIL. 4950Sstevel@tonic-gate */ 4960Sstevel@tonic-gate void 4970Sstevel@tonic-gate cpu_intr_swtch_enter(kthread_id_t t) 4980Sstevel@tonic-gate { 4990Sstevel@tonic-gate uint64_t interval; 5000Sstevel@tonic-gate uint64_t start; 501*590Sesolom cpu_t *cpu; 5020Sstevel@tonic-gate 5030Sstevel@tonic-gate ASSERT((t->t_flag & T_INTR_THREAD) != 0); 5040Sstevel@tonic-gate ASSERT(t->t_pil > 0 && t->t_pil <= LOCK_LEVEL); 5050Sstevel@tonic-gate 5060Sstevel@tonic-gate /* 5070Sstevel@tonic-gate * We could be here with a zero timestamp. This could happen if: 5080Sstevel@tonic-gate * an interrupt thread which no longer has a pinned thread underneath 5090Sstevel@tonic-gate * it (i.e. it blocked at some point in its past) has finished running 5100Sstevel@tonic-gate * its handler. intr_thread() updated the interrupt statistic for its 5110Sstevel@tonic-gate * PIL and zeroed its timestamp. Since there was no pinned thread to 5120Sstevel@tonic-gate * return to, swtch() gets called and we end up here. 5130Sstevel@tonic-gate * 5140Sstevel@tonic-gate * It can also happen if an interrupt thread in intr_thread() calls 5150Sstevel@tonic-gate * preempt. It will have already taken care of updating stats. In 5160Sstevel@tonic-gate * this event, the interrupt thread will be runnable. 5170Sstevel@tonic-gate */ 5180Sstevel@tonic-gate if (t->t_intr_start) { 5190Sstevel@tonic-gate do { 5200Sstevel@tonic-gate start = t->t_intr_start; 5210Sstevel@tonic-gate interval = gettick_counter() - start; 5220Sstevel@tonic-gate } while (cas64(&t->t_intr_start, start, 0) != start); 523*590Sesolom cpu = CPU; 524*590Sesolom if (cpu->cpu_m.divisor > 1) 525*590Sesolom interval *= cpu->cpu_m.divisor; 526*590Sesolom cpu->cpu_m.intrstat[t->t_pil][0] += interval; 527*590Sesolom 528*590Sesolom atomic_add_64((uint64_t *)&cpu->cpu_intracct[cpu->cpu_mstate], 529*590Sesolom interval); 5300Sstevel@tonic-gate } else 5310Sstevel@tonic-gate ASSERT(t->t_intr == NULL || t->t_state == TS_RUN); 5320Sstevel@tonic-gate } 5330Sstevel@tonic-gate 5340Sstevel@tonic-gate 5350Sstevel@tonic-gate /* 5360Sstevel@tonic-gate * An interrupt thread is returning from swtch(). Place a starting timestamp 5370Sstevel@tonic-gate * in its thread structure. 5380Sstevel@tonic-gate */ 5390Sstevel@tonic-gate void 5400Sstevel@tonic-gate cpu_intr_swtch_exit(kthread_id_t t) 5410Sstevel@tonic-gate { 5420Sstevel@tonic-gate uint64_t ts; 5430Sstevel@tonic-gate 5440Sstevel@tonic-gate ASSERT((t->t_flag & T_INTR_THREAD) != 0); 5450Sstevel@tonic-gate ASSERT(t->t_pil > 0 && t->t_pil <= LOCK_LEVEL); 5460Sstevel@tonic-gate 5470Sstevel@tonic-gate do { 5480Sstevel@tonic-gate ts = t->t_intr_start; 5490Sstevel@tonic-gate } while (cas64(&t->t_intr_start, ts, gettick_counter()) != ts); 5500Sstevel@tonic-gate } 5510Sstevel@tonic-gate 5520Sstevel@tonic-gate 5530Sstevel@tonic-gate int 5540Sstevel@tonic-gate blacklist(int cmd, const char *scheme, nvlist_t *fmri, const char *class) 5550Sstevel@tonic-gate { 5560Sstevel@tonic-gate if (&plat_blacklist) 5570Sstevel@tonic-gate return (plat_blacklist(cmd, scheme, fmri, class)); 5580Sstevel@tonic-gate 5590Sstevel@tonic-gate return (ENOTSUP); 5600Sstevel@tonic-gate } 5610Sstevel@tonic-gate 5620Sstevel@tonic-gate int 5630Sstevel@tonic-gate kdi_pread(caddr_t buf, size_t nbytes, uint64_t addr, size_t *ncopiedp) 5640Sstevel@tonic-gate { 5650Sstevel@tonic-gate extern void kdi_flush_caches(void); 5660Sstevel@tonic-gate size_t nread = 0; 5670Sstevel@tonic-gate uint32_t word; 5680Sstevel@tonic-gate int slop, i; 5690Sstevel@tonic-gate 5700Sstevel@tonic-gate kdi_flush_caches(); 5710Sstevel@tonic-gate membar_enter(); 5720Sstevel@tonic-gate 5730Sstevel@tonic-gate /* We might not begin on a word boundary. */ 5740Sstevel@tonic-gate if ((slop = addr & 3) != 0) { 5750Sstevel@tonic-gate word = ldphys(addr & ~3); 5760Sstevel@tonic-gate for (i = slop; i < 4 && nbytes > 0; i++, nbytes--, nread++) 5770Sstevel@tonic-gate *buf++ = ((uchar_t *)&word)[i]; 5780Sstevel@tonic-gate addr = roundup(addr, 4); 5790Sstevel@tonic-gate } 5800Sstevel@tonic-gate 5810Sstevel@tonic-gate while (nbytes > 0) { 5820Sstevel@tonic-gate word = ldphys(addr); 5830Sstevel@tonic-gate for (i = 0; i < 4 && nbytes > 0; i++, nbytes--, nread++, addr++) 5840Sstevel@tonic-gate *buf++ = ((uchar_t *)&word)[i]; 5850Sstevel@tonic-gate } 5860Sstevel@tonic-gate 5870Sstevel@tonic-gate kdi_flush_caches(); 5880Sstevel@tonic-gate 5890Sstevel@tonic-gate *ncopiedp = nread; 5900Sstevel@tonic-gate return (0); 5910Sstevel@tonic-gate } 5920Sstevel@tonic-gate 5930Sstevel@tonic-gate int 5940Sstevel@tonic-gate kdi_pwrite(caddr_t buf, size_t nbytes, uint64_t addr, size_t *ncopiedp) 5950Sstevel@tonic-gate { 5960Sstevel@tonic-gate extern void kdi_flush_caches(void); 5970Sstevel@tonic-gate size_t nwritten = 0; 5980Sstevel@tonic-gate uint32_t word; 5990Sstevel@tonic-gate int slop, i; 6000Sstevel@tonic-gate 6010Sstevel@tonic-gate kdi_flush_caches(); 6020Sstevel@tonic-gate 6030Sstevel@tonic-gate /* We might not begin on a word boundary. */ 6040Sstevel@tonic-gate if ((slop = addr & 3) != 0) { 6050Sstevel@tonic-gate word = ldphys(addr & ~3); 6060Sstevel@tonic-gate for (i = slop; i < 4 && nbytes > 0; i++, nbytes--, nwritten++) 6070Sstevel@tonic-gate ((uchar_t *)&word)[i] = *buf++; 6080Sstevel@tonic-gate stphys(addr & ~3, word); 6090Sstevel@tonic-gate addr = roundup(addr, 4); 6100Sstevel@tonic-gate } 6110Sstevel@tonic-gate 6120Sstevel@tonic-gate while (nbytes > 3) { 6130Sstevel@tonic-gate for (word = 0, i = 0; i < 4; i++, nbytes--, nwritten++) 6140Sstevel@tonic-gate ((uchar_t *)&word)[i] = *buf++; 6150Sstevel@tonic-gate stphys(addr, word); 6160Sstevel@tonic-gate addr += 4; 6170Sstevel@tonic-gate } 6180Sstevel@tonic-gate 6190Sstevel@tonic-gate /* We might not end with a whole word. */ 6200Sstevel@tonic-gate if (nbytes > 0) { 6210Sstevel@tonic-gate word = ldphys(addr); 6220Sstevel@tonic-gate for (i = 0; nbytes > 0; i++, nbytes--, nwritten++) 6230Sstevel@tonic-gate ((uchar_t *)&word)[i] = *buf++; 6240Sstevel@tonic-gate stphys(addr, word); 6250Sstevel@tonic-gate } 6260Sstevel@tonic-gate 6270Sstevel@tonic-gate membar_enter(); 6280Sstevel@tonic-gate kdi_flush_caches(); 6290Sstevel@tonic-gate 6300Sstevel@tonic-gate *ncopiedp = nwritten; 6310Sstevel@tonic-gate return (0); 6320Sstevel@tonic-gate } 6330Sstevel@tonic-gate 6340Sstevel@tonic-gate static void 6350Sstevel@tonic-gate kdi_kernpanic(struct regs *regs, uint_t tt) 6360Sstevel@tonic-gate { 6370Sstevel@tonic-gate sync_reg_buf = *regs; 6380Sstevel@tonic-gate sync_tt = tt; 6390Sstevel@tonic-gate 6400Sstevel@tonic-gate sync_handler(); 6410Sstevel@tonic-gate } 6420Sstevel@tonic-gate 6430Sstevel@tonic-gate static void 6440Sstevel@tonic-gate kdi_plat_call(void (*platfn)(void)) 6450Sstevel@tonic-gate { 6460Sstevel@tonic-gate if (platfn != NULL) { 6470Sstevel@tonic-gate prom_suspend_prepost(); 6480Sstevel@tonic-gate platfn(); 6490Sstevel@tonic-gate prom_resume_prepost(); 6500Sstevel@tonic-gate } 6510Sstevel@tonic-gate } 6520Sstevel@tonic-gate 6530Sstevel@tonic-gate void 6540Sstevel@tonic-gate mach_kdi_init(kdi_t *kdi) 6550Sstevel@tonic-gate { 6560Sstevel@tonic-gate kdi->kdi_plat_call = kdi_plat_call; 6570Sstevel@tonic-gate kdi->mkdi_cpu_index = kdi_cpu_index; 6580Sstevel@tonic-gate kdi->mkdi_trap_vatotte = kdi_trap_vatotte; 6590Sstevel@tonic-gate kdi->mkdi_kernpanic = kdi_kernpanic; 6600Sstevel@tonic-gate } 661*590Sesolom 662*590Sesolom 663*590Sesolom /* 664*590Sesolom * get_cpu_mstate() is passed an array of timestamps, NCMSTATES 665*590Sesolom * long, and it fills in the array with the time spent on cpu in 666*590Sesolom * each of the mstates, where time is returned in nsec. 667*590Sesolom * 668*590Sesolom * No guarantee is made that the returned values in times[] will 669*590Sesolom * monotonically increase on sequential calls, although this will 670*590Sesolom * be true in the long run. Any such guarantee must be handled by 671*590Sesolom * the caller, if needed. This can happen if we fail to account 672*590Sesolom * for elapsed time due to a generation counter conflict, yet we 673*590Sesolom * did account for it on a prior call (see below). 674*590Sesolom * 675*590Sesolom * The complication is that the cpu in question may be updating 676*590Sesolom * its microstate at the same time that we are reading it. 677*590Sesolom * Because the microstate is only updated when the CPU's state 678*590Sesolom * changes, the values in cpu_intracct[] can be indefinitely out 679*590Sesolom * of date. To determine true current values, it is necessary to 680*590Sesolom * compare the current time with cpu_mstate_start, and add the 681*590Sesolom * difference to times[cpu_mstate]. 682*590Sesolom * 683*590Sesolom * This can be a problem if those values are changing out from 684*590Sesolom * under us. Because the code path in new_cpu_mstate() is 685*590Sesolom * performance critical, we have not added a lock to it. Instead, 686*590Sesolom * we have added a generation counter. Before beginning 687*590Sesolom * modifications, the counter is set to 0. After modifications, 688*590Sesolom * it is set to the old value plus one. 689*590Sesolom * 690*590Sesolom * get_cpu_mstate() will not consider the values of cpu_mstate 691*590Sesolom * and cpu_mstate_start to be usable unless the value of 692*590Sesolom * cpu_mstate_gen is both non-zero and unchanged, both before and 693*590Sesolom * after reading the mstate information. Note that we must 694*590Sesolom * protect against out-of-order loads around accesses to the 695*590Sesolom * generation counter. Also, this is a best effort approach in 696*590Sesolom * that we do not retry should the counter be found to have 697*590Sesolom * changed. 698*590Sesolom * 699*590Sesolom * cpu_intracct[] is used to identify time spent in each CPU 700*590Sesolom * mstate while handling interrupts. Such time should be reported 701*590Sesolom * against system time, and so is subtracted out from its 702*590Sesolom * corresponding cpu_acct[] time and added to 703*590Sesolom * cpu_acct[CMS_SYSTEM]. Additionally, intracct time is stored in 704*590Sesolom * %ticks, but acct time may be stored as %sticks, thus requiring 705*590Sesolom * different conversions before they can be compared. 706*590Sesolom */ 707*590Sesolom 708*590Sesolom void 709*590Sesolom get_cpu_mstate(cpu_t *cpu, hrtime_t *times) 710*590Sesolom { 711*590Sesolom int i; 712*590Sesolom hrtime_t now, start; 713*590Sesolom uint16_t gen; 714*590Sesolom uint16_t state; 715*590Sesolom hrtime_t intracct[NCMSTATES]; 716*590Sesolom 717*590Sesolom /* 718*590Sesolom * Load all volatile state under the protection of membar. 719*590Sesolom * cpu_acct[cpu_mstate] must be loaded to avoid double counting 720*590Sesolom * of (now - cpu_mstate_start) by a change in CPU mstate that 721*590Sesolom * arrives after we make our last check of cpu_mstate_gen. 722*590Sesolom */ 723*590Sesolom 724*590Sesolom now = gethrtime_unscaled(); 725*590Sesolom gen = cpu->cpu_mstate_gen; 726*590Sesolom 727*590Sesolom membar_consumer(); /* guarantee load ordering */ 728*590Sesolom start = cpu->cpu_mstate_start; 729*590Sesolom state = cpu->cpu_mstate; 730*590Sesolom for (i = 0; i < NCMSTATES; i++) { 731*590Sesolom intracct[i] = cpu->cpu_intracct[i]; 732*590Sesolom times[i] = cpu->cpu_acct[i]; 733*590Sesolom } 734*590Sesolom membar_consumer(); /* guarantee load ordering */ 735*590Sesolom 736*590Sesolom if (gen != 0 && gen == cpu->cpu_mstate_gen && now > start) 737*590Sesolom times[state] += now - start; 738*590Sesolom 739*590Sesolom for (i = 0; i < NCMSTATES; i++) { 740*590Sesolom scalehrtime(×[i]); 741*590Sesolom intracct[i] = tick2ns((hrtime_t)intracct[i], cpu->cpu_id); 742*590Sesolom } 743*590Sesolom 744*590Sesolom for (i = 0; i < NCMSTATES; i++) { 745*590Sesolom if (i == CMS_SYSTEM) 746*590Sesolom continue; 747*590Sesolom times[i] -= intracct[i]; 748*590Sesolom if (times[i] < 0) { 749*590Sesolom intracct[i] += times[i]; 750*590Sesolom times[i] = 0; 751*590Sesolom } 752*590Sesolom times[CMS_SYSTEM] += intracct[i]; 753*590Sesolom } 754*590Sesolom } 755